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[209.132.180.131]) by mx.google.com with ESMTPS id 1si4269279pln.617.2017.10.23.10.00.20 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 23 Oct 2017 10:00:20 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-464779-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=LkuTh2fj; spf=pass (google.com: domain of gcc-patches-return-464779-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-464779-patch=linaro.org@gcc.gnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:references:date:in-reply-to:message-id:mime-version :content-type; q=dns; s=default; b=MZrpBhpxBj7cF0OaTeWxf9U5P0SUN oGBAVUau1/INscF9j6HxpljVWXq+81L3Fbb5UxWZXIXXQxDNEG6cmow3jG+j6b91 YfZfEEhMpFGK2NgU1FdqrTLJFmgW1ppUbzMmMkrw/PAuAntDA2MzsZknO818Rtbw kR+RDDKUG2IJWE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:references:date:in-reply-to:message-id:mime-version :content-type; s=default; bh=2f5Xt59JMFo9V7iNOhyAcHksc0Y=; b=Lku Th2fjNo9sAaPCW022bUBJlo9EgbRzNGv+RG/sFzLw9NvoDpYVgL2yvMwaPhOJDbi evn05huWbS2FetbQNwh/IihHEP4OCdka9ZuhP39wAhzbvqFbFa+Hxq+nrrElg86C K1S7/94HKuj6jxEq4FXGnyB2u97dWEGH6x47XpRw= Received: (qmail 97446 invoked by alias); 23 Oct 2017 17:00:05 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 97379 invoked by uid 89); 23 Oct 2017 17:00:02 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-10.5 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy=Hx-spam-relays-external:74.125.82.67, H*RU:74.125.82.67 X-HELO: mail-wm0-f67.google.com Received: from mail-wm0-f67.google.com (HELO mail-wm0-f67.google.com) (74.125.82.67) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 23 Oct 2017 17:00:00 +0000 Received: by mail-wm0-f67.google.com with SMTP id u138so11164845wmu.4 for ; Mon, 23 Oct 2017 10:00:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:mail-followup-to:subject:references:date :in-reply-to:message-id:user-agent:mime-version; bh=xElXtzKKoWskvoe/dr79qMgrF7Bt1dZZ164iaKUiOVU=; b=rRb3R8omBOr7FrxqciMOfUkUloELt+v04pRkYhoH2G6ErDBBVK/0lMpgdV0uH2ufm1 yVb3nUz6YdEVNhz8PZhCoNigIV9I+MPm4H3nOYmkhLXhckMubR2+kNPWBd8aT1up/xax B09o1F02Dy8rvYNqvTVzUDUiZve6cFYiYEFFkBRYYNHY62EGVqcmWINKpJlwS5Z4Js77 OMELdv1JYk9YXlIWPkTqoDPYxYP8ounpYxMRP5+QvAwAHUH6CtHGEMcHdCcokQdnE7+o uoMFBHBkZwtdU6LqtaSEFCKe4KYelCEmaFfTBWzl/g53z9dvXZdp6HqPDDzzSMUISi9A JPaA== X-Gm-Message-State: AMCzsaWRlNSp/n+h6hyye/hgSvTlGJSNFFvgUyuAhba7zEJiBfQJHbl3 X0NOb5eRrXiMpNs5tD89/rx/Bl39sRg= X-Google-Smtp-Source: ABhQp+QqAu3aJ4xW/lJh3wfon88mgsUEAoov4L8bv5qRcM9ECvFk9Byg8uGID7YhunWn9bcf0oeCtg== X-Received: by 10.28.1.70 with SMTP id 67mr5579637wmb.34.1508777998496; Mon, 23 Oct 2017 09:59:58 -0700 (PDT) Received: from localhost ([2.26.27.199]) by smtp.gmail.com with ESMTPSA id v76sm14702wmd.35.2017.10.23.09.59.57 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 23 Oct 2017 09:59:57 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org Subject: [004/nnn] poly_int: mode query functions References: <871sltvm7r.fsf@linaro.org> Date: Mon, 23 Oct 2017 17:59:57 +0100 In-Reply-To: <871sltvm7r.fsf@linaro.org> (Richard Sandiford's message of "Mon, 23 Oct 2017 17:54:32 +0100") Message-ID: <87h8upu7ea.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 This patch changes the bit size and vector count arguments to the machmode.h functions from unsigned int to poly_uint64. 2017-10-23 Richard Sandiford Alan Hayward David Sherwood gcc/ * machmode.h (mode_for_size, int_mode_for_size, float_mode_for_size) (smallest_mode_for_size, smallest_int_mode_for_size): Take the mode size as a poly_uint64. (mode_for_vector, mode_for_int_vector): Take the number of vector elements as a poly_uint64. * stor-layout.c (mode_for_size, smallest_mode_for_size): Take the mode size as a poly_uint64. (mode_for_vector, mode_for_int_vector): Take the number of vector elements as a poly_uint64. Index: gcc/machmode.h =================================================================== --- gcc/machmode.h 2017-10-23 17:00:49.664349224 +0100 +++ gcc/machmode.h 2017-10-23 17:00:52.669615373 +0100 @@ -696,14 +696,14 @@ #define MACRO_MODE(MODE) (as_a (mode_for_size (size, MODE_INT, limit)); } @@ -712,7 +712,7 @@ int_mode_for_size (unsigned int size, in exists. */ inline opt_scalar_float_mode -float_mode_for_size (unsigned int size) +float_mode_for_size (poly_uint64 size) { return dyn_cast (mode_for_size (size, MODE_FLOAT, 0)); } @@ -726,21 +726,21 @@ decimal_float_mode_for_size (unsigned in (mode_for_size (size, MODE_DECIMAL_FLOAT, 0)); } -extern machine_mode smallest_mode_for_size (unsigned int, enum mode_class); +extern machine_mode smallest_mode_for_size (poly_uint64, enum mode_class); /* Find the narrowest integer mode that contains at least SIZE bits. Such a mode must exist. */ inline scalar_int_mode -smallest_int_mode_for_size (unsigned int size) +smallest_int_mode_for_size (poly_uint64 size) { return as_a (smallest_mode_for_size (size, MODE_INT)); } extern opt_scalar_int_mode int_mode_for_mode (machine_mode); extern opt_machine_mode bitwise_mode_for_mode (machine_mode); -extern opt_machine_mode mode_for_vector (scalar_mode, unsigned); -extern opt_machine_mode mode_for_int_vector (unsigned int, unsigned int); +extern opt_machine_mode mode_for_vector (scalar_mode, poly_uint64); +extern opt_machine_mode mode_for_int_vector (unsigned int, poly_uint64); /* Return the integer vector equivalent of MODE, if one exists. In other words, return the mode for an integer vector that has the same number Index: gcc/stor-layout.c =================================================================== --- gcc/stor-layout.c 2017-10-23 16:52:20.627879504 +0100 +++ gcc/stor-layout.c 2017-10-23 17:00:52.669615373 +0100 @@ -297,22 +297,22 @@ finalize_size_functions (void) MAX_FIXED_MODE_SIZE. */ opt_machine_mode -mode_for_size (unsigned int size, enum mode_class mclass, int limit) +mode_for_size (poly_uint64 size, enum mode_class mclass, int limit) { machine_mode mode; int i; - if (limit && size > MAX_FIXED_MODE_SIZE) + if (limit && may_gt (size, (unsigned int) MAX_FIXED_MODE_SIZE)) return opt_machine_mode (); /* Get the first mode which has this size, in the specified class. */ FOR_EACH_MODE_IN_CLASS (mode, mclass) - if (GET_MODE_PRECISION (mode) == size) + if (must_eq (GET_MODE_PRECISION (mode), size)) return mode; if (mclass == MODE_INT || mclass == MODE_PARTIAL_INT) for (i = 0; i < NUM_INT_N_ENTS; i ++) - if (int_n_data[i].bitsize == size + if (must_eq (int_n_data[i].bitsize, size) && int_n_enabled_p[i]) return int_n_data[i].m; @@ -340,7 +340,7 @@ mode_for_size_tree (const_tree size, enu SIZE bits. Abort if no such mode exists. */ machine_mode -smallest_mode_for_size (unsigned int size, enum mode_class mclass) +smallest_mode_for_size (poly_uint64 size, enum mode_class mclass) { machine_mode mode = VOIDmode; int i; @@ -348,19 +348,18 @@ smallest_mode_for_size (unsigned int siz /* Get the first mode which has at least this size, in the specified class. */ FOR_EACH_MODE_IN_CLASS (mode, mclass) - if (GET_MODE_PRECISION (mode) >= size) + if (must_ge (GET_MODE_PRECISION (mode), size)) break; + gcc_assert (mode != VOIDmode); + if (mclass == MODE_INT || mclass == MODE_PARTIAL_INT) for (i = 0; i < NUM_INT_N_ENTS; i ++) - if (int_n_data[i].bitsize >= size - && int_n_data[i].bitsize < GET_MODE_PRECISION (mode) + if (must_ge (int_n_data[i].bitsize, size) + && must_lt (int_n_data[i].bitsize, GET_MODE_PRECISION (mode)) && int_n_enabled_p[i]) mode = int_n_data[i].m; - if (mode == VOIDmode) - gcc_unreachable (); - return mode; } @@ -475,7 +474,7 @@ bitwise_type_for_mode (machine_mode mode either an integer mode or a vector mode. */ opt_machine_mode -mode_for_vector (scalar_mode innermode, unsigned nunits) +mode_for_vector (scalar_mode innermode, poly_uint64 nunits) { machine_mode mode; @@ -496,14 +495,14 @@ mode_for_vector (scalar_mode innermode, /* Do not check vector_mode_supported_p here. We'll do that later in vector_type_mode. */ FOR_EACH_MODE_FROM (mode, mode) - if (GET_MODE_NUNITS (mode) == nunits + if (must_eq (GET_MODE_NUNITS (mode), nunits) && GET_MODE_INNER (mode) == innermode) return mode; /* For integers, try mapping it to a same-sized scalar mode. */ if (GET_MODE_CLASS (innermode) == MODE_INT) { - unsigned int nbits = nunits * GET_MODE_BITSIZE (innermode); + poly_uint64 nbits = nunits * GET_MODE_BITSIZE (innermode); if (int_mode_for_size (nbits, 0).exists (&mode) && have_regs_of_mode[mode]) return mode; @@ -517,7 +516,7 @@ mode_for_vector (scalar_mode innermode, an integer mode or a vector mode. */ opt_machine_mode -mode_for_int_vector (unsigned int int_bits, unsigned int nunits) +mode_for_int_vector (unsigned int int_bits, poly_uint64 nunits) { scalar_int_mode int_mode; machine_mode vec_mode;