From patchwork Tue Sep 29 16:13:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Russkikh X-Patchwork-Id: 259925 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.9 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA2DBC47420 for ; Tue, 29 Sep 2020 16:13:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 670682075E for ; Tue, 29 Sep 2020 16:13:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=marvell.com header.i=@marvell.com header.b="G+48h17z" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730404AbgI2QNa (ORCPT ); Tue, 29 Sep 2020 12:13:30 -0400 Received: from mx0a-0016f401.pphosted.com ([67.231.148.174]:61492 "EHLO mx0b-0016f401.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730051AbgI2QN1 (ORCPT ); Tue, 29 Sep 2020 12:13:27 -0400 Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 08TG4cX8003378; Tue, 29 Sep 2020 09:13:18 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=3gsNUcjBfiR7ha7I7fAkfXFHw92HqGsR9ucKx2usUtM=; b=G+48h17zZSyC6SkRwSRV6XOaX34A16bmeHhZuFPhFiVCF1OgaHkA0LM3Av+ZnNgi1kqX F3Pg7PIMgkfsqKgFCZSvAKJ72HPUHMj1mOkmr76Y/fFGQMlXYM6aNZlm8lVyJzcGABeP Cu/i9u2NVoTKNVSpKNeqR/vrDo4q2J1w9C7hLML4NT0nhZB/bR9Z/9SBFVMslb2eRC+7 oYRu0bco0fKifSx/veTyeT16ij6NA9ay/Bnhjpphbke6DlRNLGJ7hAVEfFCVMzADwNqi Rn2mlRSQz/f+f7wnRbHuqaaolTEHe2VUdQq044OGDkD0t4GdXAz7ffxw5CqA8Ulqg9W8 Ng== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0a-0016f401.pphosted.com with ESMTP id 33teemcr9t-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 29 Sep 2020 09:13:18 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 29 Sep 2020 09:13:17 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 29 Sep 2020 09:13:17 -0700 Received: from NN-LT0019.marvell.com (NN-LT0019.marvell.com [10.193.39.7]) by maili.marvell.com (Postfix) with ESMTP id 34B1A3F7050; Tue, 29 Sep 2020 09:13:15 -0700 (PDT) From: Igor Russkikh To: CC: "David S . Miller" , Jakub Kicinski , Andrew Lunn , Igor Russkikh Subject: [PATCH net-next 1/3] ethtool: allow netdev driver to define phy tunables Date: Tue, 29 Sep 2020 19:13:05 +0300 Message-ID: <20200929161307.542-2-irusskikh@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200929161307.542-1-irusskikh@marvell.com> References: <20200929161307.542-1-irusskikh@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-09-29_10:2020-09-29,2020-09-29 signatures=0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Define get/set phy tunable callbacks in ethtool ops. This will allow MAC drivers with integrated PHY still to implement these tunables. Signed-off-by: Igor Russkikh --- include/linux/ethtool.h | 4 ++++ net/ethtool/ioctl.c | 37 ++++++++++++++++++++++++------------- 2 files changed, 28 insertions(+), 13 deletions(-) diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h index 060b20f0b20f..6408b446051f 100644 --- a/include/linux/ethtool.h +++ b/include/linux/ethtool.h @@ -505,6 +505,10 @@ struct ethtool_ops { struct ethtool_fecparam *); void (*get_ethtool_phy_stats)(struct net_device *, struct ethtool_stats *, u64 *); + int (*get_phy_tunable)(struct net_device *, + const struct ethtool_tunable *, void *); + int (*set_phy_tunable)(struct net_device *, + const struct ethtool_tunable *, const void *); }; int ethtool_check_ops(const struct ethtool_ops *ops); diff --git a/net/ethtool/ioctl.c b/net/ethtool/ioctl.c index 328d15cd4006..ec2cd7aab5ad 100644 --- a/net/ethtool/ioctl.c +++ b/net/ethtool/ioctl.c @@ -2459,14 +2459,15 @@ static int ethtool_phy_tunable_valid(const struct ethtool_tunable *tuna) static int get_phy_tunable(struct net_device *dev, void __user *useraddr) { - int ret; - struct ethtool_tunable tuna; struct phy_device *phydev = dev->phydev; + struct ethtool_tunable tuna; + bool phy_drv_tunable; void *data; + int ret; - if (!(phydev && phydev->drv && phydev->drv->get_tunable)) + phy_drv_tunable = phydev && phydev->drv && phydev->drv->get_tunable; + if (!phy_drv_tunable && !dev->ethtool_ops->get_phy_tunable) return -EOPNOTSUPP; - if (copy_from_user(&tuna, useraddr, sizeof(tuna))) return -EFAULT; ret = ethtool_phy_tunable_valid(&tuna); @@ -2475,9 +2476,13 @@ static int get_phy_tunable(struct net_device *dev, void __user *useraddr) data = kmalloc(tuna.len, GFP_USER); if (!data) return -ENOMEM; - mutex_lock(&phydev->lock); - ret = phydev->drv->get_tunable(phydev, &tuna, data); - mutex_unlock(&phydev->lock); + if (phy_drv_tunable) { + mutex_lock(&phydev->lock); + ret = phydev->drv->get_tunable(phydev, &tuna, data); + mutex_unlock(&phydev->lock); + } else { + ret = dev->ethtool_ops->get_phy_tunable(dev, &tuna, data); + } if (ret) goto out; useraddr += sizeof(tuna); @@ -2493,12 +2498,14 @@ static int get_phy_tunable(struct net_device *dev, void __user *useraddr) static int set_phy_tunable(struct net_device *dev, void __user *useraddr) { - int ret; - struct ethtool_tunable tuna; struct phy_device *phydev = dev->phydev; + struct ethtool_tunable tuna; + bool phy_drv_tunable; void *data; + int ret; - if (!(phydev && phydev->drv && phydev->drv->set_tunable)) + phy_drv_tunable = phydev && phydev->drv && phydev->drv->get_tunable; + if (!phy_drv_tunable && !dev->ethtool_ops->set_phy_tunable) return -EOPNOTSUPP; if (copy_from_user(&tuna, useraddr, sizeof(tuna))) return -EFAULT; @@ -2509,9 +2516,13 @@ static int set_phy_tunable(struct net_device *dev, void __user *useraddr) data = memdup_user(useraddr, tuna.len); if (IS_ERR(data)) return PTR_ERR(data); - mutex_lock(&phydev->lock); - ret = phydev->drv->set_tunable(phydev, &tuna, data); - mutex_unlock(&phydev->lock); + if (phy_drv_tunable) { + mutex_lock(&phydev->lock); + ret = phydev->drv->set_tunable(phydev, &tuna, data); + mutex_unlock(&phydev->lock); + } else { + ret = dev->ethtool_ops->set_phy_tunable(dev, &tuna, data); + } kfree(data); return ret; From patchwork Tue Sep 29 16:13:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Russkikh X-Patchwork-Id: 259924 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.9 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3E9F6C4741F for ; Tue, 29 Sep 2020 16:13:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D535820936 for ; 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Tue, 29 Sep 2020 09:13:21 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 29 Sep 2020 09:13:20 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 29 Sep 2020 09:13:20 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 29 Sep 2020 09:13:19 -0700 Received: from NN-LT0019.marvell.com (NN-LT0019.marvell.com [10.193.39.7]) by maili.marvell.com (Postfix) with ESMTP id 505983F7043; Tue, 29 Sep 2020 09:13:18 -0700 (PDT) From: Igor Russkikh To: CC: "David S . Miller" , Jakub Kicinski , Andrew Lunn , Igor Russkikh Subject: [PATCH net-next 2/3] net: atlantic: implement phy downshift feature Date: Tue, 29 Sep 2020 19:13:06 +0300 Message-ID: <20200929161307.542-3-irusskikh@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200929161307.542-1-irusskikh@marvell.com> References: <20200929161307.542-1-irusskikh@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-09-29_10:2020-09-29,2020-09-29 signatures=0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org PHY downshift allows phy to try renegotiate if link is unstable and can carry higher speed. AQC devices has integrated PHY which is controlled by MAC firmware. Thus, driver defines new ethtool callbacks to implement phy tunables via netdev. Signed-off-by: Igor Russkikh --- .../ethernet/aquantia/atlantic/aq_ethtool.c | 42 +++++++++++++++++++ .../net/ethernet/aquantia/atlantic/aq_hw.h | 2 + .../net/ethernet/aquantia/atlantic/aq_nic.c | 24 +++++++++++ .../net/ethernet/aquantia/atlantic/aq_nic.h | 2 + .../atlantic/hw_atl/hw_atl_utils_fw2x.c | 22 ++++++++++ .../atlantic/hw_atl2/hw_atl2_utils_fw.c | 13 ++++++ 6 files changed, 105 insertions(+) diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c b/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c index 1ab5314c4c1b..1a6732e6bf54 100644 --- a/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c +++ b/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c @@ -917,6 +917,46 @@ static int aq_ethtool_set_priv_flags(struct net_device *ndev, u32 flags) return ret; } +static int aq_ethtool_get_phy_tunable(struct net_device *ndev, + const struct ethtool_tunable *tuna, void *data) +{ + struct aq_nic_s *aq_nic = netdev_priv(ndev); + + switch (tuna->id) { + case ETHTOOL_PHY_DOWNSHIFT: { + u8 *val = data; + + *val = (u8)aq_nic->aq_nic_cfg.downshift_counter; + break; + } + default: + return -EOPNOTSUPP; + } + + return 0; +} + +static int aq_ethtool_set_phy_tunable(struct net_device *ndev, + const struct ethtool_tunable *tuna, const void *data) +{ + int err = -EOPNOTSUPP; + struct aq_nic_s *aq_nic = netdev_priv(ndev); + + switch (tuna->id) { + case ETHTOOL_PHY_DOWNSHIFT: { + const u8 *val = data; + + aq_nic->aq_nic_cfg.downshift_counter = *val; + err = aq_nic_set_downshift(aq_nic); + break; + } + default: + break; + } + + return err; +} + const struct ethtool_ops aq_ethtool_ops = { .supported_coalesce_params = ETHTOOL_COALESCE_USECS | ETHTOOL_COALESCE_MAX_FRAMES, @@ -952,4 +992,6 @@ const struct ethtool_ops aq_ethtool_ops = { .get_coalesce = aq_ethtool_get_coalesce, .set_coalesce = aq_ethtool_set_coalesce, .get_ts_info = aq_ethtool_get_ts_info, + .get_phy_tunable = aq_ethtool_get_phy_tunable, + .set_phy_tunable = aq_ethtool_set_phy_tunable, }; diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_hw.h b/drivers/net/ethernet/aquantia/atlantic/aq_hw.h index 7df74015fbc9..a17077b0dd49 100644 --- a/drivers/net/ethernet/aquantia/atlantic/aq_hw.h +++ b/drivers/net/ethernet/aquantia/atlantic/aq_hw.h @@ -386,6 +386,8 @@ struct aq_fw_ops { int (*get_eee_rate)(struct aq_hw_s *self, u32 *rate, u32 *supported_rates); + int (*set_downshift)(struct aq_hw_s *self, u32 counter); + u32 (*get_link_capabilities)(struct aq_hw_s *self); int (*send_macsec_req)(struct aq_hw_s *self, diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_nic.c b/drivers/net/ethernet/aquantia/atlantic/aq_nic.c index c6bdf1d677d1..f02d193cf609 100644 --- a/drivers/net/ethernet/aquantia/atlantic/aq_nic.c +++ b/drivers/net/ethernet/aquantia/atlantic/aq_nic.c @@ -405,6 +405,7 @@ int aq_nic_init(struct aq_nic_s *self) mutex_unlock(&self->fwreq_mutex); if (err < 0) goto err_exit; + aq_nic_set_downshift(self); err = self->aq_hw_ops->hw_init(self->aq_hw, aq_nic_get_ndev(self)->dev_addr); @@ -1398,6 +1399,29 @@ void aq_nic_release_filter(struct aq_nic_s *self, enum aq_rx_filter_type type, } } +int aq_nic_set_downshift(struct aq_nic_s *self) +{ + int err = 0; + struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; + + if (!self->aq_fw_ops->set_downshift) + return -EOPNOTSUPP; + + if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ANTIGUA)) { + if (cfg->downshift_counter > 15) + cfg->downshift_counter = 15; + } else { + if (cfg->downshift_counter > 255) + cfg->downshift_counter = 255; + } + + mutex_lock(&self->fwreq_mutex); + err = self->aq_fw_ops->set_downshift(self->aq_hw, cfg->downshift_counter); + mutex_unlock(&self->fwreq_mutex); + + return err; +} + int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map) { struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_nic.h b/drivers/net/ethernet/aquantia/atlantic/aq_nic.h index eb7d8430f2f5..0ab29890cb4c 100644 --- a/drivers/net/ethernet/aquantia/atlantic/aq_nic.h +++ b/drivers/net/ethernet/aquantia/atlantic/aq_nic.h @@ -62,6 +62,7 @@ struct aq_nic_cfg_s { bool is_lro; bool is_qos; bool is_ptp; + int downshift_counter; enum aq_tc_mode tc_mode; u32 priv_flags; u8 tcs; @@ -195,6 +196,7 @@ int aq_nic_set_link_ksettings(struct aq_nic_s *self, struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self); u32 aq_nic_get_fw_version(struct aq_nic_s *self); int aq_nic_set_loopback(struct aq_nic_s *self); +int aq_nic_set_downshift(struct aq_nic_s *self); int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self); void aq_nic_shutdown(struct aq_nic_s *self); u8 aq_nic_reserve_filter(struct aq_nic_s *self, enum aq_rx_filter_type type); diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c index 93c06dfa6c55..09500a95380b 100644 --- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c +++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c @@ -612,6 +612,27 @@ static u32 aq_fw2x_state2_get(struct aq_hw_s *self) return aq_hw_read_reg(self, HW_ATL_FW2X_MPI_STATE2_ADDR); } +static int aq_fw2x_set_downshift(struct aq_hw_s *self, u32 counter) +{ + int err = 0; + u32 mpi_opts; + u32 offset; + + offset = offsetof(struct hw_atl_utils_settings, downshift_retry_count); + err = hw_atl_write_fwsettings_dwords(self, offset, &counter, 1); + if (err) + return err; + + mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR); + if (counter) + mpi_opts |= HW_ATL_FW2X_CTRL_DOWNSHIFT; + else + mpi_opts &= ~HW_ATL_FW2X_CTRL_DOWNSHIFT; + aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts); + + return err; +} + static u32 aq_fw2x_get_link_capabilities(struct aq_hw_s *self) { int err = 0; @@ -692,6 +713,7 @@ const struct aq_fw_ops aq_fw_2x_ops = { .enable_ptp = aq_fw3x_enable_ptp, .led_control = aq_fw2x_led_control, .set_phyloopback = aq_fw2x_set_phyloopback, + .set_downshift = aq_fw2x_set_downshift, .adjust_ptp = aq_fw3x_adjust_ptp, .get_link_capabilities = aq_fw2x_get_link_capabilities, .send_macsec_req = aq_fw2x_send_macsec_req, diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils_fw.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils_fw.c index 85628acbcc1d..dd259c8f2f4f 100644 --- a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils_fw.c +++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils_fw.c @@ -519,6 +519,18 @@ int hw_atl2_utils_get_action_resolve_table_caps(struct aq_hw_s *self, return 0; } +static int aq_a2_fw_set_downshift(struct aq_hw_s *self, u32 counter) +{ + struct link_options_s link_options; + + hw_atl2_shared_buffer_get(self, link_options, link_options); + link_options.downshift = !!counter; + link_options.downshift_retry = counter; + hw_atl2_shared_buffer_write(self, link_options, link_options); + + return hw_atl2_shared_buffer_finish_ack(self); +} + const struct aq_fw_ops aq_a2_fw_ops = { .init = aq_a2_fw_init, .deinit = aq_a2_fw_deinit, @@ -536,4 +548,5 @@ const struct aq_fw_ops aq_a2_fw_ops = { .set_flow_control = aq_a2_fw_set_flow_control, .get_flow_control = aq_a2_fw_get_flow_control, .set_phyloopback = aq_a2_fw_set_phyloopback, + .set_downshift = aq_a2_fw_set_downshift, }; From patchwork Tue Sep 29 16:13:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Russkikh X-Patchwork-Id: 289379 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.9 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67063C47425 for ; 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Tue, 29 Sep 2020 09:13:20 -0700 (PDT) From: Igor Russkikh To: CC: "David S . Miller" , Jakub Kicinski , Andrew Lunn , Igor Russkikh Subject: [PATCH net-next 3/3] net: atlantic: implement media detect feature via phy tunables Date: Tue, 29 Sep 2020 19:13:07 +0300 Message-ID: <20200929161307.542-4-irusskikh@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200929161307.542-1-irusskikh@marvell.com> References: <20200929161307.542-1-irusskikh@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-09-29_10:2020-09-29,2020-09-29 signatures=0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Mediadetect is another name for the EDPD (energy detect power down). This feature allows device to save extra power when no link is available. PHY goes into the extreme power saving mode and only periodically wakes up and checks for the link. The feature may increase linkup time. Signed-off-by: Igor Russkikh --- .../net/ethernet/aquantia/atlantic/aq_ethtool.c | 14 ++++++++++++++ drivers/net/ethernet/aquantia/atlantic/aq_hw.h | 2 ++ drivers/net/ethernet/aquantia/atlantic/aq_nic.c | 16 ++++++++++++++++ drivers/net/ethernet/aquantia/atlantic/aq_nic.h | 2 ++ .../aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c | 15 +++++++++++++++ 5 files changed, 49 insertions(+) diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c b/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c index 1a6732e6bf54..7c38f3ab073a 100644 --- a/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c +++ b/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c @@ -923,6 +923,12 @@ static int aq_ethtool_get_phy_tunable(struct net_device *ndev, struct aq_nic_s *aq_nic = netdev_priv(ndev); switch (tuna->id) { + case ETHTOOL_PHY_EDPD: { + u16 *val = data; + + *val = (u16)aq_nic->aq_nic_cfg.is_media_detect; + break; + } case ETHTOOL_PHY_DOWNSHIFT: { u8 *val = data; @@ -943,6 +949,14 @@ static int aq_ethtool_set_phy_tunable(struct net_device *ndev, struct aq_nic_s *aq_nic = netdev_priv(ndev); switch (tuna->id) { + case ETHTOOL_PHY_EDPD: { + const u16 *val = data; + + /* msecs plays no role - configuration is always fixed in PHY */ + aq_nic->aq_nic_cfg.is_media_detect = *val ? 1 : 0; + err = aq_nic_set_media_detect(aq_nic); + break; + } case ETHTOOL_PHY_DOWNSHIFT: { const u8 *val = data; diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_hw.h b/drivers/net/ethernet/aquantia/atlantic/aq_hw.h index a17077b0dd49..77a01cf2530e 100644 --- a/drivers/net/ethernet/aquantia/atlantic/aq_hw.h +++ b/drivers/net/ethernet/aquantia/atlantic/aq_hw.h @@ -388,6 +388,8 @@ struct aq_fw_ops { int (*set_downshift)(struct aq_hw_s *self, u32 counter); + int (*set_media_detect)(struct aq_hw_s *self, bool enable); + u32 (*get_link_capabilities)(struct aq_hw_s *self); int (*send_macsec_req)(struct aq_hw_s *self, diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_nic.c b/drivers/net/ethernet/aquantia/atlantic/aq_nic.c index f02d193cf609..a0e858c14769 100644 --- a/drivers/net/ethernet/aquantia/atlantic/aq_nic.c +++ b/drivers/net/ethernet/aquantia/atlantic/aq_nic.c @@ -405,6 +405,7 @@ int aq_nic_init(struct aq_nic_s *self) mutex_unlock(&self->fwreq_mutex); if (err < 0) goto err_exit; + aq_nic_set_media_detect(self); aq_nic_set_downshift(self); err = self->aq_hw_ops->hw_init(self->aq_hw, @@ -1422,6 +1423,21 @@ int aq_nic_set_downshift(struct aq_nic_s *self) return err; } +int aq_nic_set_media_detect(struct aq_nic_s *self) +{ + struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; + int err = 0; + + if (!self->aq_fw_ops->set_media_detect) + return -EOPNOTSUPP; + + mutex_lock(&self->fwreq_mutex); + err = self->aq_fw_ops->set_media_detect(self->aq_hw, cfg->is_media_detect); + mutex_unlock(&self->fwreq_mutex); + + return err; +} + int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map) { struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_nic.h b/drivers/net/ethernet/aquantia/atlantic/aq_nic.h index 0ab29890cb4c..9414a164bdcc 100644 --- a/drivers/net/ethernet/aquantia/atlantic/aq_nic.h +++ b/drivers/net/ethernet/aquantia/atlantic/aq_nic.h @@ -62,6 +62,7 @@ struct aq_nic_cfg_s { bool is_lro; bool is_qos; bool is_ptp; + bool is_media_detect; int downshift_counter; enum aq_tc_mode tc_mode; u32 priv_flags; @@ -197,6 +198,7 @@ struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self); u32 aq_nic_get_fw_version(struct aq_nic_s *self); int aq_nic_set_loopback(struct aq_nic_s *self); int aq_nic_set_downshift(struct aq_nic_s *self); +int aq_nic_set_media_detect(struct aq_nic_s *self); int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self); void aq_nic_shutdown(struct aq_nic_s *self); u8 aq_nic_reserve_filter(struct aq_nic_s *self, enum aq_rx_filter_type type); diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c index 09500a95380b..ee0c22d04935 100644 --- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c +++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c @@ -633,6 +633,20 @@ static int aq_fw2x_set_downshift(struct aq_hw_s *self, u32 counter) return err; } +static int aq_fw2x_set_media_detect(struct aq_hw_s *self, bool on) +{ + u32 enable; + u32 offset; + + if (self->fw_ver_actual < HW_ATL_FW_VER_MEDIA_CONTROL) + return -EOPNOTSUPP; + + offset = offsetof(struct hw_atl_utils_settings, media_detect); + enable = on; + + return hw_atl_write_fwsettings_dwords(self, offset, &enable, 1); +} + static u32 aq_fw2x_get_link_capabilities(struct aq_hw_s *self) { int err = 0; @@ -714,6 +728,7 @@ const struct aq_fw_ops aq_fw_2x_ops = { .led_control = aq_fw2x_led_control, .set_phyloopback = aq_fw2x_set_phyloopback, .set_downshift = aq_fw2x_set_downshift, + .set_media_detect = aq_fw2x_set_media_detect, .adjust_ptp = aq_fw3x_adjust_ptp, .get_link_capabilities = aq_fw2x_get_link_capabilities, .send_macsec_req = aq_fw2x_send_macsec_req,