From patchwork Tue Oct 24 09:54:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 116929 Delivered-To: patch@linaro.org Received: by 10.80.245.45 with SMTP id t42csp406947edm; Tue, 24 Oct 2017 02:59:09 -0700 (PDT) X-Received: by 10.98.214.17 with SMTP id r17mr16221453pfg.246.1508839149184; Tue, 24 Oct 2017 02:59:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508839149; cv=none; d=google.com; s=arc-20160816; b=HEsp/2Us+o8blwthyyEFyXYQx8hu/R0/WdYFOiv5pcdaOOoJcEDFuu92yqTie2lXJQ 3PyZHmBK2M0jyAW5RzSAOSm+A0UdAp0p2+LzD+TJDTJK95OCl9etVdWTkk2/0ua4cHrk m7kW6+kdRz/fJ3Zv6iO1ZbgK2oKV90tHxqICxeyDQYliVfaiEoYxTCCAEmQ0L3uOZLKP NBfyNMKuMAqpiQCVqCdUkZI6v16+CpCC/UTRBzbXwfFZUuhdGlLiEPWOcdtw9vzAiB6c Erv99XE8Uk0ikzSIZG0oFeANjAD6GktXvp5zwZL2yoGJ9qAfvi2ugszeepr67KZ/irta hqVg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=a+LKxpWdnoZqdnYHYwbanAXkuTFZXbuaQTVKE6UuN/U=; b=XdYZsgHjsDSzHr4e2ytUiSRSo8BaTJZPYKy+J0Hsd0KJDejyoUOocviv8Z9krs6TeA bwm1kIY+Y+uPqG1TXkQyH+/kU9hZF/M+CxEaK8AWngcej3YS4CIfvJFAo6esBnJobx10 xEKes6C/ONlmzDaOZi4KFKU+Zr8tMWxwsnL69f7fgpMAQljYBqTa9aloUwhfBFfMKDgn dukGq3XEPR56WWD8VixXyjXQEziiKeTl2FH80M0q2q7xnbqLC2wCvsrFFv0x9/NYz6D9 dyzQU1sAA5NBZCXi07iFUKD6Csy9RtwkWb6Wfh1NV4hV7sKxYAaYVBcJuSoXNEa1Z56O sYDA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NTeOEO78; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w10si5102622plp.477.2017.10.24.02.59.08; Tue, 24 Oct 2017 02:59:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NTeOEO78; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752307AbdJXJ7H (ORCPT + 27 others); Tue, 24 Oct 2017 05:59:07 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:45585 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751876AbdJXJ4r (ORCPT ); Tue, 24 Oct 2017 05:56:47 -0400 Received: by mail-wr0-f195.google.com with SMTP id y9so7819110wrb.2 for ; Tue, 24 Oct 2017 02:56:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=a+LKxpWdnoZqdnYHYwbanAXkuTFZXbuaQTVKE6UuN/U=; b=NTeOEO78BBhVXaRIvpI//7nkkFXLRiJ0mg7ViwRQQ6xg+p6QXIIDszjMFvhk2LOR1B gQybvSXh6zgUy6uF7rUXYvi/LzM5z408mK9wc+ZoMPyqXdB8Llt+YjUE5QHfU2ESE0Z+ nXxa70v1AOOGcA2NitOpzkIeQi3SKWLl+G6LM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=a+LKxpWdnoZqdnYHYwbanAXkuTFZXbuaQTVKE6UuN/U=; b=X2cu89eBpVl8LLCJygkb3rJDdpxfRLGoK8b3HIn6L21JSFBnXaAdb4WRiG05qx/phL CCXJDck0LGHxgOHxexkCNs23MDeIkG/iZdFQvNSBh1dXV3lzBQfSpQtuJ/VGdHQTFvLh PZW8UBQMv89EE3yANBKotimm7AVuT+y/GzKwywRvAZI6bugvSUxN/MfofvKjOaRCEyh7 vz8SIPiq9SmGqwGPI7A5x5+raDEdxTQqi8zEi4JPUqvMMg2wfdp9SkyFwDYN7xWd+Qy4 nhsP9+IjACNmeXfInMxE2zsTAPpoac0eLJwReoL/9gzOJBM8290YrJzFB6fQNKUnGvUV mY8Q== X-Gm-Message-State: AMCzsaXgG4G5A0qxZbG+ASjKuKUIgBiicDsogGsEk2/jK4Mbx3eJ5oyD kX7KmCJ8itRCyoDFb3Od0u8aew== X-Google-Smtp-Source: ABhQp+R1SzTiFtjoWi5/33A3aVmWjyCRsJ+wBSnYUTuy6vKNekQSa3Zr5ck4LqRcyACvRloD/huEVQ== X-Received: by 10.223.138.208 with SMTP id z16mr13772603wrz.152.1508839005875; Tue, 24 Oct 2017 02:56:45 -0700 (PDT) Received: from localhost.localdomain (cpc90716-aztw32-2-0-cust92.18-1.cable.virginm.net. [86.26.100.93]) by smtp.gmail.com with ESMTPSA id 29sm9666451wrz.77.2017.10.24.02.56.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 24 Oct 2017 02:56:45 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Keiji Hayashibara , Srinivas Kandagatla Subject: [PATCH 01/10] dt-bindings: nvmem: add description for UniPhier eFuse Date: Tue, 24 Oct 2017 10:54:25 +0100 Message-Id: <1508838874-32252-2-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Keiji Hayashibara Add uniphier-efuse dt-bindings documentation. Signed-off-by: Keiji Hayashibara Acked-by: Rob Herring Signed-off-by: Srinivas Kandagatla --- .../devicetree/bindings/nvmem/uniphier-efuse.txt | 49 ++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/uniphier-efuse.txt -- 1.9.1 diff --git a/Documentation/devicetree/bindings/nvmem/uniphier-efuse.txt b/Documentation/devicetree/bindings/nvmem/uniphier-efuse.txt new file mode 100644 index 0000000..eccf490 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/uniphier-efuse.txt @@ -0,0 +1,49 @@ += UniPhier eFuse device tree bindings = + +This UniPhier eFuse must be under soc-glue. + +Required properties: +- compatible: should be "socionext,uniphier-efuse" +- reg: should contain the register location and length + += Data cells = +Are child nodes of efuse, bindings of which as described in +bindings/nvmem/nvmem.txt + +Example: + + soc-glue@5f900000 { + compatible = "socionext,uniphier-ld20-soc-glue-debug", + "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x5f900000 0x2000>; + + efuse@100 { + compatible = "socionext,uniphier-efuse"; + reg = <0x100 0x28>; + }; + + efuse@200 { + compatible = "socionext,uniphier-efuse"; + reg = <0x200 0x68>; + #address-cells = <1>; + #size-cells = <1>; + + /* Data cells */ + usb_mon: usb-mon@54 { + reg = <0x54 0xc>; + }; + }; + }; + += Data consumers = +Are device nodes which consume nvmem data cells. + +Example: + + usb { + ... + nvmem-cells = <&usb_mon>; + nvmem-cell-names = "usb_mon"; + } From patchwork Tue Oct 24 09:54:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 116920 Delivered-To: patch@linaro.org Received: by 10.80.245.45 with SMTP id t42csp405532edm; Tue, 24 Oct 2017 02:56:55 -0700 (PDT) X-Received: by 10.84.132.98 with SMTP id 89mr12453147ple.98.1508839015090; Tue, 24 Oct 2017 02:56:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508839015; cv=none; d=google.com; s=arc-20160816; b=volsppghy1E4QbPs6h73rkfEbyMaqS2XzUzrkPf7Ik3gKTdjX3kl5AVCRsVwVtt5dw hPbtqyt5e/f326nI3P/5JbLR7qS0HfbPEoWQsAIBkyPVsRaLFuZGq+u9JoTGSxB9UYBf 1HIb9+y1BQ7tuCE5N45ZzHZ0TEjknq/sLR5NIhn2QVI3G92h24DlIa3a7qaow8VGekt3 GdIYeun46vfAZemB3D8S2LanvQoEXkyqbRzMHhRhN++d5cYCkc08QiqS2DG3r6ZtDcP8 FMDozUGvHk6bkxbRBq8H+BRQD6Zn9W9mlgIBVIMfOUJYpxzFiNWhPit/oAjQTdH1eejs Xp4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=IgIl20KUCMQDAyZXnoxs7y7LanMSEubYXmCqLwChL5w=; b=tGENAFfHsV0FodHOxbwO9GIlKe4qX8kwPJDgDNteKQ0/7x9yqtXRKTpbhyX2GTTAW1 J1bBAxiA3no7uwkixQxMYXkOJLp4m7tW4bkw3L1AFCyvqfQdpWTwf5wga7Na1hrvkbER junKN3fEPMSXVwjkfnpxHmm5R7pJzCgxpZyn741zTx6xK0wif4yM7qpufrx8fNRGUElQ n4sc8rHx3sQnjZN6xni9mnjk/Ww6IWaISRMDYgv022jQxqZIoPd8boLt+TgTKVprsGPY 66Cv0Nphftv8DrK6V9ytjFDSX09bqJ4Qse+oGuRBVuhH7fdv2hjJqeuovW3wnaYbva4+ Ld+w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hv+1CTgH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 43si5195171plb.774.2017.10.24.02.56.54; Tue, 24 Oct 2017 02:56:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hv+1CTgH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932344AbdJXJ4v (ORCPT + 27 others); Tue, 24 Oct 2017 05:56:51 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:50647 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752033AbdJXJ4s (ORCPT ); Tue, 24 Oct 2017 05:56:48 -0400 Received: by mail-wm0-f68.google.com with SMTP id u138so14530908wmu.5 for ; Tue, 24 Oct 2017 02:56:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IgIl20KUCMQDAyZXnoxs7y7LanMSEubYXmCqLwChL5w=; b=hv+1CTgH2ZxtSXB137RRRCWQl9t7rWUoJyQ/GK49xs1xZL/mHgT2fWyp8TIzjxxpHm iraP4XAG7jNb+fjmUMdfy0KbJ7XVSOJm3eC1SfqaL/c2vFPg9PGa3k2wML+Q3/bvGGpX mz0mWfZiyMqGVUoF1ZCppB6vjKCMEedi92Vrs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IgIl20KUCMQDAyZXnoxs7y7LanMSEubYXmCqLwChL5w=; b=G8BCh2OvhmavI9s3BhNOjR15gCwegdjm7Q/HYz64WLsvgdmLXmxaqrCKIze9Smsf6M /w8e0xgleyIKTbt0HSqV1wRautbVJfwzKyjhqo6XoPTPWaRV4XW5chQKtJFNeQxHmy2g w/CIucvh2EoKS7p7tnbirvUSQ1/OWYnMZcgRZnJwMHtnBo2xtZy8HFonCAs82qDQUJeu zQxVVdHJwneE6BHa5fe++3u2wzKqqz0x3L15uQtmdm0wDWAz22Fuqtgg9zabfZm8T1hk zsyWlnjRnALfKwex6Y/7dctw8Mhb/XyXRktDcLra9JIMgFWpWhSUGm2xk8GexwTT1B/D 2CTQ== X-Gm-Message-State: AMCzsaXwoZX6ke7c/3ykd7MaKHlqkUPMnLfRp6l5f+UfQITYwYdgVlu4 6Psn69BtmNtGFpZb7pczAPZNxg== X-Google-Smtp-Source: ABhQp+SWaSrkBP1BdJ00jPeRcYBYgeCrXK7A3AP70ZdofE79cwQTAkXjsl8olCNukYvLf3Cz3aHAhQ== X-Received: by 10.28.6.6 with SMTP id 6mr7977388wmg.114.1508839006852; Tue, 24 Oct 2017 02:56:46 -0700 (PDT) Received: from localhost.localdomain (cpc90716-aztw32-2-0-cust92.18-1.cable.virginm.net. [86.26.100.93]) by smtp.gmail.com with ESMTPSA id 29sm9666451wrz.77.2017.10.24.02.56.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 24 Oct 2017 02:56:46 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Keiji Hayashibara , Srinivas Kandagatla Subject: [PATCH 02/10] nvmem: uniphier: add UniPhier eFuse driver Date: Tue, 24 Oct 2017 10:54:26 +0100 Message-Id: <1508838874-32252-3-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Keiji Hayashibara Add eFuse driver for Socionext UniPhier series SoC. Note that eFuse device is under soc-glue and this register implements as read only. Signed-off-by: Keiji Hayashibara Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/Kconfig | 11 +++++ drivers/nvmem/Makefile | 2 + drivers/nvmem/uniphier-efuse.c | 97 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 110 insertions(+) create mode 100644 drivers/nvmem/uniphier-efuse.c -- 1.9.1 diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index eb09916..ff505af 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -123,6 +123,17 @@ config NVMEM_SUNXI_SID This driver can also be built as a module. If so, the module will be called nvmem_sunxi_sid. +config UNIPHIER_EFUSE + tristate "UniPhier SoCs eFuse support" + depends on ARCH_UNIPHIER || COMPILE_TEST + depends on HAS_IOMEM + help + This is a simple driver to dump specified values of UniPhier SoC + from eFuse. + + This driver can also be built as a module. If so, the module + will be called nvmem-uniphier-efuse. + config NVMEM_VF610_OCOTP tristate "VF610 SoC OCOTP support" depends on SOC_VF610 || COMPILE_TEST diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile index 362f394d..64849e9 100644 --- a/drivers/nvmem/Makefile +++ b/drivers/nvmem/Makefile @@ -26,6 +26,8 @@ obj-$(CONFIG_ROCKCHIP_EFUSE) += nvmem_rockchip_efuse.o nvmem_rockchip_efuse-y := rockchip-efuse.o obj-$(CONFIG_NVMEM_SUNXI_SID) += nvmem_sunxi_sid.o nvmem_sunxi_sid-y := sunxi_sid.o +obj-$(CONFIG_UNIPHIER_EFUSE) += nvmem-uniphier-efuse.o +nvmem-uniphier-efuse-y := uniphier-efuse.o obj-$(CONFIG_NVMEM_VF610_OCOTP) += nvmem-vf610-ocotp.o nvmem-vf610-ocotp-y := vf610-ocotp.o obj-$(CONFIG_MESON_EFUSE) += nvmem_meson_efuse.o diff --git a/drivers/nvmem/uniphier-efuse.c b/drivers/nvmem/uniphier-efuse.c new file mode 100644 index 0000000..9d278b4 --- /dev/null +++ b/drivers/nvmem/uniphier-efuse.c @@ -0,0 +1,97 @@ +/* + * UniPhier eFuse driver + * + * Copyright (C) 2017 Socionext Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include + +struct uniphier_efuse_priv { + void __iomem *base; +}; + +static int uniphier_reg_read(void *context, + unsigned int reg, void *_val, size_t bytes) +{ + struct uniphier_efuse_priv *priv = context; + u32 *val = _val; + int offs; + + for (offs = 0; offs < bytes; offs += sizeof(u32)) + *val++ = readl(priv->base + reg + offs); + + return 0; +} + +static int uniphier_efuse_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct resource *res; + struct nvmem_device *nvmem; + struct nvmem_config econfig = {}; + struct uniphier_efuse_priv *priv; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + priv->base = devm_ioremap_resource(dev, res); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + econfig.stride = 4; + econfig.word_size = 4; + econfig.read_only = true; + econfig.reg_read = uniphier_reg_read; + econfig.size = resource_size(res); + econfig.priv = priv; + econfig.dev = dev; + nvmem = nvmem_register(&econfig); + if (IS_ERR(nvmem)) + return PTR_ERR(nvmem); + + platform_set_drvdata(pdev, nvmem); + + return 0; +} + +static int uniphier_efuse_remove(struct platform_device *pdev) +{ + struct nvmem_device *nvmem = platform_get_drvdata(pdev); + + return nvmem_unregister(nvmem); +} + +static const struct of_device_id uniphier_efuse_of_match[] = { + { .compatible = "socionext,uniphier-efuse",}, + {/* sentinel */}, +}; +MODULE_DEVICE_TABLE(of, uniphier_efuse_of_match); + +static struct platform_driver uniphier_efuse_driver = { + .probe = uniphier_efuse_probe, + .remove = uniphier_efuse_remove, + .driver = { + .name = "uniphier-efuse", + .of_match_table = uniphier_efuse_of_match, + }, +}; +module_platform_driver(uniphier_efuse_driver); + +MODULE_AUTHOR("Keiji Hayashibara "); +MODULE_DESCRIPTION("UniPhier eFuse driver"); +MODULE_LICENSE("GPL v2"); From patchwork Tue Oct 24 09:54:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 116922 Delivered-To: patch@linaro.org Received: by 10.80.245.45 with SMTP id t42csp405630edm; Tue, 24 Oct 2017 02:57:04 -0700 (PDT) X-Received: by 10.84.213.136 with SMTP id g8mr12561134pli.339.1508839024045; Tue, 24 Oct 2017 02:57:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508839024; cv=none; d=google.com; s=arc-20160816; b=PSTC2cm88M2OQKMTGSxhvnaC2osUz53gf0N6H/9b64WTneVcwhbpgfDKNTsyQP0sxU mJ5CRiC/q6euvV2d1/wgH7n5SkwLk6REqmz8hI08zdiroKc+i93vUNpQNfSVCoUOmsK0 SC94XlckSStLbOxnK5OCL58gfLyCrZw+HD2B3WzRRaTdk21YMniuqZmrvGgn4zEEeQjN xsiw8GfAHOxQOcbWII17S7fDU940mdxobjJQ2U6TbVS9wQS+p6w5NMc3HTYjb7gzIGeS fFoxWJVIj4Gz/FFEMMnIhMjY0drjNsTksI9e7mC4aqrGcqBHUKcbmdc/ex3xXlNXXq6V XGNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=WbTMjpzETInwmq4k2cQfwLPxhqf7SMb3q1L2YhfxzG0=; b=ZSXR8SjsJNmK3qzN9wvGwEW8F4at/tvR18eON0ovBNo62zeiUUn6yv7KYpnV8iTCyE r6Lfe/FgslEgyP98nylWOJNO9gBq80xqtr17xXZTqeNrIt9RR5Y79C4x0pWcXIP5h2X/ MeSbHRvywUueK07W08b+ZJi+zdIO+Btib0t8TRxRbPhD0Cn2Kz6L0VpLOHq9Ipr22Edx qLmf3icW4j3jkdnk8L2LkGOJ/F7BSSUTfkIWC1p7fgeCgHGNL+sy1RkP5/CRO7EtuJ+y z9yFjS3V/HK0OiuPFgPoP67Md/YF/cZbSg90iEvqLQzmtI+pVI7TpkGIwDMIw75msL03 M9JQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GOkgkrOz; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 43si5195171plb.774.2017.10.24.02.57.03; Tue, 24 Oct 2017 02:57:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GOkgkrOz; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932441AbdJXJ5C (ORCPT + 27 others); Tue, 24 Oct 2017 05:57:02 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:57022 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751919AbdJXJ4t (ORCPT ); Tue, 24 Oct 2017 05:56:49 -0400 Received: by mail-wm0-f68.google.com with SMTP id z3so8068682wme.5 for ; Tue, 24 Oct 2017 02:56:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WbTMjpzETInwmq4k2cQfwLPxhqf7SMb3q1L2YhfxzG0=; b=GOkgkrOzq7TLoA733GAhx9zH8Rianj+K0qaSQ/TQ2VwK1Sl0l1BbgTc55Kk/7gJZtB T53Nt8cf5ZVzhx2Ra8sYbUJLn9BjSxCCe5R8GmrQlEqmmKNHFjc3N5ATD/95C+jL1cdR mTcNQEm7lgWOwFP+UI9qI/WOCQfEh1oY+rnFY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WbTMjpzETInwmq4k2cQfwLPxhqf7SMb3q1L2YhfxzG0=; b=MB//UtZpOj4O7thStftTgA4cZAv7xomTB68QLiReGf8Y2Fx8bSDkqhZvz6ErUfZzga BzWDHuVFqX88NqpTZ2NwAJhSi8Ku4wo6LOx6TGURHmn3KYPKe/D5Wu2P3whuG7Qz8Rga HfR3omW6dw3U0qzEJDEDcYVXMgPDW7ZcjASWxPfPm1wXwZigNVImIbQcdKxuzlI7NVYV n2ENykNh+lmMVjD4S8lTd15dv8U6Eu6sucg/8vagJ5yCcVlvQzZO18TZway9n/XgLyA/ mTFzYRxmQUlZfDkrVD1YiDa/Qtkg07d3kqKCOfKMD7OEOcD1jw6Hjv6BBhDaZCEp1QT0 jWTQ== X-Gm-Message-State: AMCzsaWxKmJUSOP5oI+rg4QTIS0Sc1k228xd7fB8u7iaZbKrzWjHIrg6 /KvfbNNygEUtDmlmpCYQVS3Dfw== X-Google-Smtp-Source: ABhQp+QMSiagoXd4JI6A5VBsJ3Ms3LX5CTJPtBLdH+AeLCfFALl5QSw/jUHzLqJ9hMfdG/yVFDJDJw== X-Received: by 10.28.138.12 with SMTP id m12mr786045wmd.134.1508839007724; Tue, 24 Oct 2017 02:56:47 -0700 (PDT) Received: from localhost.localdomain (cpc90716-aztw32-2-0-cust92.18-1.cable.virginm.net. [86.26.100.93]) by smtp.gmail.com with ESMTPSA id 29sm9666451wrz.77.2017.10.24.02.56.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 24 Oct 2017 02:56:47 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Srinivas Kandagatla Subject: [PATCH 03/10] nvmem: imx-ocotp: Restrict OTP write to IMX6 processors Date: Tue, 24 Oct 2017 10:54:27 +0100 Message-Id: <1508838874-32252-4-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bryan O'Donoghue i.MX7S/D have a different scheme for addressing the OTP registers inside the OCOTP block. Currently it's possible to address the wrong OTP registers given the disparity between IMX6 and IMX7 OTP addressing. Since OTP programming is one-time destructive its important we restrict this interface ASAP. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue Acked-by: Philipp Zabel Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/imx-ocotp.c | 2 ++ 1 file changed, 2 insertions(+) -- 1.9.1 diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c index 193ca8f..17d160f 100644 --- a/drivers/nvmem/imx-ocotp.c +++ b/drivers/nvmem/imx-ocotp.c @@ -347,6 +347,8 @@ static int imx_ocotp_probe(struct platform_device *pdev) imx_ocotp_nvmem_config.dev = dev; imx_ocotp_nvmem_config.priv = priv; priv->config = &imx_ocotp_nvmem_config; + if (of_device_is_compatible(pdev->dev.of_node, "fsl,imx7d-ocotp")) + imx_ocotp_nvmem_config.read_only = true; nvmem = nvmem_register(&imx_ocotp_nvmem_config); if (IS_ERR(nvmem)) From patchwork Tue Oct 24 09:54:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 116921 Delivered-To: patch@linaro.org Received: by 10.80.245.45 with SMTP id t42csp405585edm; Tue, 24 Oct 2017 02:56:59 -0700 (PDT) X-Received: by 10.98.212.70 with SMTP id u6mr15836478pfl.321.1508839019533; Tue, 24 Oct 2017 02:56:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508839019; cv=none; d=google.com; s=arc-20160816; b=e0lZy9n5F3qVPA17tQHUXLkiOJiNKFXDty0c3PdxQ90DczSAFGxCPMZIyFBATqhgLv AkYuP8VSGwWmvWPLYU5eDROxJ85+pW9r5l+o00U0XxeSTlr9YJ887ic3czgSawx4C/R7 Uql1xR/Aro/QMGBDMkZLWgvBoNLExEsNbfxSZcrge6GLX8aNDy+vtlJ4L3eXc0t4z0xo ImmBQ2zfz4y7mYNFU6I+m79WeJxyu9MvDkwH8DIh20hsXyLzg2isWpLfT2zROzoToGAi bt38/RbyQkp6xWxhw6AVIOtVLgrEQPRLFdU350hAzM/RXnXz8W4ULxmIevpGEbSSylFC nBNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=TRr0R1g+nYlJp3DBCbBmgdEC43OzhBh6Ri+pVSBX+FI=; b=0MHG2aj1ObzImAH2G9o0qyCvHMRyUceAq/kA1eq7I0O59JE5wfLQwwH+63G0oZLaUH 40vVuDUvQCnzRzavKcEwvs6nWICwAV3AfEnKMsegEL6Eru3Ac5cMBUmWIdZCmIVva77G eGW629VTHLFMisP8avkfFxdSxq5w0nwmrQK7gUt+x873PZFdBAK0YFSbA4bDvfYnBiRP RLEgAVIwXS+3eFG+4fvnBBd6bhqITtgkL6+7EyGEKfPwIiGpdpbeDafTlur6CnYomU+1 1WgJLZ58JxHcgn9IJIrcAqo4yNNC+kBk60dLTUOlVGKOQIeJWLcGDE7raNi2AP3X5KUH 81Gw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ipurFw2n; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 43si5195171plb.774.2017.10.24.02.56.59; Tue, 24 Oct 2017 02:56:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ipurFw2n; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932409AbdJXJ45 (ORCPT + 27 others); Tue, 24 Oct 2017 05:56:57 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:48803 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752036AbdJXJ4t (ORCPT ); Tue, 24 Oct 2017 05:56:49 -0400 Received: by mail-wm0-f66.google.com with SMTP id p75so14534735wmg.3 for ; Tue, 24 Oct 2017 02:56:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=TRr0R1g+nYlJp3DBCbBmgdEC43OzhBh6Ri+pVSBX+FI=; b=ipurFw2nfjq/ViR3fY0u7oZmGoq+SQySWp0ckWcA9nxunNkWSk2sNSmuZcHgkf+5ns Hk19WI5gbV9B6z4IpwyovnIdYgK0cYqQQniJiaZTUb+HXgGvPq5IL54i4Zs3hHrp4Q4u RtGsqKoZfK4YE4Sv/BRphC57qaEDMpC77+Rb8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=TRr0R1g+nYlJp3DBCbBmgdEC43OzhBh6Ri+pVSBX+FI=; b=JeL+BmhlzCdrbiMBc6FMsTSufYcFAbFnuf7D6fgyIhKtzqHarzKbXZcZWG8qmUVmfU SIE6NnRzhIIFfxPt9HMOdsqAo7KK0OrP54PNONIs/h+ctZV7c9bAIm1Jr+bh3XZZ6E+u uN8CWWrAobe7UylwXbKEhG9vU63ozLazX1LoKpNKQCXc45BH8ov5QQDl6RRpqmTw1vr9 MXMe8CU13PYmF759CkIq+Z6Oibks9XZAAE5V4K6/9b+oh6nfvTySB+gWI+UAyeF9uI1x 5aJWCjmrQHg5Bzq+1EHBfKF8cV1JRJqFjuoxxeWKJ0tO8KHbgRAuqJ98iBqDh6rS7Njp KIqA== X-Gm-Message-State: AMCzsaW6ZbwsQxZYnzSO5aqB6/jgYo7Ya7fv7pPBONpVuHmtSCXVNoFO 7TbbTEm2UoVDzBR6uRHuKl8xqU0q+Rs= X-Google-Smtp-Source: ABhQp+THGbeEONCIiK4sv0+qJyBYkJRBF5+pxBh3te05x6C/xqUQrhwO1jtBdGpA0t5S3iY66knjKg== X-Received: by 10.28.156.67 with SMTP id f64mr7191702wme.42.1508839008512; Tue, 24 Oct 2017 02:56:48 -0700 (PDT) Received: from localhost.localdomain (cpc90716-aztw32-2-0-cust92.18-1.cable.virginm.net. [86.26.100.93]) by smtp.gmail.com with ESMTPSA id 29sm9666451wrz.77.2017.10.24.02.56.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 24 Oct 2017 02:56:48 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Srinivas Kandagatla Subject: [PATCH 04/10] nvmem: imx-ocotp: Pass parameters via a struct Date: Tue, 24 Oct 2017 10:54:28 +0100 Message-Id: <1508838874-32252-5-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bryan O'Donoghue It will be useful in later patches to know the register access mode and bit-shift to apply to a given input offset. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue Reviewed-by: Philipp Zabel Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/imx-ocotp.c | 44 ++++++++++++++++++++++++++++++++++---------- 1 file changed, 34 insertions(+), 10 deletions(-) -- 1.9.1 diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c index 17d160f..b035e47 100644 --- a/drivers/nvmem/imx-ocotp.c +++ b/drivers/nvmem/imx-ocotp.c @@ -53,11 +53,15 @@ static DEFINE_MUTEX(ocotp_mutex); +struct ocotp_params { + unsigned int nregs; +}; + struct ocotp_priv { struct device *dev; struct clk *clk; void __iomem *base; - unsigned int nregs; + const struct ocotp_params *params; struct nvmem_config *config; }; @@ -121,8 +125,8 @@ static int imx_ocotp_read(void *context, unsigned int offset, index = offset >> 2; count = bytes >> 2; - if (count > (priv->nregs - index)) - count = priv->nregs - index; + if (count > (priv->params->nregs - index)) + count = priv->params->nregs - index; mutex_lock(&ocotp_mutex); @@ -308,12 +312,32 @@ static int imx_ocotp_write(void *context, unsigned int offset, void *val, .reg_write = imx_ocotp_write, }; +static const struct ocotp_params imx6q_params = { + .nregs = 128, +}; + +static const struct ocotp_params imx6sl_params = { + .nregs = 64, +}; + +static const struct ocotp_params imx6sx_params = { + .nregs = 128, +}; + +static const struct ocotp_params imx6ul_params = { + .nregs = 128, +}; + +static const struct ocotp_params imx7d_params = { + .nregs = 64, +}; + static const struct of_device_id imx_ocotp_dt_ids[] = { - { .compatible = "fsl,imx6q-ocotp", (void *)128 }, - { .compatible = "fsl,imx6sl-ocotp", (void *)64 }, - { .compatible = "fsl,imx6sx-ocotp", (void *)128 }, - { .compatible = "fsl,imx6ul-ocotp", (void *)128 }, - { .compatible = "fsl,imx7d-ocotp", (void *)64 }, + { .compatible = "fsl,imx6q-ocotp", .data = &imx6q_params }, + { .compatible = "fsl,imx6sl-ocotp", .data = &imx6sl_params }, + { .compatible = "fsl,imx6sx-ocotp", .data = &imx6sx_params }, + { .compatible = "fsl,imx6ul-ocotp", .data = &imx6ul_params }, + { .compatible = "fsl,imx7d-ocotp", .data = &imx7d_params }, { }, }; MODULE_DEVICE_TABLE(of, imx_ocotp_dt_ids); @@ -342,8 +366,8 @@ static int imx_ocotp_probe(struct platform_device *pdev) return PTR_ERR(priv->clk); of_id = of_match_device(imx_ocotp_dt_ids, dev); - priv->nregs = (unsigned long)of_id->data; - imx_ocotp_nvmem_config.size = 4 * priv->nregs; + priv->params = of_device_get_match_data(&pdev->dev); + imx_ocotp_nvmem_config.size = 4 * priv->params->nregs; imx_ocotp_nvmem_config.dev = dev; imx_ocotp_nvmem_config.priv = priv; priv->config = &imx_ocotp_nvmem_config; From patchwork Tue Oct 24 09:54:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 116928 Delivered-To: patch@linaro.org Received: by 10.80.245.45 with SMTP id t42csp406797edm; Tue, 24 Oct 2017 02:58:54 -0700 (PDT) X-Received: by 10.98.51.198 with SMTP id z189mr15979997pfz.198.1508839134001; Tue, 24 Oct 2017 02:58:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508839133; cv=none; d=google.com; s=arc-20160816; b=psRNuudzquGg+AAkdZMHwwO4e3guA/Od87ycNMAfRGvG7p8steNCkli41/CBn3vLOU 9/dAYd+5Y4BVawyDn8yAZtQE0nwZZIhP0fLbyrR1IM9U1HgMqYPFSpOCLn81ZXcUGgwZ OkljzEEZSTRpnUqg5lrMLLlqdVrOVdUirErqGx2YrQt/nssCadPpu7gOrQL2UBGgfDHd bG1OaDJ9OKaSIkmLeN7A1mh3WfH4QLfHD35BBRVudFu2HzEdcYpy83FfMpkjmll3Z3q9 IUE512DeJiYRAg1wXCO32nhtMFjrytG8FeOgqWVj0wf2N5Q+vlZI5Cq3e+XRFOnIsGbQ DG9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=TX65/A5YVvSUqdeGyYUfaN1eyH4Qc3hU9vAXAoEAV/M=; b=RCYKKpZSSRWdxHNuKMxkClEfmb+cacrPoZnGqS1QybnZMI5vR6whydpA0cCkssgaWu JTuGb7B1ffiqauGK35M6Wq95JC+lEq66yGb7JvpHBBVFv82OhYPLVXvQFpBgXSwM7P5n Ujej0RBlLgi4Sbaph/rheugt8nIUwxFRk/GbrXhfsrqsRBSdcXEr2aItu1zdd4IrMFxG 5xcBBNBA7V/1Tom4uYaMLDnqjqKa8SH+hNeaggeaol9pNUXOX23TTAD2TzzkaZS9OQwn 0393F2TmtihjfGdtb4Zh4ApiRDRZZ9seRtCYE//Q4vwY1iP/73wegFtsCu+psVFbjIqt kh4A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OqdTjHqP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u86si6841976pfg.210.2017.10.24.02.58.53; Tue, 24 Oct 2017 02:58:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OqdTjHqP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752270AbdJXJ6v (ORCPT + 27 others); Tue, 24 Oct 2017 05:58:51 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:46881 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752069AbdJXJ4u (ORCPT ); Tue, 24 Oct 2017 05:56:50 -0400 Received: by mail-wm0-f67.google.com with SMTP id m72so14562072wmc.1 for ; Tue, 24 Oct 2017 02:56:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=TX65/A5YVvSUqdeGyYUfaN1eyH4Qc3hU9vAXAoEAV/M=; b=OqdTjHqPQsm2gF1SFiHFWihVcPaDOEt+Dm/uvJGPF6qFLAeAXkZeL8KqtSaeBcwObO Rlc92Nx1cqmUv1efNzLxZWHtKbHhz5go0MqQdzzBgTfgRFZ7EbNUXK1sI3Uj5CUoN81t sGSUiGrQSvVoVifmruHxoxl9ziuzTCrNaba3c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=TX65/A5YVvSUqdeGyYUfaN1eyH4Qc3hU9vAXAoEAV/M=; b=eHRvT3itDn+N9IusLrxByc0oGvyGGH0ksH4kfdR5bAPcxYwHSky2DLCficLLlA9eJB Dg1OOagGKk16zlW1WhRTdshsriFp5DANdFPlgP0HE7Urtd8rlLqH2dluPMPdcanOGz2i U1I5AO6NgrPXbPUq605VngacYwx6ZAfZu21cPD1jgddasUAeIR9VFSm0a9p+A/8HBZyG Ql9pfMn52d5uOC3h8pxuVRBFSD2DBgEpbzMRx1DAIaJEf/BwMWpBmw89Zf1OUF0sD3s6 bjIrNmUkcyGkse7+/TGmX0YiNcmsDetU2zDXm3oKlYdEGYXjTvvwccMJ/rc3KkbxA4LW DRwg== X-Gm-Message-State: AMCzsaUToHlP/nk/BrIF+yoNdmkE+fkuI2qzRT5dWmVzS4yaeG3ybFyT EoqWVIKpIKmUcB55cdVn1K3rDg== X-Google-Smtp-Source: ABhQp+RRSlaIHcldzWoMa/aSHXYT7DxB+e/v90qqZUAJMskgy3fUoTTEyG8CUZ1CP2pwa/fzVphKTA== X-Received: by 10.28.73.9 with SMTP id w9mr7546798wma.3.1508839009370; Tue, 24 Oct 2017 02:56:49 -0700 (PDT) Received: from localhost.localdomain (cpc90716-aztw32-2-0-cust92.18-1.cable.virginm.net. [86.26.100.93]) by smtp.gmail.com with ESMTPSA id 29sm9666451wrz.77.2017.10.24.02.56.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 24 Oct 2017 02:56:48 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Srinivas Kandagatla Subject: [PATCH 05/10] nvmem: imx-ocotp: Add support for banked OTP addressing Date: Tue, 24 Oct 2017 10:54:29 +0100 Message-Id: <1508838874-32252-6-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bryan O'Donoghue The i.MX7S/D takes the bank address in the CTRLn.ADDR field and the data value in one of the DATAx {0, 1, 2, 3} register fields. The current write routine is based on writing the CTRLn.ADDR field and writing a single DATA register only. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue Reviewed-by: Philipp Zabel Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/imx-ocotp.c | 68 ++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 64 insertions(+), 4 deletions(-) -- 1.9.1 diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c index b035e47..e10a0da 100644 --- a/drivers/nvmem/imx-ocotp.c +++ b/drivers/nvmem/imx-ocotp.c @@ -40,7 +40,10 @@ #define IMX_OCOTP_ADDR_CTRL_SET 0x0004 #define IMX_OCOTP_ADDR_CTRL_CLR 0x0008 #define IMX_OCOTP_ADDR_TIMING 0x0010 -#define IMX_OCOTP_ADDR_DATA 0x0020 +#define IMX_OCOTP_ADDR_DATA0 0x0020 +#define IMX_OCOTP_ADDR_DATA1 0x0030 +#define IMX_OCOTP_ADDR_DATA2 0x0040 +#define IMX_OCOTP_ADDR_DATA3 0x0050 #define IMX_OCOTP_BM_CTRL_ADDR 0x0000007F #define IMX_OCOTP_BM_CTRL_BUSY 0x00000100 @@ -55,6 +58,7 @@ struct ocotp_params { unsigned int nregs; + unsigned int bank_address_words; }; struct ocotp_priv { @@ -176,6 +180,7 @@ static int imx_ocotp_write(void *context, unsigned int offset, void *val, u32 timing = 0; u32 ctrl; u8 waddr; + u8 word = 0; /* allow only writing one complete OTP word at a time */ if ((bytes != priv->config->word_size) || @@ -228,8 +233,23 @@ static int imx_ocotp_write(void *context, unsigned int offset, void *val, * description. Both the unlock code and address can be written in the * same operation. */ - /* OTP write/read address specifies one of 128 word address locations */ - waddr = offset / 4; + if (priv->params->bank_address_words != 0) { + /* + * In banked/i.MX7 mode the OTP register bank goes into waddr + * see i.MX 7Solo Applications Processor Reference Manual, Rev. + * 0.1 section 6.4.3.1 + */ + offset = offset / priv->config->word_size; + waddr = offset / priv->params->bank_address_words; + word = offset & (priv->params->bank_address_words - 1); + } else { + /* + * Non-banked i.MX6 mode. + * OTP write/read address specifies one of 128 word address + * locations + */ + waddr = offset / 4; + } ctrl = readl(priv->base + IMX_OCOTP_ADDR_CTRL); ctrl &= ~IMX_OCOTP_BM_CTRL_ADDR; @@ -255,8 +275,43 @@ static int imx_ocotp_write(void *context, unsigned int offset, void *val, * shift right (with zero fill). This shifting is required to program * the OTP serially. During the write operation, HW_OCOTP_DATA cannot be * modified. + * Note: on i.MX7 there are four data fields to write for banked write + * with the fuse blowing operation only taking place after data0 + * has been written. This is why data0 must always be the last + * register written. */ - writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA); + if (priv->params->bank_address_words != 0) { + /* Banked/i.MX7 mode */ + switch (word) { + case 0: + writel(0, priv->base + IMX_OCOTP_ADDR_DATA1); + writel(0, priv->base + IMX_OCOTP_ADDR_DATA2); + writel(0, priv->base + IMX_OCOTP_ADDR_DATA3); + writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA0); + break; + case 1: + writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA1); + writel(0, priv->base + IMX_OCOTP_ADDR_DATA2); + writel(0, priv->base + IMX_OCOTP_ADDR_DATA3); + writel(0, priv->base + IMX_OCOTP_ADDR_DATA0); + break; + case 2: + writel(0, priv->base + IMX_OCOTP_ADDR_DATA1); + writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA2); + writel(0, priv->base + IMX_OCOTP_ADDR_DATA3); + writel(0, priv->base + IMX_OCOTP_ADDR_DATA0); + break; + case 3: + writel(0, priv->base + IMX_OCOTP_ADDR_DATA1); + writel(0, priv->base + IMX_OCOTP_ADDR_DATA2); + writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA3); + writel(0, priv->base + IMX_OCOTP_ADDR_DATA0); + break; + } + } else { + /* Non-banked i.MX6 mode */ + writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA0); + } /* 47.4.1.4.5 * Once complete, the controller will clear BUSY. A write request to a @@ -314,22 +369,27 @@ static int imx_ocotp_write(void *context, unsigned int offset, void *val, static const struct ocotp_params imx6q_params = { .nregs = 128, + .bank_address_words = 0, }; static const struct ocotp_params imx6sl_params = { .nregs = 64, + .bank_address_words = 0, }; static const struct ocotp_params imx6sx_params = { .nregs = 128, + .bank_address_words = 0, }; static const struct ocotp_params imx6ul_params = { .nregs = 128, + .bank_address_words = 0, }; static const struct ocotp_params imx7d_params = { .nregs = 64, + .bank_address_words = 4, }; static const struct of_device_id imx_ocotp_dt_ids[] = { From patchwork Tue Oct 24 09:54:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 116923 Delivered-To: patch@linaro.org Received: by 10.80.245.45 with SMTP id t42csp405645edm; Tue, 24 Oct 2017 02:57:06 -0700 (PDT) X-Received: by 10.159.198.9 with SMTP id f9mr6890971plo.74.1508839026398; Tue, 24 Oct 2017 02:57:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508839026; cv=none; d=google.com; s=arc-20160816; b=bhqYn8NapvilkhcjOkj43X8OQpXRttxOeHG3xEqffta64vvYi7fl8So/YbFv7ICaft 3ScreYg4Gd1sNt0RKReqsb1VRjV4VjX9XcHfT493fqfamxyG300Hs8QHYowAaszZO3EP OEAAcPPVJAJBx84jEsDZ/6HfkRcS7FLGbot+FCjtjqXSiRfVlHQElkob9LsOZSRdmWyL STuBYfEpChGVL51UayxLNngWDdpeK72XfDHYAYbvyZ4Er9VCYZCzyUADYjraGZ7kauj/ NrBfoD7Ujt0R77liIxLjwyVKqhvLq+1T19CF/2Eo4BqXe1kzAi5s2LxTbLpu+85eH1Mj qCYA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=/q6CmKPqmFf8JsQtsNDnoenlF5Mh26sEfR7rkgdG9no=; b=FztIIhlYcaI3f9WS59TszQqtQ3ECOxSk8+KgqYX6T5AFoRT0hfVoFUmPldkfgPFyu0 WhzzY0jCHMpvAgCRh7nmjHHBXWPCjWIPGWk9f2SkVn7p7fz8kf9g/Vv7VMUNH3Mxwa/2 hzyaLKgHdx5WxsSXEJHbm+qyfTMPCLuOwyFFAc/SqlH4/okFnetrVXDIV6JYp8wi1eq3 z/R1YNNJdIji/qAKK6pqScC4NX8NM5W49NY3MZsqCYvYhzbGFNrNPUdiV/CX5HzYDf2e qBVtovyjopExS/KSU4n0SuHbGDZyY+DHXzAxSqYw1yfgTTIvKG++B4AslySWF5PSQ2R9 zZuw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Zy7HhukE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g8si5099262plt.780.2017.10.24.02.57.06; Tue, 24 Oct 2017 02:57:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Zy7HhukE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932474AbdJXJ5E (ORCPT + 27 others); Tue, 24 Oct 2017 05:57:04 -0400 Received: from mail-wm0-f65.google.com ([74.125.82.65]:44566 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932267AbdJXJ4v (ORCPT ); Tue, 24 Oct 2017 05:56:51 -0400 Received: by mail-wm0-f65.google.com with SMTP id 196so11588169wma.1 for ; Tue, 24 Oct 2017 02:56:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/q6CmKPqmFf8JsQtsNDnoenlF5Mh26sEfR7rkgdG9no=; b=Zy7HhukEEoy/a4xZ2hsy6QTSCeXm66awHfwYR+JHkqc0cYEA62n2qBlATiEW6YG/4O fxSGCrD2vCLIIsv24ROUCe13YDm9ubgoCS/8iOvjTCoouKu61O94ypsqb8DRwhuReY6L 3Avtk0pf8nBr9lRY9W4qkb8W81aDwVvGp31F0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/q6CmKPqmFf8JsQtsNDnoenlF5Mh26sEfR7rkgdG9no=; b=jlP8AXG4RBMniw5aNvnE2fvSqbm7wwYBflSbibYpQ4/ZVIFG7rtnyiFHFPn8kPHC7H ZwYUg8gRyIIqm8mcuDGFY5pb6/7bHplsGHGUClw2TJffLbTvqhyWDnedkegE/715NrzN e0A5aowfT5hoVuMHmKfOeIxq/NEiJE5e1H8PTAR71VSKcQhVEFbvdHR4xFo2JYFK/7Wy cPmDBl84vi6hSZz48EYRZVPL+1a2bdUybc6GB0p+eyeM+9de/1bMc9tlaCcvvCIn0TFR kc+wv13BinUtwrWsml3OgKSE2QvX1aRgkbBWB8k3zlVCVtjDCM+4yG2O5DkpeaGsVsxY aMlg== X-Gm-Message-State: AMCzsaV7dA/cnm7Iw+IDJMke+TYra3o6rzhHSDFodOtJPDIOFht8UC/O lJZk5W+h1SevX/h0hiys5zOtvg== X-Google-Smtp-Source: ABhQp+TiMeMc7p82S/68TDPRTzpCFrw+U7m9LDIQwQo2Qm7dsEolNBfreDvV3oFllmVXhXifXbZTOQ== X-Received: by 10.28.217.136 with SMTP id q130mr7430025wmg.89.1508839010253; Tue, 24 Oct 2017 02:56:50 -0700 (PDT) Received: from localhost.localdomain (cpc90716-aztw32-2-0-cust92.18-1.cable.virginm.net. [86.26.100.93]) by smtp.gmail.com with ESMTPSA id 29sm9666451wrz.77.2017.10.24.02.56.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 24 Oct 2017 02:56:49 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Srinivas Kandagatla Subject: [PATCH 06/10] nvmem: imx-ocotp: Move i.MX6 write clock setup to dedicated function Date: Tue, 24 Oct 2017 10:54:30 +0100 Message-Id: <1508838874-32252-7-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bryan O'Donoghue The i.MX7S/D has a different set of timing requirements, as a pre-cursor to adding the i.MX7 timing parameters, move the i.MX6 stuff to a dedicated function. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue Reviewed-by: Philipp Zabel Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/imx-ocotp.c | 47 +++++++++++++++++++++++++++-------------------- 1 file changed, 27 insertions(+), 20 deletions(-) -- 1.9.1 diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c index e10a0da..93d3cb5 100644 --- a/drivers/nvmem/imx-ocotp.c +++ b/drivers/nvmem/imx-ocotp.c @@ -168,6 +168,31 @@ static int imx_ocotp_read(void *context, unsigned int offset, return ret; } +static void imx_ocotp_set_imx6_timing(struct ocotp_priv *priv) +{ + unsigned long clk_rate = 0; + unsigned long strobe_read, relax, strobe_prog; + u32 timing = 0; + + /* 47.3.1.3.1 + * Program HW_OCOTP_TIMING[STROBE_PROG] and HW_OCOTP_TIMING[RELAX] + * fields with timing values to match the current frequency of the + * ipg_clk. OTP writes will work at maximum bus frequencies as long + * as the HW_OCOTP_TIMING parameters are set correctly. + */ + clk_rate = clk_get_rate(priv->clk); + + relax = clk_rate / (1000000000 / DEF_RELAX) - 1; + strobe_prog = clk_rate / (1000000000 / 10000) + 2 * (DEF_RELAX + 1) - 1; + strobe_read = clk_rate / (1000000000 / 40) + 2 * (DEF_RELAX + 1) - 1; + + timing = strobe_prog & 0x00000FFF; + timing |= (relax << 12) & 0x0000F000; + timing |= (strobe_read << 16) & 0x003F0000; + + writel(timing, priv->base + IMX_OCOTP_ADDR_TIMING); +} + static int imx_ocotp_write(void *context, unsigned int offset, void *val, size_t bytes) { @@ -175,9 +200,6 @@ static int imx_ocotp_write(void *context, unsigned int offset, void *val, u32 *buf = val; int ret; - unsigned long clk_rate = 0; - unsigned long strobe_read, relax, strobe_prog; - u32 timing = 0; u32 ctrl; u8 waddr; u8 word = 0; @@ -196,23 +218,8 @@ static int imx_ocotp_write(void *context, unsigned int offset, void *val, return ret; } - /* 47.3.1.3.1 - * Program HW_OCOTP_TIMING[STROBE_PROG] and HW_OCOTP_TIMING[RELAX] - * fields with timing values to match the current frequency of the - * ipg_clk. OTP writes will work at maximum bus frequencies as long - * as the HW_OCOTP_TIMING parameters are set correctly. - */ - clk_rate = clk_get_rate(priv->clk); - - relax = clk_rate / (1000000000 / DEF_RELAX) - 1; - strobe_prog = clk_rate / (1000000000 / 10000) + 2 * (DEF_RELAX + 1) - 1; - strobe_read = clk_rate / (1000000000 / 40) + 2 * (DEF_RELAX + 1) - 1; - - timing = strobe_prog & 0x00000FFF; - timing |= (relax << 12) & 0x0000F000; - timing |= (strobe_read << 16) & 0x003F0000; - - writel(timing, priv->base + IMX_OCOTP_ADDR_TIMING); + /* Setup the write timing values */ + imx_ocotp_set_imx6_timing(priv); /* 47.3.1.3.2 * Check that HW_OCOTP_CTRL[BUSY] and HW_OCOTP_CTRL[ERROR] are clear. From patchwork Tue Oct 24 09:54:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 116927 Delivered-To: patch@linaro.org Received: by 10.80.245.45 with SMTP id t42csp406373edm; Tue, 24 Oct 2017 02:58:14 -0700 (PDT) X-Received: by 10.99.3.21 with SMTP id 21mr13885928pgd.77.1508839094849; Tue, 24 Oct 2017 02:58:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508839094; cv=none; d=google.com; s=arc-20160816; b=QV/jN7TkNL//v/+ozAtozVXPv7h6UFRLZ6G6cTh/Tj0PnRBsMjuieFF6ExbcJtCiil BudOqH6nKIvBA6C94zeZU7WqFYbFsmTgTIec0xAxWUcgiRatTnDGnfQNrlLxM47Q05Y0 9+uzWeYfXgMgDAlxGU7KHrs/PtBbayCwH3fdNeewTVPzOWsNOVEhiL4vMo6MU8Zo/2Ou KYrFMS4QJRJexVwD8PzKlq+umIKuz3jevgPHAwlO6udbrNLuQIdjFzUi/390gkxijS0T BNgWQFzds6Mlhvf1hGeO1E0ZLwggG2zTkRRiDOosMvNFg7xqFfs+kSWHouCYRt9KeW6O L3dA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=d01alMV7QYFXQpiyCMHF/guPbQC1jkujXxb3Y6EbCwA=; b=wKJjhoar8FFSqMrUM2piCPZ97QF+EUdi4q8YlfU1R1MEUhjnjuPCpFh+g4UXRjuaSR w12XTf9AuMq7r1qpT5iJQydSgXdq1mv+7fibhzr1OlRPTGD9Sx8XC0IBxMiKBN6rqsmy 9QlzwjD9kqS10cmeDNiYLI4dVz1bx+/mJ2l9J2nkBaGAE9QwMGjHSFZJ0qOwYIpu+tbD 2VemdbVGBBc7xa9iFs5scVbAllCW4yfiH/Rc10ogs4Rguqq/bvPH08lEqGk+u+JfL7bv 5Z6TSKeZ11Laxi18BCog5YDDcZ7iXIaA3Vp86bnnouOFT7ZnWNIsZiqRfIasAHUuNtgw S8CQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P36Zhh2k; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u86si6841976pfg.210.2017.10.24.02.58.14; Tue, 24 Oct 2017 02:58:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P36Zhh2k; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932525AbdJXJ6M (ORCPT + 27 others); Tue, 24 Oct 2017 05:58:12 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:53976 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932337AbdJXJ4w (ORCPT ); Tue, 24 Oct 2017 05:56:52 -0400 Received: by mail-wm0-f66.google.com with SMTP id r196so2123514wmf.2 for ; Tue, 24 Oct 2017 02:56:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=d01alMV7QYFXQpiyCMHF/guPbQC1jkujXxb3Y6EbCwA=; b=P36Zhh2kHGTicje/O9TF3O7O1lqxja1T+82bnPKQNF2J5e1P0nGflRxotThz4jEsnO XCWKR/CkoD0JwwBC0Z76EX1jvKjS4yzSvxLTx4Pv9v9DIVUKfvXB5PYBgYHi9EG1ugYJ udRX56FKLRsWwEavGHyHoPOdMZMVVSKyzbfZI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=d01alMV7QYFXQpiyCMHF/guPbQC1jkujXxb3Y6EbCwA=; b=ryuO5OrECDazWHl/RuUAjaHqKYlvVtuRV9FnqaKRLe/UnQQrOLAVPWIZQ5BDaeOf8G vSqCSI3DJx3NvKtNaXR33JTlLmxzbDhcpHUPfii4VFqXu0d27Lwlu6U11BHbYdIsj67h hjDSyECriWy+Dpq7wxt7+ixD1wcGnFBCtE3PuN458c/neDOhyIXLMao0AFCrNS2J18z2 Sk1THklu8E3XlYgoKJOkM/KZXdDzdolJBaNhSzx1IstsnRMrNfuU4zUXWVqJAwlwayBF 3jl08w7WrakOunPkQnHyi2tW+L/Gt7GnudwDjNXXHh5mAZtmtQtzGqVu5gfDXZpO6YVJ OR9A== X-Gm-Message-State: AMCzsaW5qOEsDt2NhrogrxxKp31IhEwe9xB+gUX9hNwTxKCXNZfhH+7F ez0HnsY46zw45bbMbrn1uSPV8MoUcho= X-Google-Smtp-Source: ABhQp+SxpWdeYmV6SYS9w04mSl3U1pPX1mfVVjaG3dimyk5hLjzDoqrlY6/PpX4f1CWzA3HOZO6AVw== X-Received: by 10.28.206.142 with SMTP id e136mr7375058wmg.27.1508839011071; Tue, 24 Oct 2017 02:56:51 -0700 (PDT) Received: from localhost.localdomain (cpc90716-aztw32-2-0-cust92.18-1.cable.virginm.net. [86.26.100.93]) by smtp.gmail.com with ESMTPSA id 29sm9666451wrz.77.2017.10.24.02.56.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 24 Oct 2017 02:56:50 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Srinivas Kandagatla Subject: [PATCH 07/10] nvmem: imx-ocotp: Add i.MX7D timing write clock setup support Date: Tue, 24 Oct 2017 10:54:31 +0100 Message-Id: <1508838874-32252-8-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bryan O'Donoghue This patch adds logic to correctly setup the write timing parameters when blowing an OTP fuse for the i.MX7S/D. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/imx-ocotp.c | 43 ++++++++++++++++++++++++++++++++++++------- 1 file changed, 36 insertions(+), 7 deletions(-) -- 1.9.1 diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c index 93d3cb5..be8d002 100644 --- a/drivers/nvmem/imx-ocotp.c +++ b/drivers/nvmem/imx-ocotp.c @@ -50,17 +50,14 @@ #define IMX_OCOTP_BM_CTRL_ERROR 0x00000200 #define IMX_OCOTP_BM_CTRL_REL_SHADOWS 0x00000400 -#define DEF_RELAX 20 /* > 16.5ns */ +#define DEF_RELAX 20 /* > 16.5ns */ +#define DEF_FSOURCE 1001 /* > 1000 ns */ +#define DEF_STROBE_PROG 10000 /* IPG clocks */ #define IMX_OCOTP_WR_UNLOCK 0x3E770000 #define IMX_OCOTP_READ_LOCKED_VAL 0xBADABADA static DEFINE_MUTEX(ocotp_mutex); -struct ocotp_params { - unsigned int nregs; - unsigned int bank_address_words; -}; - struct ocotp_priv { struct device *dev; struct clk *clk; @@ -69,6 +66,12 @@ struct ocotp_priv { struct nvmem_config *config; }; +struct ocotp_params { + unsigned int nregs; + unsigned int bank_address_words; + void (*set_timing)(struct ocotp_priv *priv); +}; + static int imx_ocotp_wait_for_busy(void __iomem *base, u32 flags) { int count; @@ -193,6 +196,27 @@ static void imx_ocotp_set_imx6_timing(struct ocotp_priv *priv) writel(timing, priv->base + IMX_OCOTP_ADDR_TIMING); } +static void imx_ocotp_set_imx7_timing(struct ocotp_priv *priv) +{ + unsigned long clk_rate = 0; + u64 fsource, strobe_prog; + u32 timing = 0; + + /* i.MX 7Solo Applications Processor Reference Manual, Rev. 0.1 + * 6.4.3.3 + */ + clk_rate = clk_get_rate(priv->clk); + fsource = DIV_ROUND_UP_ULL((u64)clk_rate * DEF_FSOURCE, + NSEC_PER_SEC) + 1; + strobe_prog = DIV_ROUND_CLOSEST_ULL((u64)clk_rate * DEF_STROBE_PROG, + NSEC_PER_SEC) + 1; + + timing = strobe_prog & 0x00000FFF; + timing |= (fsource << 12) & 0x000FF000; + + writel(timing, priv->base + IMX_OCOTP_ADDR_TIMING); +} + static int imx_ocotp_write(void *context, unsigned int offset, void *val, size_t bytes) { @@ -219,7 +243,7 @@ static int imx_ocotp_write(void *context, unsigned int offset, void *val, } /* Setup the write timing values */ - imx_ocotp_set_imx6_timing(priv); + priv->params->set_timing(priv); /* 47.3.1.3.2 * Check that HW_OCOTP_CTRL[BUSY] and HW_OCOTP_CTRL[ERROR] are clear. @@ -377,26 +401,31 @@ static int imx_ocotp_write(void *context, unsigned int offset, void *val, static const struct ocotp_params imx6q_params = { .nregs = 128, .bank_address_words = 0, + .set_timing = imx_ocotp_set_imx6_timing, }; static const struct ocotp_params imx6sl_params = { .nregs = 64, .bank_address_words = 0, + .set_timing = imx_ocotp_set_imx6_timing, }; static const struct ocotp_params imx6sx_params = { .nregs = 128, .bank_address_words = 0, + .set_timing = imx_ocotp_set_imx6_timing, }; static const struct ocotp_params imx6ul_params = { .nregs = 128, .bank_address_words = 0, + .set_timing = imx_ocotp_set_imx6_timing, }; static const struct ocotp_params imx7d_params = { .nregs = 64, .bank_address_words = 4, + .set_timing = imx_ocotp_set_imx7_timing, }; static const struct of_device_id imx_ocotp_dt_ids[] = { From patchwork Tue Oct 24 09:54:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 116926 Delivered-To: patch@linaro.org Received: by 10.80.245.45 with SMTP id t42csp406264edm; Tue, 24 Oct 2017 02:58:08 -0700 (PDT) X-Received: by 10.99.51.193 with SMTP id z184mr13870981pgz.285.1508839088037; Tue, 24 Oct 2017 02:58:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508839088; cv=none; d=google.com; s=arc-20160816; b=ENR99oqqhUu90FRkud1zb0ZHYQADS2gkfh3VVd7otYJ36F0h6SuwGk8NfPY6j51FEN 7hn9VHnzkMuy9y5dELtbqhxWFY8DhHp+EWkA1aqYLMl+eHL6ipRRVngVQtnUTSoAgY6x w5UKTvhT8ZG1g8E2ZeHRwMUhtXPuo7sqIy+PP/KKUApvOz5Ai5CWIzxaSgfrl1aU4V0h 9+C055ZoiU3gzvu4IboXcXmawBDYjLy+UxQ6wnkwq+dlof9SG+jV8xa8jCEQLkMNSLvZ n29jzQTz86CpDXzBtMrNy0rqMIiks4+RLBuZC1oHOgab+0m4akjVd6Ie2EoWZg/gfMTg AFRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=gUI8IJJCNY7DTPiPNVl7kzdL+SxyU8mPxrQohsiwW34=; b=Fz1cjhkNwGoRLHVC36q2XWo8do3BSbZQtTY8MgneiwgJk+Ji11XAozv+aIDb0K7BoC bJDfXfTYLAmlTvD9mRXGgusoAPKevS4ftFHpSVmU2FyFkLAKSMqWvf0Mf+iJV0I8NR6y nZF2VsaeGoqxToEY3W4YZW7pGe9hwqlsI+xP+S8OuFov2hg8j8Zl2rwEVtxqNkYjEXCq /4w5LzAD+vumNgihL2v0hE8+vM3OJ8qmGou58hPA/AzdD72BHcvo1crhZ4DHJEDKGUaB MNB5xkSCjjtqnepOu1du55GNR+AgnzduEW7BRaYYwtXgkpWrHo0d0EEmV/lBCcK35Oxj VxCQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dppnn3UJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z14si6225992pgc.589.2017.10.24.02.58.07; Tue, 24 Oct 2017 02:58:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dppnn3UJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932490AbdJXJ6G (ORCPT + 27 others); Tue, 24 Oct 2017 05:58:06 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:53750 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932346AbdJXJ4x (ORCPT ); Tue, 24 Oct 2017 05:56:53 -0400 Received: by mail-wr0-f195.google.com with SMTP id u40so14158781wrf.10 for ; Tue, 24 Oct 2017 02:56:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gUI8IJJCNY7DTPiPNVl7kzdL+SxyU8mPxrQohsiwW34=; b=dppnn3UJa4+HWSPfDCPL3enGbSE7KSDJ0mENTmpWzKk7zf8N2eSQjvY7G6ZaNyEFwV u3FBuZNb4GdbKvmh9AZR8pjJVrXQN4D1bwPSpBEtZaeHbOit9d1t8L+fqO/jEBvWZf27 gqEdJ1gh4Yv25CX86BX9j8iPN6H8z7sRP/UIc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gUI8IJJCNY7DTPiPNVl7kzdL+SxyU8mPxrQohsiwW34=; b=ToUcdAF4gGPxUcg8DxT4enQapp0oN7p20cBwjgBfNmVAiFkFvksjwOdRKJLLoSejy0 NMJur/+6DzHFrYwfNKkH6ngAxi9/v98qGOluXteotCn9O8Jxmk5x4B2lchE9I2+VUOE9 KEPVkxi/czYNSCZrfj8MtZ830iWWPdoFizK6Yjym9iUV3EUbPkxuLnYmTD4xyiSCXQmG dnYNQyCo5OR1dFvMIEYPi4bu4n+107VyCuhH4RiOsDFfeifhYQs+6LOnPci6J7rxoFqb FYD0jc0PNLKJUPBp+WMDpkXsRDO1Xqyh2iNT0ThstzYrS2DKORCsZ2XXez+foUkD/z9W htzw== X-Gm-Message-State: AMCzsaUZInWgBYeHT9vAGjiXg0rBgP8ytnSECW+pPEBRRv3Dim+m5zBx JbzVwmILEcY128Z6XlftFem+6w== X-Google-Smtp-Source: ABhQp+SSCGJZUJBVnqfYlvxEQQcOtXcTh1sf3V/wmN9/OWEc2rjQXnMf8lBG1yfUxfxQfjztpJzX4g== X-Received: by 10.223.133.4 with SMTP id 4mr12944736wrh.56.1508839011849; Tue, 24 Oct 2017 02:56:51 -0700 (PDT) Received: from localhost.localdomain (cpc90716-aztw32-2-0-cust92.18-1.cable.virginm.net. [86.26.100.93]) by smtp.gmail.com with ESMTPSA id 29sm9666451wrz.77.2017.10.24.02.56.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 24 Oct 2017 02:56:51 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Srinivas Kandagatla Subject: [PATCH 08/10] nvmem: imx-ocotp: Enable i.MX7D OTP write support Date: Tue, 24 Oct 2017 10:54:32 +0100 Message-Id: <1508838874-32252-9-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bryan O'Donoghue After applying patches for both banked access and write timings we can re-enable the OTP write interface on i.MX7D processors. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/imx-ocotp.c | 2 -- 1 file changed, 2 deletions(-) -- 1.9.1 diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c index be8d002..79efce6 100644 --- a/drivers/nvmem/imx-ocotp.c +++ b/drivers/nvmem/imx-ocotp.c @@ -467,8 +467,6 @@ static int imx_ocotp_probe(struct platform_device *pdev) imx_ocotp_nvmem_config.dev = dev; imx_ocotp_nvmem_config.priv = priv; priv->config = &imx_ocotp_nvmem_config; - if (of_device_is_compatible(pdev->dev.of_node, "fsl,imx7d-ocotp")) - imx_ocotp_nvmem_config.read_only = true; nvmem = nvmem_register(&imx_ocotp_nvmem_config); if (IS_ERR(nvmem)) From patchwork Tue Oct 24 09:54:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 116925 Delivered-To: patch@linaro.org Received: by 10.80.245.45 with SMTP id t42csp406244edm; Tue, 24 Oct 2017 02:58:05 -0700 (PDT) X-Received: by 10.84.193.131 with SMTP id f3mr9223331pld.27.1508839085592; Tue, 24 Oct 2017 02:58:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508839085; cv=none; d=google.com; s=arc-20160816; b=0BcWlpPT1O0x7fk4lIvu7fulVe6MG2+JflMtezkQI/i4ons6v5+u6BZRV+iM3b8PEu E0+LX3rTSX8xwiqJktAN4dQ5+7/+mawFPK/EClaWprrAcMJLVKyuZz+Vi8kp2gWnU9mw 5fHX5w3EArEl0ho/kuIE4S7S+lp+RkFo/CkEdEw8cEQxPdqHz0W3slwGjCqjGQpny93N hnE0bZZpb3JFlLE0AmBtWujjmyuKTq1g6lsYt1Sno2Tte9sceQ7BHdDBH7/MlGAEoUh/ hHJ9eD//u0jYyAdO6BjpLE9nBPGX6lhZ6ADMt+QHHjVtUp14G9lb9V7MAULgmFZ9xm1n vJsg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=KWlJ7BfPau2fNDIb7vaQd9Fnyf7eFm/X69FYMSj3SWo=; b=Y0aaF6nOrejN80C+j5/amoaAkCe9NePl+HXKYGMiYoWopa2KfkdtDijWy7oJvBk3om sTd7RJCHEz+VbLRHeWu3uh4j1O9x0a106/j3au1pKzr1EN2AYRwFk+kat1ZYmL3clB3o 5tVhyV+6skR7lpBPRpdbrgFEJVyIO02JI8TNqQSG7pWkvEx6o2Btd8DJkTLKj6Obak6k TyX0u622NimCNGEC99aFiqMzWVZ8AWCivYBkk94OLoqFvROJCbvFvO1RgMtoTKck4X9t 1SUJBmR0KDa2gTJMYUFFZBrAUBYEs2wq8GUrBvkNZuO2Biq/PgWHL0jC2jBIgLs0iIss En2Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UaGx4j+O; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w14si6188096pgt.331.2017.10.24.02.58.05; Tue, 24 Oct 2017 02:58:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UaGx4j+O; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752214AbdJXJ6D (ORCPT + 27 others); Tue, 24 Oct 2017 05:58:03 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:49968 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932356AbdJXJ4y (ORCPT ); Tue, 24 Oct 2017 05:56:54 -0400 Received: by mail-wr0-f195.google.com with SMTP id g90so20027422wrd.6 for ; Tue, 24 Oct 2017 02:56:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=KWlJ7BfPau2fNDIb7vaQd9Fnyf7eFm/X69FYMSj3SWo=; b=UaGx4j+OKF/dKDxmWxuBl6a4qBz8gAxJ+8BsvxObfsfUj0aHIhVBQMj/FCkE3P/D5b yRGdF3VejLTTFDd/xR9kB4xXJKwodlo+tci6nBIzJ4j3zkXQ7JJKQvObx6aZGeAAWtaX qM/MoT5q0ENKYKJy4LNqL7QqhsfgoSUWZETOM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KWlJ7BfPau2fNDIb7vaQd9Fnyf7eFm/X69FYMSj3SWo=; b=BAYr9m4YSd5mxwiJDQQOuht30Pz3mjwwXHLP9QviG2CAlP8iLSNrpCeXavZwwxheHd +GWz5SmSOSLkM6WXJ+FjrO4JyEKq5RbgHXpciX9UXwH7wraUh9bL/+biP3jsJbphT9dO C4K1hf1D6kcpsYEYKxUA4EJJ05P8sGIXxbCTuVKNHAZ4veGuJpJZICn51nkhjpNNRXDG 2X5f47yGuR1+NhMCuyCcI+cWR4iKcQOvSJ7/9mgaUt+OOeNMgU9BJrS4aSUIoCCsYilx Kc7+xSudu2jmurmLOtD+U5LvDimgXoBbA/oy4xYDQZfrrQ7ZBFEx9NeVg6VtSEL1y/BQ 1IOA== X-Gm-Message-State: AMCzsaU66ex98eUgVwnkbku3XwSYEG2DkVynsJYzzxJljjHLDjPV6dAj D+7N4dG6MtMlQBxCgEqietRpHw== X-Google-Smtp-Source: ABhQp+TWIbFZ0YRodRVcUVO6QCRstb3EB1xlofhhNz7tzaNB/28dDR4e9jrqUZOlVCmBCGTRC96vmA== X-Received: by 10.223.139.18 with SMTP id n18mr12840861wra.223.1508839012793; Tue, 24 Oct 2017 02:56:52 -0700 (PDT) Received: from localhost.localdomain (cpc90716-aztw32-2-0-cust92.18-1.cable.virginm.net. [86.26.100.93]) by smtp.gmail.com with ESMTPSA id 29sm9666451wrz.77.2017.10.24.02.56.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 24 Oct 2017 02:56:52 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Srinivas Kandagatla Subject: [PATCH 09/10] nvmem: imx-ocotp: Update module description Date: Tue, 24 Oct 2017 10:54:33 +0100 Message-Id: <1508838874-32252-10-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bryan O'Donoghue This imx-ocotp driver encapsulates support for a subset of both i.MX6 and i.MX7 processors. Update the module description to reflect. Fixes: 711d45477931 ("nvmem: octop: Add i.MX7D support") Signed-off-by: Bryan O'Donoghue Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/imx-ocotp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.9.1 diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c index 79efce6..423043e 100644 --- a/drivers/nvmem/imx-ocotp.c +++ b/drivers/nvmem/imx-ocotp.c @@ -495,5 +495,5 @@ static int imx_ocotp_remove(struct platform_device *pdev) module_platform_driver(imx_ocotp_driver); MODULE_AUTHOR("Philipp Zabel "); -MODULE_DESCRIPTION("i.MX6 OCOTP fuse box driver"); +MODULE_DESCRIPTION("i.MX6/i.MX7 OCOTP fuse box driver"); MODULE_LICENSE("GPL v2"); From patchwork Tue Oct 24 09:54:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 116924 Delivered-To: patch@linaro.org Received: by 10.80.245.45 with SMTP id t42csp406097edm; Tue, 24 Oct 2017 02:57:50 -0700 (PDT) X-Received: by 10.98.205.12 with SMTP id o12mr16251216pfg.339.1508839070799; Tue, 24 Oct 2017 02:57:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508839070; cv=none; d=google.com; s=arc-20160816; b=H8mNAwDUlV/onh8csO/NwNVOpRp/eHzSzi/r2WnayhlxveM4sL05nQDuHr6ke0ctZT 1lKqRzczuvlSSstE1HRtyr45f9ifVwxOydqYDCrrc6trohJdnAm2lefxi9YcawxmKYAB VPIFsy5YKPUnwgbJcPQSnzolFXQuKvheh99WbTzP6kwAtvmmKafhy/uRAMUw+X1QcNzd DUX+MoWfUWqV+OAy9KQSe4dT9XL7qmMw07rdO9BRqbTVBJk5GYQKsgcQwgchiitEyiue UP1vT/jRvxQf5R0aKyPIzHLRMw/f/R+W04XUe764vM0ffC5aYNqufFWCiaeKBFJwxADu eBSg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=tJDXfta1X1pp8rTt4VWT/gYPCe8mbQnTvC/lHVEk+R4=; b=yxvQQm1tQCt8EB6adqtayFn2P7C4hK2h49IS8dGWYol9j4XSyDh/l5vgvAoZ0zCrsN mbY5TBy/gj1yfZte8cLaxknhHRxI/iuvFQgfA7gfIuqfiF09abHQq/YbVIwR/p8saab+ lUcgRb31i4pOfhgBHSoS72QYEFAIqJOY8CWAAm6sosRqFweX19HzTeqXDhiprpwRPr9f gDp6THxB754Bq6uEWjC90gNBv9b6SVnLO3LFyVtP9MWs0AwKzTuECJeMHBcR0QqrI8V3 krx56o0K3M86B6KPTGoUqnlgu0S/dx5IqRH/CuRcRY0VM7vNf26+5ECJg3mGYWErsPdi pmuQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XDJg2L1T; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l17si6215308pgn.507.2017.10.24.02.57.50; Tue, 24 Oct 2017 02:57:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XDJg2L1T; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752191AbdJXJ5t (ORCPT + 27 others); Tue, 24 Oct 2017 05:57:49 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:48246 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932360AbdJXJ4z (ORCPT ); Tue, 24 Oct 2017 05:56:55 -0400 Received: by mail-wr0-f193.google.com with SMTP id 15so6210713wrb.5 for ; Tue, 24 Oct 2017 02:56:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tJDXfta1X1pp8rTt4VWT/gYPCe8mbQnTvC/lHVEk+R4=; b=XDJg2L1TGmkYC/TTTVUmAexJqF2//GXVbniq6ZUdWIXlKsVhDrxejEytrR6x5lCTtE 5JKyhx4stREB3OzWqb/Lu1z1r26e8O8YSzp2f7DOxDXgWQLiU1poir6AJoDb39hR6xte BIE/SvRu2zebEhvT1hfO/+cy67lai2V+1hjaY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tJDXfta1X1pp8rTt4VWT/gYPCe8mbQnTvC/lHVEk+R4=; b=fmVkzi8Ae2+GvYUIkV4uXvWxNXS52a87EKVpinBR0zfBdRA7bu9aCGQmP56OrpkEFY EimccpLqWvWH4ClFjbv2j7bl6I/psC3U5GNGerr6FrZvmCqjfPneYAbKz066LvkIbBH6 24NZ3R3W+KvdCQOykTE+cZsOEO/LRfhRSxd1TVCJaBRGT2xfCviKyDlWEXmZroJO8N3f ZBONB1L7FJKNn/uFYhkj98s4kn4vuEWEeT7tiNArQISSM9PzH8hmRdrrsHjT3X0/oCla 9jHzNDjHo3ZQ4nITj3+8qd222mV14lXRLwokYJRRbRnpqa+AI4aAct+x/+Nr4NxeY9ox gTlw== X-Gm-Message-State: AMCzsaUNxtHCJrVZvRA8rJp+6OlPEPPA1uKkhkIqmp2zjFSRKPanv04C gy2XAm1m9k8F7ObeG6FDeUx7Ow== X-Google-Smtp-Source: ABhQp+SqVBc44S+iDlipqsaMz1e69+/1VTn5A0CbzVr2pIDj1KgJBcaODDHU1TAJ/cgI5jQLQsVtqw== X-Received: by 10.223.147.39 with SMTP id 36mr12971971wro.175.1508839013680; Tue, 24 Oct 2017 02:56:53 -0700 (PDT) Received: from localhost.localdomain (cpc90716-aztw32-2-0-cust92.18-1.cable.virginm.net. [86.26.100.93]) by smtp.gmail.com with ESMTPSA id 29sm9666451wrz.77.2017.10.24.02.56.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 24 Oct 2017 02:56:53 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Icenowy Zheng , Srinivas Kandagatla Subject: [PATCH 10/10] nvmem: sunxi-sid: add support for A64/H5's SID controller Date: Tue, 24 Oct 2017 10:54:34 +0100 Message-Id: <1508838874-32252-11-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Icenowy Zheng Allwinner A64/H5 SoCs come with a SID controller like the one in H3, but without the silicon bug that makes the initial value at 0x200 wrong, so the value at 0x200 can be directly read. Add support for this kind of SID controller. Signed-off-by: Icenowy Zheng Acked-by: Rob Herring Signed-off-by: Srinivas Kandagatla --- Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt | 1 + drivers/nvmem/sunxi_sid.c | 6 ++++++ 2 files changed, 7 insertions(+) -- 1.9.1 diff --git a/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt b/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt index ef06d06..6ea0836 100644 --- a/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt +++ b/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt @@ -5,6 +5,7 @@ Required properties: "allwinner,sun4i-a10-sid" "allwinner,sun7i-a20-sid" "allwinner,sun8i-h3-sid" + "allwinner,sun50i-a64-sid" - reg: Should contain registers location and length diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c index 0d6648b..3c9fd4f 100644 --- a/drivers/nvmem/sunxi_sid.c +++ b/drivers/nvmem/sunxi_sid.c @@ -199,10 +199,16 @@ static int sunxi_sid_remove(struct platform_device *pdev) .need_register_readout = true, }; +static const struct sunxi_sid_cfg sun50i_a64_cfg = { + .value_offset = 0x200, + .size = 0x100, +}; + static const struct of_device_id sunxi_sid_of_match[] = { { .compatible = "allwinner,sun4i-a10-sid", .data = &sun4i_a10_cfg }, { .compatible = "allwinner,sun7i-a20-sid", .data = &sun7i_a20_cfg }, { .compatible = "allwinner,sun8i-h3-sid", .data = &sun8i_h3_cfg }, + { .compatible = "allwinner,sun50i-a64-sid", .data = &sun50i_a64_cfg }, {/* sentinel */}, }; MODULE_DEVICE_TABLE(of, sunxi_sid_of_match);