From patchwork Mon Nov 27 15:41:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119737 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp438947qgn; Mon, 27 Nov 2017 07:43:08 -0800 (PST) X-Google-Smtp-Source: AGs4zMbeejqp/bgTFcyMTaq/ED68Km6BOAQMhUnf4pcFzIFzv/MVyarjB/D2G947VyKVI2ajKfT0 X-Received: by 10.98.74.148 with SMTP id c20mr21663585pfj.200.1511797388376; Mon, 27 Nov 2017 07:43:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797388; cv=none; d=google.com; s=arc-20160816; b=bfxgWt1ho59iN/66PwVy8aQToiC89aSQUGxZgTId/DUJOvlR9WyKyJ4fBJk9oF6Bu0 7Mk9f8jfNawX6TK8u/BYuacqOWdKbwsvxNsvFmO34lKonDCPlxZM1C2Cao39fuHW7hot +zx/9rz7aXlnxhjY2wqcedyeUgp4YEg9lT30IDVWmcJfL8/uIqpCnk4fX8fYIO+3co+Y PwVLdhAHPQU7tO0NFOP8ABTSFGPsGnMoR9xHQf9SSInAet7aloAK1HyxdvUQ7bIzNtFl MmbiUhK9zdBR1JaN8vJbDUjDx+9RDZYBv0yJmmmOiqiO9wOo46HYjZSv7ld9RV1OZi/I MulQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=EApme4RliPeF48OKLl9sPbtL+vAa2HlOgapQ5y1N5Kk=; b=BGaRgsXtmE2Rz2FaVJNRMcyoHaRUSCDIVsHZVhDJhHstVqOa8pNOp++htywWo1Ck2M lxD6klPMMiUM2WzoijTi+oOVb+8OlSjE1ueRu07/48nx0Fjic+YNXhXp/He6nQITNNUk +amQN+yH6/ZSI/UqNskQeYDYH/r1G2IHuuv9Mlor+KOiqwCnGyYa7KmwZCBH6KctCk0x ya4RNc8muHjKN4q6d/aHzgXdRCXfn0umD4jdr1VchmEjHiEB+IobhB4BfqC6vzX3wCT0 hfnJl164QqaudMYt9hmIjeDfrpJP3Deq3Yc4IKWwV60JVMW9drGMCDiLj646OVRviAFr J4Yg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id q75si25557578pfk.177.2017.11.27.07.43.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Nov 2017 07:43:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BF06A6E322; Mon, 27 Nov 2017 15:42:19 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id F3F746E2FF for ; Mon, 27 Nov 2017 15:42:00 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id D9E7C213DE; Mon, 27 Nov 2017 16:41:59 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id A3862213DA; Mon, 27 Nov 2017 16:41:59 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v2 01/18] dt-bindings: panel: lvds: Document power-supply property Date: Mon, 27 Nov 2017 16:41:25 +0100 Message-Id: <583a46dd967456aac07fb29529f74d91a10bdfeb.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , jernej.skrabec@siol.net, plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The power-supply property is used by a vast majority of panels, including panel-simple. Let's document it as a common property Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/display/panel/panel-common.txt | 6 ++++++ Documentation/devicetree/bindings/display/panel/panel-lvds.txt | 1 + 2 files changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/panel-common.txt b/Documentation/devicetree/bindings/display/panel/panel-common.txt index ec52c472c845..125ea68052af 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-common.txt +++ b/Documentation/devicetree/bindings/display/panel/panel-common.txt @@ -78,6 +78,12 @@ used for panels that implement compatible control signals. while active. Active high reset signals can be supported by inverting the GPIO specifier polarity flag. +Power +----- + +- power-supply: many display panels need an additional power supply in + order to be fully powered-up. For such panels, power-supply contains + a phandle to the regulator powering the panel. Backlight --------- diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt index b938269f841e..250850a2150b 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt +++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt @@ -32,6 +32,7 @@ Optional properties: - label: See panel-common.txt. - gpios: See panel-common.txt. - backlight: See panel-common.txt. +- power-supply: See panel-common.txt. - data-mirror: If set, reverse the bit order described in the data mappings below on all data lanes, transmitting bits for slots 6 to 0 instead of 0 to 6. From patchwork Mon Nov 27 15:41:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119726 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp437820qgn; Mon, 27 Nov 2017 07:42:13 -0800 (PST) X-Google-Smtp-Source: AGs4zMYPGVtqOW6OXQ0YhYMIpboUDkGRD9tnMz/lPk/tMkdJIIVAjhwQIXh+9FBHseE2xSa6EgtJ X-Received: by 10.84.232.8 with SMTP id h8mr32117305plk.274.1511797333042; Mon, 27 Nov 2017 07:42:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797333; cv=none; d=google.com; s=arc-20160816; b=SwXr5F8htvCouxNaOiGssMPToW8qI9ZdKBxKVtERuFvcWPQljXns3RS12odFA+GrGC ylRqKMnKu2df/WNYFoQcgYl64LADPN2TL5AUXM8IJKU4bUzMZlXGguU9Cc9QIJiSPipi xSgWwed7ehsQkJWTik5mbYtW2er90rtZyle7Pv+zEnufvXFcCkowB4DCa6Z9sJ0ITp6P AZAYE6DmOR46BX5B1h14wrI3c3Js/GjUc2Ej/T3NdVL+byYAMznr1M07z5PBQ+5f7FEM 8k84FOgc1d/ZjjtlSb4pjG+T9/BpJNmPBAVmuWcsJYf9hlj8Ro1l5Lx3zaNnTQBN2REF HU1Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=9k9SmHQGMnEn6X8ToPfkkxOR1OorG/UOt3sKZ6f/14Y=; b=qwXQp+BKzNKhVftaliHHfVqulUuNZQFrH9S+fpFYyUisIsDMtySVDKISGao0gjvnzk YVkVlwnmRoC9nQMlk8lbqEL5z+8O0Oa3tr4MC7co9QocKpyVfYXAQNFSjhUc4F99YJHL zBWJyEywbDjz1//g8you8rIV3gbaXOJKgEWOU5v0WIpM+azFrH3Tz5JkcCYOzclX/VM7 Oc1x/lPvWlZF3kAj2md7O7q/dQHPe8hNC7GpICgMVQgZ7LNThPiY8gJlUcgHri7YE3wb GYrNtfkj2TYqW8gc0y5MIABwWFqT7cI1gm+dzuN3LnRwbkgosxnPYASNQIukEQGqQ0Sg 5apA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id m37si12575336plg.444.2017.11.27.07.42.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Nov 2017 07:42:13 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 609056E308; Mon, 27 Nov 2017 15:42:05 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 47A316E2FD for ; Mon, 27 Nov 2017 15:42:01 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 75FEC213E3; Mon, 27 Nov 2017 16:42:00 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id 3D6F3213E0; Mon, 27 Nov 2017 16:42:00 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v2 02/18] drm/panel: lvds: Add support for the power-supply property Date: Mon, 27 Nov 2017 16:41:26 +0100 Message-Id: <56a41d54acf87cdb2dc6f7e816f13816a66e2697.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , jernej.skrabec@siol.net, plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" A significant number of panels need to power up a regulator in order to operate properly. Add support for the power-supply property to enable and disable such a regulator whenever needed. Reviewed-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- drivers/gpu/drm/panel/panel-lvds.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-lvds.c b/drivers/gpu/drm/panel/panel-lvds.c index e2d57c01200b..57e38a9e7ab4 100644 --- a/drivers/gpu/drm/panel/panel-lvds.c +++ b/drivers/gpu/drm/panel/panel-lvds.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -39,6 +40,7 @@ struct panel_lvds { bool data_mirror; struct backlight_device *backlight; + struct regulator *supply; struct gpio_desc *enable_gpio; struct gpio_desc *reset_gpio; @@ -69,6 +71,9 @@ static int panel_lvds_unprepare(struct drm_panel *panel) if (lvds->enable_gpio) gpiod_set_value_cansleep(lvds->enable_gpio, 0); + if (lvds->supply) + regulator_disable(lvds->supply); + return 0; } @@ -76,6 +81,17 @@ static int panel_lvds_prepare(struct drm_panel *panel) { struct panel_lvds *lvds = to_panel_lvds(panel); + if (lvds->supply) { + int err; + + err = regulator_enable(lvds->supply); + if (err < 0) { + dev_err(lvds->dev, "failed to enable supply: %d\n", + err); + return err; + } + } + if (lvds->enable_gpio) gpiod_set_value_cansleep(lvds->enable_gpio, 1); @@ -196,6 +212,13 @@ static int panel_lvds_probe(struct platform_device *pdev) if (ret < 0) return ret; + lvds->supply = devm_regulator_get_optional(lvds->dev, "power"); + if (IS_ERR(lvds->supply)) { + ret = PTR_ERR(lvds->supply); + dev_err(lvds->dev, "failed to request regulator: %d\n", ret); + return ret; + } + /* Get GPIOs and backlight controller. */ lvds->enable_gpio = devm_gpiod_get_optional(lvds->dev, "enable", GPIOD_OUT_LOW); From patchwork Mon Nov 27 15:41:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119733 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp438359qgn; Mon, 27 Nov 2017 07:42:39 -0800 (PST) X-Google-Smtp-Source: AGs4zMYieQD5gJU3rOdk1/zmnGoL0YGbeY1sC3LwViH5SZUFpu8obkpv756PE5VDg+Sl5qVxD/W6 X-Received: by 10.98.67.78 with SMTP id q75mr22229222pfa.110.1511797359043; Mon, 27 Nov 2017 07:42:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797359; cv=none; d=google.com; s=arc-20160816; b=cgU4+KAMGBCnnc1lb8EcEfuO8et8TK4GU1ApW74mtw4Sjgg1QQ5K0xFHd/ipr/nQL1 8ZS7zYMkq7DDQ/jXEES1CctSxSH1uY4hkNNfGHcQ93YnFKXHuHV1OEdBLwelgmdl5n8I Sa6aoCFwYKaFhooOiTPggwfrbBacpoeQMuv1k+m2lPdgO1CXh8Y0R2LYuCwzKhpGLhkE 4OSMe6sWVbxqUN5yWbM2/8Ydam1cAMp3I+CCMVEyHh2abbsGwtouqYi3HrsxP37kon/U AM51f+hN6pD3ZJ962CKUlDAqPci2UqsKGBqwGoAcgQj/lN74Kkgnii3jT8rBIWdR5YYr Q6jA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=ASWJK3nSmXSHXswZ73FspN86FpVi48qss3/QkoiU6N0=; b=QS+KTQc1Mj2yKw3goFAwcbl+fIKMzjvtbWphiORZ1mmv2mAMbNYI62zqzeU5khwBwQ lTlCapB6uMIr+TTN5ieAENiitj4MnaUnZFhkiLl4h0lrjIfDDHH3TPh3p/xvyH77R1wy ZCrxK6jldKE3aCHyMREAraU6MhODsjHQet1I51znDUkVdGvRS4mT2e9TTHGRqjuheYEz 6uC9nwS+381Yp4RmHAU9Ou3QHsrx3aQNcM+VGrNa3u7dRZGdcwBYwtYxIDyKr8bJtlLz WlpqgFIWX1Zer/z9463hgKa1dlBmU1/4zjN83xbtTH6hmiTDK0Ud5QQITN1spPw4iyBQ 1z+w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id n9si22843904pgq.423.2017.11.27.07.42.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Nov 2017 07:42:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 172606E307; Mon, 27 Nov 2017 15:42:05 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 1D18F6E300 for ; Mon, 27 Nov 2017 15:42:02 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 02931213E0; Mon, 27 Nov 2017 16:42:01 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id C2F03213E2; Mon, 27 Nov 2017 16:42:00 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v2 03/18] dt-bindings: display: sun4i-drm: Add LVDS properties Date: Mon, 27 Nov 2017 16:41:27 +0100 Message-Id: <334876623ff427d34495571a8deae30d28c62f16.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , jernej.skrabec@siol.net, plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Some clocks and resets supposed to drive the LVDS logic in the display engine have been overlooked when the driver was first introduced. Add those additional resources to the binding, and we'll deal with the ABI stability in the code. Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 8 +++++++- 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 50cc72ee1168..d4259a4f5171 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -121,6 +121,14 @@ Required properties: On SoCs other than the A33 and V3s, there is one more clock required: - 'tcon-ch1': The clock driving the TCON channel 1 +On SoCs that support LVDS (all SoCs but the A13, H3, H5 and V3s), you +need one more reset line: + - 'lvds': The reset line driving the LVDS logic + +And on the SoCs newer than the A31 (sun6i and sun8i families), you +need one more clock line: + - 'lvds-pll': The PLL that can be used to drive the LVDS clock + DRC --- From patchwork Mon Nov 27 15:41:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119734 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp438524qgn; Mon, 27 Nov 2017 07:42:47 -0800 (PST) X-Google-Smtp-Source: AGs4zMaTLtt2SS5jRmWOD6JFZ3wloRG5jhznTIVHkP7dHHCgYpXx8Lx6moEy7+tQooW1VJsIzQad X-Received: by 10.159.216.131 with SMTP id s3mr38361748plp.432.1511797367630; Mon, 27 Nov 2017 07:42:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797367; cv=none; d=google.com; s=arc-20160816; b=XYPcqqlCJtCefOKQiQHh/JwxlGAzdkWOvlAIZE4fAljIom5+PsUOJhzRmklnV22mAD no4BSSGhfEmU0RbUlrX62cZ+Gr5bbsOolmqYSBJ3f1Hnw9jE2aaNO83MzScqkzlb4NW9 Jn27QTOoXKidfa3PVmkDAemEHdANQ4d8APUedFYhJ9g6tWtU7J5+bTTrVRESa3w8bP/a gIlITsBRCHQ4gXiAbmyfzdNl5gDLrIX2577j7mOR8LZrfqQrBLbt/6duEEsH4++Mc0iZ w4uMDcPOMOU+v8kj6QwnoOtheqrRdgO7Ccj0IyOF5DHPjL3oiqvttYJ7vqVUT6LMXGYO iG5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=t8kvVDRnloM+26UJc2D+kTDItOkkfrluYiaMxxFGHv0=; b=xwfYfAG5tAgCq71Jua98JKBez9xzjpZ1g4ToLaVdyKsOK19A8rmneGEvxZgxQ7H/F+ OOVDAtmpoj2/Ip/SaIX0eZApwFnUxi/XfhfJ0ysJWqCKS/Ujs+vqiIkMZ2jaEArdkhw+ wNYPxqVDRbFx+oBgjcJRyQ2MB4ubhRurnQy/ljZ5aEA1BAkHek+28t2Tjb5W1kYKcOeP KLTfDW2Q1sWdYDrsgYB8DXpCosWQWghIfpQN6mbnF4AfJ64SUd/r1t3hTINcKQLrYART unSfWU0rhFY1xkij2CXORPvKxQtAzkhys26uIfVmDstPuXjqezVGHIvl25CoaJWyv/IR CmdA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id z18si23429499pge.375.2017.11.27.07.42.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Nov 2017 07:42:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3B4526E319; Mon, 27 Nov 2017 15:42:08 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id AD31C6E305 for ; Mon, 27 Nov 2017 15:42:02 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 91FA8213EC; Mon, 27 Nov 2017 16:42:01 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id 60B57213E2; Mon, 27 Nov 2017 16:42:01 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v2 04/18] drm/sun4i: Fix error path handling Date: Mon, 27 Nov 2017 16:41:28 +0100 Message-Id: <9dcb9aab9969c28dd32f8c3599091e3c4c4682ca.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , jernej.skrabec@siol.net, plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , stable@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The commit 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap initialization sequence") moved a bunch of logic around, but forgot to update the gotos after the introduction of the err_free_dotclock label. It means that if we fail later that the one introduced in that commit, we'll just to the old label which isn't free the clock we created. This will result in a breakage as soon as someone tries to do something with that clock, since its resources will have been long reclaimed. Cc: Fixes: 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap initialization sequence") Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index e122f5b2a395..f4284b51bdca 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -724,12 +724,12 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master, if (IS_ERR(tcon->crtc)) { dev_err(dev, "Couldn't create our CRTC\n"); ret = PTR_ERR(tcon->crtc); - goto err_free_clocks; + goto err_free_dotclock; } ret = sun4i_rgb_init(drm, tcon); if (ret < 0) - goto err_free_clocks; + goto err_free_dotclock; if (tcon->quirks->needs_de_be_mux) { /* From patchwork Mon Nov 27 15:41:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119738 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp439054qgn; Mon, 27 Nov 2017 07:43:13 -0800 (PST) X-Google-Smtp-Source: AGs4zMaDNu9WMMDwrk1pQb+tGBQ9UFBtIUkrYPQZjUbmPwdUs6NtAo/ZT9UiAR4WOhtSE7ZVhbGf X-Received: by 10.101.100.65 with SMTP id s1mr37340351pgv.185.1511797393098; Mon, 27 Nov 2017 07:43:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797393; cv=none; d=google.com; s=arc-20160816; b=xAGgGu8MpSdVoB8fGxe+WfHHHv8mRUnuWqiNEjRvs8CyLCNGjihm/VxaQI6Q5bMnH4 nsZ6Vxim/w1rSr7Tw6/l9uW4SXMxHdMTFaWz49J7WyDgs7lDSEIvsXQA1UOWpHxo0Dzh KYElnH3KVdRy4lezlpepo7I5tB9i4+hvWvZv4nARNg4Qx7c4cGOwG3XLtnwktbrbC7C6 vhwUuoWsyVwlINLGLS7fByBGQX5q8B1ic+w+gySXK+3DELAjw6SFBhDQrseVs8oCDN4J CaKW8sbgY/4AWJ+T2AQdff11uW3lYsb0F+A1ikZ9q4ahBvCVlR59eKwXJuyAkJuuPFPI PO3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=nWIuQfRzPrwoV6uVxL4cQvc+H548EEwDWF9XnTafyhE=; b=N1FKVMzX4gmnejxh01oOjysWqBc6s1px0TsSyb/sswNprOXR8QGYOAtusnp57nY6lL N6fX5R4gMkAhad8z9nBWE63ne1Gp8wJyDVzbEbCMJ1L8EHAPdwlR4QwGsRKeRGbSvJti BBuWjfPMXXM9wvMJvZfeb1F/4zUj3z0+i8RFJY1w8eegzuOKk7/W5X5mXuhbd2oj3IrP zBqQkLCqlc3W4mALnTOzLN5w88QGHulY45lbNsyRW3kAKwgZyK1QqP6A8aZJkanbQxQ+ hHDDHIBdkae0eoSoQ4/d2rxp1bi4zrEnXnuCfcMfOdv98091pCBhB3tCinpC0PxRJ3Ix 9PfA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id w4si24056698plp.452.2017.11.27.07.43.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Nov 2017 07:43:13 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DEAEF6E317; Mon, 27 Nov 2017 15:42:07 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 474EB6E305 for ; Mon, 27 Nov 2017 15:42:03 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 2B586213EE; Mon, 27 Nov 2017 16:42:02 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id EECF2213EB; Mon, 27 Nov 2017 16:42:01 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v2 05/18] drm/sun4i: Force the mixer rate at 150MHz Date: Mon, 27 Nov 2017 16:41:29 +0100 Message-Id: <55becb3a86a0a28ccca3f7c831ac6f6cf4854390.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , jernej.skrabec@siol.net, plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" It seems like the mixer can only run properly when clocked at 150MHz. In order to have something more robust than simply a fire-and-forget assigned-clocks-rate, let's put that in the code. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index cb193c5f1686..c0cdccf772a2 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -315,6 +315,13 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, } clk_prepare_enable(mixer->mod_clk); + /* + * It seems that we need to enforce that rate for whatever + * reason for the mixer to be functional. Make sure it's the + * case. + */ + clk_set_rate(mixer->mod_clk, 150000000); + list_add_tail(&mixer->engine.list, &drv->engine_list); /* Reset the registers */ From patchwork Mon Nov 27 15:41:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119731 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp438179qgn; Mon, 27 Nov 2017 07:42:30 -0800 (PST) X-Google-Smtp-Source: AGs4zMahadVG2kSPsEx/wNiKNsgZkwP/uj43kZWuRh/Hxa5iyQdzrzfOCFe/9p9iFy7FMckjAxLP X-Received: by 10.84.172.1 with SMTP id m1mr39568802plb.174.1511797350602; Mon, 27 Nov 2017 07:42:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797350; cv=none; d=google.com; s=arc-20160816; b=mGfK03wWY82hVNUUwR5wmqAE04I3MvTbaxDpc9cc5k8gr1rjPNSNDGT+iFP6he031d VJ+Nk43hjZj50rAUN24k4ysgy0F3j5NXWd/XhIQphTWQ6qlwTJjsQfR9NZmXNK7oAhy3 Q6NkyGhCfRIWyeOXexkCOQMIJEzAxz6/CWpCUeJR2VmtDtgcAtL+W6RzfMEpTgc4DrTp H2ARTXtsyx52twPFL0MUl0PKCDJlMq29JY+qegeImdNm5luK+BkBIi9OLc55CMfNsfmf oRIkIA5u/QmhQBKQy0I6xqqao3/Dgdtxgb1c/nPI69hG9oSxmypvgx7hcxPZ7sd8+Zta Fx/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=ysbFCd3FPYdIDi1d1VkW5B2vHu6PN8ZhxPPQBn+xjYk=; b=iG/+WkPi58GgkcZlXB3BB6Plec9uu+28VEeCtKE2OjWTA5kAY2W4rbJU/ax7TMPUAs 6fsLT0p6th63v6hvqNPz9iSZN5QyFmdJZS0WMAJ9pAS/nHt3/AWr7zdJ+iXGuKrDhlz7 IDwIzsQJnyqwaxXuuc8SbAziFjqE6JcG44yVJdFuWqDPptvw2B011xNzewHUhyB2PsnQ OCQqwoKfdkKy8DQv1Mp+JCLrOsx/JvYIwHyA/2WGh+0pg/cXUtNwM3TfUgFcciQiSBtP d50Mo3POjV/bU30kMMqHAgwT7a2S7t26qPCHRA1F5hwUoF5BqHUCftHwW6yHAZ6CBvjP srNA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id i8si15967738pll.783.2017.11.27.07.42.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Nov 2017 07:42:30 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 14F946E311; Mon, 27 Nov 2017 15:42:06 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 299F76E307 for ; Mon, 27 Nov 2017 15:42:04 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 572A4213F4; Mon, 27 Nov 2017 16:42:03 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id 1EA81213F2; Mon, 27 Nov 2017 16:42:03 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v2 07/18] drm/sun4i: sun8i: Rework the UI channels code Date: Mon, 27 Nov 2017 16:41:31 +0100 Message-Id: <38e9e5efac848777c59b4662b2b5440d275f3bb4.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , jernej.skrabec@siol.net, plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The current code makes the assumption that the only channel we want to use for the first (and only) UI channel is the number of VI channels (so last VI + 1), which is accurate. However, it does so in pretty much every plane-related function using a local variable that makes it quite difficult to rework when we'll have to deal with multiple UI channels. Refactor the current code a bit to associate the ID of the channel to the sun8i_ui structure directly, and have all our callbacks use that instead. As the current code registers only one UI channel, we'll fill that field with the same value that was there before (ie number of VI channels), but this time we'll only have to change it where the planes are instatiated, and not in the whole code. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 43 +++++++++++++----------------- drivers/gpu/drm/sun4i/sun8i_mixer.h | 12 ++++---- drivers/gpu/drm/sun4i/sun8i_ui.c | 12 ++++---- drivers/gpu/drm/sun4i/sun8i_ui.h | 1 +- 4 files changed, 34 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index f503bd000893..648a6ad3104a 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -37,14 +37,12 @@ static void sun8i_mixer_commit(struct sunxi_engine *engine) SUN8I_MIXER_GLOBAL_DBUFF_ENABLE); } -void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, - int layer, bool enable) +void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, struct sun8i_ui *ui, + bool enable) { u32 val; - /* Currently the first UI channel is used */ - int chan = mixer->cfg->vi_num; - DRM_DEBUG_DRIVER("Enabling layer %d in channel %d\n", layer, chan); + DRM_DEBUG_DRIVER("Enabling layer %d in channel %d\n", ui->id, ui->chan); if (enable) val = SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN; @@ -52,16 +50,16 @@ void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, val = 0; regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_ATTR(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ui->chan, ui->id), SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN, val); /* Set the alpha configuration */ regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_ATTR(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ui->chan, ui->id), SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_MASK, SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_DEF); regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_ATTR(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ui->chan, ui->id), SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MASK, SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_DEF); } @@ -90,14 +88,13 @@ static int sun8i_mixer_drm_format_to_layer(struct drm_plane *plane, } int sun8i_mixer_update_layer_coord(struct sun8i_mixer *mixer, - int layer, struct drm_plane *plane) + struct sun8i_ui *ui) { + struct drm_plane *plane = &ui->plane; struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; - /* Currently the first UI channel is used */ - int chan = mixer->cfg->vi_num; - DRM_DEBUG_DRIVER("Updating layer %d\n", layer); + DRM_DEBUG_DRIVER("Updating layer %d\n", ui->id); if (plane->type == DRM_PLANE_TYPE_PRIMARY) { DRM_DEBUG_DRIVER("Primary layer, updating global size W: %u H: %u\n", @@ -115,7 +112,7 @@ int sun8i_mixer_update_layer_coord(struct sun8i_mixer *mixer, state->crtc_h)); DRM_DEBUG_DRIVER("Updating channel size\n"); regmap_write(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_OVL_SIZE(chan), + SUN8I_MIXER_CHAN_UI_OVL_SIZE(ui->chan), SUN8I_MIXER_SIZE(state->crtc_w, state->crtc_h)); } @@ -123,35 +120,34 @@ int sun8i_mixer_update_layer_coord(struct sun8i_mixer *mixer, /* Set the line width */ DRM_DEBUG_DRIVER("Layer line width: %d bytes\n", fb->pitches[0]); regmap_write(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_PITCH(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ui->chan, ui->id), fb->pitches[0]); /* Set height and width */ DRM_DEBUG_DRIVER("Layer size W: %u H: %u\n", state->crtc_w, state->crtc_h); regmap_write(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_SIZE(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ui->chan, ui->id), SUN8I_MIXER_SIZE(state->crtc_w, state->crtc_h)); /* Set base coordinates */ DRM_DEBUG_DRIVER("Layer coordinates X: %d Y: %d\n", state->crtc_x, state->crtc_y); regmap_write(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_COORD(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_COORD(ui->chan, ui->id), SUN8I_MIXER_COORD(state->crtc_x, state->crtc_y)); return 0; } int sun8i_mixer_update_layer_formats(struct sun8i_mixer *mixer, - int layer, struct drm_plane *plane) + struct sun8i_ui *ui) { + struct drm_plane *plane = &ui->plane; struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; bool interlaced = false; u32 val; - /* Currently the first UI channel is used */ - int chan = mixer->cfg->vi_num; int ret; if (plane->state->crtc) @@ -174,21 +170,20 @@ int sun8i_mixer_update_layer_formats(struct sun8i_mixer *mixer, } regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_ATTR(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ui->chan, ui->id), SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK, val); return 0; } int sun8i_mixer_update_layer_buffer(struct sun8i_mixer *mixer, - int layer, struct drm_plane *plane) + struct sun8i_ui *ui) { + struct drm_plane *plane = &ui->plane; struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; struct drm_gem_cma_object *gem; dma_addr_t paddr; - /* Currently the first UI channel is used */ - int chan = mixer->cfg->vi_num; int bpp; /* Get the physical address of the buffer in memory */ @@ -220,7 +215,7 @@ int sun8i_mixer_update_layer_buffer(struct sun8i_mixer *mixer, DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr); regmap_write(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(chan, layer), + SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ui->chan, ui->id), lower_32_bits(paddr)); return 0; diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index 4785ac090b8c..ce984c436246 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -104,6 +104,8 @@ #define SUN8I_MIXER_FCC_EN 0xaa000 #define SUN8I_MIXER_DCSC_EN 0xb0000 +struct sun8i_ui; + struct sun8i_mixer_cfg { int vi_num; int ui_num; @@ -126,12 +128,12 @@ engine_to_sun8i_mixer(struct sunxi_engine *engine) return container_of(engine, struct sun8i_mixer, engine); } -void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, - int layer, bool enable); +void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, struct sun8i_ui *ui, + bool enable); int sun8i_mixer_update_layer_coord(struct sun8i_mixer *mixer, - int layer, struct drm_plane *plane); + struct sun8i_ui *ui); int sun8i_mixer_update_layer_formats(struct sun8i_mixer *mixer, - int layer, struct drm_plane *plane); + struct sun8i_ui *ui); int sun8i_mixer_update_layer_buffer(struct sun8i_mixer *mixer, - int layer, struct drm_plane *plane); + struct sun8i_ui *ui); #endif /* _SUN8I_MIXER_H_ */ diff --git a/drivers/gpu/drm/sun4i/sun8i_ui.c b/drivers/gpu/drm/sun4i/sun8i_ui.c index 3986cb08509c..edc65d9df598 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui.c @@ -32,7 +32,7 @@ static void sun8i_mixer_ui_atomic_disable(struct drm_plane *plane, struct sun8i_ui *ui = plane_to_sun8i_ui(plane); struct sun8i_mixer *mixer = ui->mixer; - sun8i_mixer_layer_enable(mixer, ui->id, false); + sun8i_mixer_layer_enable(mixer, ui, false); } static void sun8i_mixer_ui_atomic_update(struct drm_plane *plane, @@ -41,10 +41,10 @@ static void sun8i_mixer_ui_atomic_update(struct drm_plane *plane, struct sun8i_ui *ui = plane_to_sun8i_ui(plane); struct sun8i_mixer *mixer = ui->mixer; - sun8i_mixer_update_layer_coord(mixer, ui->id, plane); - sun8i_mixer_update_layer_formats(mixer, ui->id, plane); - sun8i_mixer_update_layer_buffer(mixer, ui->id, plane); - sun8i_mixer_layer_enable(mixer, ui->id, true); + sun8i_mixer_update_layer_coord(mixer, ui); + sun8i_mixer_update_layer_formats(mixer, ui); + sun8i_mixer_update_layer_buffer(mixer, ui); + sun8i_mixer_layer_enable(mixer, ui, true); } static struct drm_plane_helper_funcs sun8i_mixer_ui_helper_funcs = { @@ -126,6 +126,8 @@ struct drm_plane **sun8i_ui_init(struct drm_device *drm, return ERR_CAST(ui); }; + /* TODO: Support several UI channels */ + ui->chan = mixer->cfg->vi_num; ui->id = i; planes[i] = &ui->plane; }; diff --git a/drivers/gpu/drm/sun4i/sun8i_ui.h b/drivers/gpu/drm/sun4i/sun8i_ui.h index 17dfc92ccc9f..3c3185878ad1 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui.h +++ b/drivers/gpu/drm/sun4i/sun8i_ui.h @@ -22,6 +22,7 @@ struct sun8i_ui { struct drm_plane plane; struct sun4i_drv *drv; struct sun8i_mixer *mixer; + u8 chan; int id; }; From patchwork Mon Nov 27 15:41:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119721 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp437489qgn; Mon, 27 Nov 2017 07:41:58 -0800 (PST) X-Google-Smtp-Source: AGs4zMbhZc5LuqbeEcLiE41exm8Pr1ciZr92uQJbyhFb6HtIzecbXkI44HT6aj9WvED7EHfhnozW X-Received: by 10.84.151.69 with SMTP id i63mr38096995pli.61.1511797318387; Mon, 27 Nov 2017 07:41:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797318; cv=none; d=google.com; s=arc-20160816; b=GZ5OQTvzB+rvzkqaVd1NVpxmOZBG6QjwYUNjDJN74PyIE6hgSOcZxsrHj4xPHtASMQ kjU5fFQb77Pfv3gFlec4sJpjOqslJnn/55PIfUKilyTpSzlYPd2W4YTK8x3DjxG+PjAK 9e2L/uiNVJsBJzsEaHtnDzF2YLFN9Hy0OXQUMKN9Bmm0XWOZ3pw1UsnTe0EE8p5+IHbq /9RIpxE0H45w7/8dP1PO71AJA4wyiVF6sAmO9AAZ6H+AVmTbNi9bh54MtLOX0KfqMIU3 +30a6x8owCZ5rRZNA8uYdKknOl8vzqoQK7TUS9QJsIs3AFnXQw2YOfY9u6bjsPxeaOJS j1Vw== ARC-Message-Signature: i=1; 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[131.252.210.177]) by mx.google.com with ESMTPS id v14si24702695plo.86.2017.11.27.07.41.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Nov 2017 07:41:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2BA096E2F6; Mon, 27 Nov 2017 15:41:57 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id DD2386E2F6 for ; Mon, 27 Nov 2017 15:41:55 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id B62D2207AF; Mon, 27 Nov 2017 16:41:54 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id 7527720742; Mon, 27 Nov 2017 16:41:54 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v2 10/18] drm/sun4i: Add LVDS support Date: Mon, 27 Nov 2017 16:41:34 +0100 Message-Id: <014b61c48e458f79bf90ef787d5f1ddf7e54ce50.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , jernej.skrabec@siol.net, plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The TCON supports the LVDS interface to output to a panel or a bridge. Let's add support for it. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/Makefile | 1 +- drivers/gpu/drm/sun4i/sun4i_lvds.c | 183 +++++++++++++++++++++++- drivers/gpu/drm/sun4i/sun4i_lvds.h | 18 ++- drivers/gpu/drm/sun4i/sun4i_tcon.c | 238 +++++++++++++++++++++++++++++- drivers/gpu/drm/sun4i/sun4i_tcon.h | 29 ++++- 5 files changed, 467 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.c create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.h diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile index 241cce172728..cd7e0016aaa8 100644 --- a/drivers/gpu/drm/sun4i/Makefile +++ b/drivers/gpu/drm/sun4i/Makefile @@ -13,6 +13,7 @@ sun8i-mixer-y += sun8i_mixer.o sun8i_ui.o sun4i-tcon-y += sun4i_crtc.o sun4i-tcon-y += sun4i_dotclock.o +sun4i-tcon-y += sun4i_lvds.o sun4i-tcon-y += sun4i_tcon.o sun4i-tcon-y += sun4i_rgb.o diff --git a/drivers/gpu/drm/sun4i/sun4i_lvds.c b/drivers/gpu/drm/sun4i/sun4i_lvds.c new file mode 100644 index 000000000000..635a3f505ecb --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun4i_lvds.c @@ -0,0 +1,183 @@ +/* + * Copyright (C) 2015 NextThing Co + * Copyright (C) 2015-2017 Free Electrons + * + * Maxime Ripard + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#include + +#include +#include +#include +#include +#include + +#include "sun4i_crtc.h" +#include "sun4i_tcon.h" +#include "sun4i_lvds.h" + +struct sun4i_lvds { + struct drm_connector connector; + struct drm_encoder encoder; + + struct sun4i_tcon *tcon; +}; + +static inline struct sun4i_lvds * +drm_connector_to_sun4i_lvds(struct drm_connector *connector) +{ + return container_of(connector, struct sun4i_lvds, + connector); +} + +static inline struct sun4i_lvds * +drm_encoder_to_sun4i_lvds(struct drm_encoder *encoder) +{ + return container_of(encoder, struct sun4i_lvds, + encoder); +} + +static int sun4i_lvds_get_modes(struct drm_connector *connector) +{ + struct sun4i_lvds *lvds = + drm_connector_to_sun4i_lvds(connector); + struct sun4i_tcon *tcon = lvds->tcon; + + return drm_panel_get_modes(tcon->panel); +} + +static struct drm_connector_helper_funcs sun4i_lvds_con_helper_funcs = { + .get_modes = sun4i_lvds_get_modes, +}; + +static void +sun4i_lvds_connector_destroy(struct drm_connector *connector) +{ + struct sun4i_lvds *lvds = drm_connector_to_sun4i_lvds(connector); + struct sun4i_tcon *tcon = lvds->tcon; + + drm_panel_detach(tcon->panel); + drm_connector_cleanup(connector); +} + +static const struct drm_connector_funcs sun4i_lvds_con_funcs = { + .fill_modes = drm_helper_probe_single_connector_modes, + .destroy = sun4i_lvds_connector_destroy, + .reset = drm_atomic_helper_connector_reset, + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, +}; + +static void sun4i_lvds_encoder_enable(struct drm_encoder *encoder) +{ + struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder); + struct sun4i_tcon *tcon = lvds->tcon; + + DRM_DEBUG_DRIVER("Enabling LVDS output\n"); + + if (!IS_ERR(tcon->panel)) { + drm_panel_prepare(tcon->panel); + drm_panel_enable(tcon->panel); + } +} + +static void sun4i_lvds_encoder_disable(struct drm_encoder *encoder) +{ + struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder); + struct sun4i_tcon *tcon = lvds->tcon; + + DRM_DEBUG_DRIVER("Disabling LVDS output\n"); + + if (!IS_ERR(tcon->panel)) { + drm_panel_disable(tcon->panel); + drm_panel_unprepare(tcon->panel); + } +} + +static const struct drm_encoder_helper_funcs sun4i_lvds_enc_helper_funcs = { + .disable = sun4i_lvds_encoder_disable, + .enable = sun4i_lvds_encoder_enable, +}; + +static const struct drm_encoder_funcs sun4i_lvds_enc_funcs = { + .destroy = drm_encoder_cleanup, +}; + +int sun4i_lvds_init(struct drm_device *drm, struct sun4i_tcon *tcon) +{ + struct drm_encoder *encoder; + struct drm_bridge *bridge; + struct sun4i_lvds *lvds; + int ret; + + lvds = devm_kzalloc(drm->dev, sizeof(*lvds), GFP_KERNEL); + if (!lvds) + return -ENOMEM; + lvds->tcon = tcon; + encoder = &lvds->encoder; + + ret = drm_of_find_panel_or_bridge(tcon->dev->of_node, 1, 0, + &tcon->panel, &bridge); + if (ret) { + dev_info(drm->dev, "No panel or bridge found... LVDS output disabled\n"); + return 0; + } + + drm_encoder_helper_add(&lvds->encoder, + &sun4i_lvds_enc_helper_funcs); + ret = drm_encoder_init(drm, + &lvds->encoder, + &sun4i_lvds_enc_funcs, + DRM_MODE_ENCODER_LVDS, + NULL); + if (ret) { + dev_err(drm->dev, "Couldn't initialise the lvds encoder\n"); + goto err_out; + } + + /* The LVDS encoder can only work with the TCON channel 0 */ + lvds->encoder.possible_crtcs = BIT(drm_crtc_index(&tcon->crtc->crtc)); + + if (tcon->panel) { + drm_connector_helper_add(&lvds->connector, + &sun4i_lvds_con_helper_funcs); + ret = drm_connector_init(drm, &lvds->connector, + &sun4i_lvds_con_funcs, + DRM_MODE_CONNECTOR_LVDS); + if (ret) { + dev_err(drm->dev, "Couldn't initialise the lvds connector\n"); + goto err_cleanup_connector; + } + + drm_mode_connector_attach_encoder(&lvds->connector, + &lvds->encoder); + + ret = drm_panel_attach(tcon->panel, &lvds->connector); + if (ret) { + dev_err(drm->dev, "Couldn't attach our panel\n"); + goto err_cleanup_connector; + } + } + + if (bridge) { + ret = drm_bridge_attach(encoder, bridge, NULL); + if (ret) { + dev_err(drm->dev, "Couldn't attach our bridge\n"); + goto err_cleanup_connector; + } + } + + return 0; + +err_cleanup_connector: + drm_encoder_cleanup(&lvds->encoder); +err_out: + return ret; +} +EXPORT_SYMBOL(sun4i_lvds_init); diff --git a/drivers/gpu/drm/sun4i/sun4i_lvds.h b/drivers/gpu/drm/sun4i/sun4i_lvds.h new file mode 100644 index 000000000000..1b8fad4b82c3 --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun4i_lvds.h @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2015 NextThing Co + * Copyright (C) 2015-2017 Free Electrons + * + * Maxime Ripard + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#ifndef _SUN4I_LVDS_H_ +#define _SUN4I_LVDS_H_ + +int sun4i_lvds_init(struct drm_device *drm, struct sun4i_tcon *tcon); + +#endif /* _SUN4I_LVDS_H_ */ diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 5b6cd7c43e4b..46ce6daa0b1a 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -31,10 +31,52 @@ #include "sun4i_crtc.h" #include "sun4i_dotclock.h" #include "sun4i_drv.h" +#include "sun4i_lvds.h" #include "sun4i_rgb.h" #include "sun4i_tcon.h" #include "sunxi_engine.h" +static struct drm_connector *sun4i_tcon_get_connector(const struct drm_encoder *encoder) +{ + struct drm_connector *connector; + struct drm_connector_list_iter iter; + + drm_connector_list_iter_begin(encoder->dev, &iter); + drm_for_each_connector_iter(connector, &iter) + if (connector->encoder == encoder) { + drm_connector_list_iter_end(&iter); + return connector; + } + drm_connector_list_iter_end(&iter); + + return NULL; +} + +static int sun4i_tcon_get_pixel_depth(const struct drm_encoder *encoder) +{ + struct drm_connector *connector; + struct drm_display_info *info; + + connector = sun4i_tcon_get_connector(encoder); + if (!connector) + return -EINVAL; + + info = &connector->display_info; + if (info->num_bus_formats != 1) + return -EINVAL; + + switch (info->bus_formats[0]) { + case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG: + return 18; + + case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA: + case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG: + return 24; + } + + return -EINVAL; +} + static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel, bool enabled) { @@ -65,13 +107,58 @@ static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel, clk_disable_unprepare(clk); } +static void sun4i_tcon_lvds_set_status(struct sun4i_tcon *tcon, + const struct drm_encoder *encoder, + bool enabled) +{ + if (enabled) { + u8 val; + + regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_IF_REG, + SUN4I_TCON0_LVDS_IF_EN, + SUN4I_TCON0_LVDS_IF_EN); + + regmap_write(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, + SUN4I_TCON0_LVDS_ANA0_C(2) | + SUN4I_TCON0_LVDS_ANA0_V(3) | + SUN4I_TCON0_LVDS_ANA0_PD(2) | + SUN4I_TCON0_LVDS_ANA0_EN_LDO); + udelay(2); + + regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, + SUN4I_TCON0_LVDS_ANA0_EN_MB, + SUN4I_TCON0_LVDS_ANA0_EN_MB); + udelay(2); + + regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, + SUN4I_TCON0_LVDS_ANA0_EN_DRVC, + SUN4I_TCON0_LVDS_ANA0_EN_DRVC); + + if (sun4i_tcon_get_pixel_depth(encoder) == 18) + val = 7; + else + val = 0xf; + + regmap_write_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, + SUN4I_TCON0_LVDS_ANA0_EN_DRVD(0xf), + SUN4I_TCON0_LVDS_ANA0_EN_DRVD(val)); + } else { + regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_IF_REG, + SUN4I_TCON0_LVDS_IF_EN, 0); + } +} + void sun4i_tcon_set_status(struct sun4i_tcon *tcon, const struct drm_encoder *encoder, bool enabled) { + bool is_lvds = false; int channel; switch (encoder->encoder_type) { + case DRM_MODE_ENCODER_LVDS: + is_lvds = true; + /* Fallthrough */ case DRM_MODE_ENCODER_NONE: channel = 0; break; @@ -84,10 +171,16 @@ void sun4i_tcon_set_status(struct sun4i_tcon *tcon, return; } + if (is_lvds && !enabled) + sun4i_tcon_lvds_set_status(tcon, encoder, false); + regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG, SUN4I_TCON_GCTL_TCON_ENABLE, enabled ? SUN4I_TCON_GCTL_TCON_ENABLE : 0); + if (is_lvds && enabled) + sun4i_tcon_lvds_set_status(tcon, encoder, true); + sun4i_tcon_channel_set_status(tcon, channel, enabled); } @@ -170,6 +263,78 @@ static void sun4i_tcon0_mode_set_common(struct sun4i_tcon *tcon, SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay)); } +static void sun4i_tcon0_mode_set_lvds(struct sun4i_tcon *tcon, + const struct drm_encoder *encoder, + const struct drm_display_mode *mode) +{ + unsigned int bp; + u8 clk_delay; + u32 reg, val = 0; + + tcon->dclk_min_div = 7; + tcon->dclk_max_div = 7; + sun4i_tcon0_mode_set_common(tcon, mode); + + /* Adjust clock delay */ + clk_delay = sun4i_tcon_get_clk_delay(mode, 0); + regmap_update_bits(tcon->regs, SUN4I_TCON0_CTL_REG, + SUN4I_TCON0_CTL_CLK_DELAY_MASK, + SUN4I_TCON0_CTL_CLK_DELAY(clk_delay)); + + /* + * This is called a backporch in the register documentation, + * but it really is the back porch + hsync + */ + bp = mode->crtc_htotal - mode->crtc_hsync_start; + DRM_DEBUG_DRIVER("Setting horizontal total %d, backporch %d\n", + mode->crtc_htotal, bp); + + /* Set horizontal display timings */ + regmap_write(tcon->regs, SUN4I_TCON0_BASIC1_REG, + SUN4I_TCON0_BASIC1_H_TOTAL(mode->htotal) | + SUN4I_TCON0_BASIC1_H_BACKPORCH(bp)); + + /* + * This is called a backporch in the register documentation, + * but it really is the back porch + hsync + */ + bp = mode->crtc_vtotal - mode->crtc_vsync_start; + DRM_DEBUG_DRIVER("Setting vertical total %d, backporch %d\n", + mode->crtc_vtotal, bp); + + /* Set vertical display timings */ + regmap_write(tcon->regs, SUN4I_TCON0_BASIC2_REG, + SUN4I_TCON0_BASIC2_V_TOTAL(mode->crtc_vtotal * 2) | + SUN4I_TCON0_BASIC2_V_BACKPORCH(bp)); + + reg = SUN4I_TCON0_LVDS_IF_CLK_SEL_TCON0 | + SUN4I_TCON0_LVDS_IF_DATA_POL_NORMAL | + SUN4I_TCON0_LVDS_IF_CLK_POL_NORMAL; + if (sun4i_tcon_get_pixel_depth(encoder) == 24) + reg |= SUN4I_TCON0_LVDS_IF_BITWIDTH_24BITS; + else + reg |= SUN4I_TCON0_LVDS_IF_BITWIDTH_18BITS; + + regmap_write(tcon->regs, SUN4I_TCON0_LVDS_IF_REG, reg); + + /* Setup the polarity of the various signals */ + if (!(mode->flags & DRM_MODE_FLAG_PHSYNC)) + val |= SUN4I_TCON0_IO_POL_HSYNC_POSITIVE; + + if (!(mode->flags & DRM_MODE_FLAG_PVSYNC)) + val |= SUN4I_TCON0_IO_POL_VSYNC_POSITIVE; + + regmap_write(tcon->regs, SUN4I_TCON0_IO_POL_REG, val); + + /* Map output pins to channel 0 */ + regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG, + SUN4I_TCON_GCTL_IOMAP_MASK, + SUN4I_TCON_GCTL_IOMAP_TCON0); + + /* Enable the output on the pins */ + regmap_write(tcon->regs, SUN4I_TCON0_IO_TRI_REG, 0xe0000000); +} + static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon, const struct drm_display_mode *mode) { @@ -336,6 +501,9 @@ void sun4i_tcon_mode_set(struct sun4i_tcon *tcon, const struct drm_display_mode *mode) { switch (encoder->encoder_type) { + case DRM_MODE_ENCODER_LVDS: + sun4i_tcon0_mode_set_lvds(tcon, encoder, mode); + break; case DRM_MODE_ENCODER_NONE: sun4i_tcon0_mode_set_rgb(tcon, mode); sun4i_tcon_set_mux(tcon, 0, encoder); @@ -667,7 +835,9 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master, struct drm_device *drm = data; struct sun4i_drv *drv = drm->dev_private; struct sunxi_engine *engine; + struct device_node *remote; struct sun4i_tcon *tcon; + bool has_lvds_rst, has_lvds_pll, can_lvds; int ret; engine = sun4i_tcon_find_engine(drv, dev->of_node); @@ -698,6 +868,54 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master, return ret; } + /* + * This can only be made optional since we've had DT nodes + * without the LVDS reset properties. + * + * If the property is missing, just disable LVDS, and print a + * warning. + */ + tcon->lvds_rst = devm_reset_control_get_optional(dev, "lvds"); + if (IS_ERR(tcon->lvds_rst)) { + dev_err(dev, "Couldn't get our reset line\n"); + return PTR_ERR(tcon->lvds_rst); + } else if (tcon->lvds_rst) { + has_lvds_rst = true; + reset_control_reset(tcon->lvds_rst); + } else { + has_lvds_rst = false; + } + + /* + * This can only be made optional since we've had DT nodes + * without the LVDS reset properties. + * + * If the property is missing, just disable LVDS, and print a + * warning. + */ + if (tcon->quirks->has_lvds_pll) { + tcon->lvds_pll = devm_clk_get(dev, "pll-lvds"); + if (IS_ERR(tcon->lvds_pll)) { + if (PTR_ERR(tcon->lvds_pll) == -ENOENT) { + has_lvds_pll = false; + } else { + dev_err(dev, "Couldn't get the LVDS PLL\n"); + return PTR_ERR(tcon->lvds_rst); + } + } else { + has_lvds_pll = true; + } + } + + if (!has_lvds_rst || (tcon->quirks->has_lvds_pll && !has_lvds_pll)) { + dev_warn(dev, + "Missing LVDS properties, Please upgrade your DT\n"); + dev_warn(dev, "LVDS output disabled\n"); + can_lvds = false; + } else { + can_lvds = true; + } + ret = sun4i_tcon_init_clocks(dev, tcon); if (ret) { dev_err(dev, "Couldn't init our TCON clocks\n"); @@ -729,7 +947,21 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master, goto err_free_dotclock; } - ret = sun4i_rgb_init(drm, tcon); + /* + * If we have an LVDS panel connected to the TCON, we should + * just probe the LVDS connector. Otherwise, just probe RGB as + * we used to. + */ + remote = of_graph_get_remote_node(dev->of_node, 1, 0); + if (of_device_is_compatible(remote, "panel-lvds")) + if (can_lvds) + ret = sun4i_lvds_init(drm, tcon); + else + ret = -EINVAL; + else + ret = sun4i_rgb_init(drm, tcon); + of_node_put(remote); + if (ret < 0) goto err_free_dotclock; @@ -879,12 +1111,14 @@ static const struct sun4i_tcon_quirks sun5i_a13_quirks = { static const struct sun4i_tcon_quirks sun6i_a31_quirks = { .has_channel_1 = true, + .has_lvds_pll = true, .needs_de_be_mux = true, .set_mux = sun6i_tcon_set_mux, }; static const struct sun4i_tcon_quirks sun6i_a31s_quirks = { .has_channel_1 = true, + .has_lvds_pll = true, .needs_de_be_mux = true, }; @@ -895,7 +1129,7 @@ static const struct sun4i_tcon_quirks sun7i_a20_quirks = { }; static const struct sun4i_tcon_quirks sun8i_a33_quirks = { - /* nothing is supported */ + .has_lvds_pll = true, }; static const struct sun4i_tcon_quirks sun8i_v3s_quirks = { diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index 4141fbd97ddf..0b4dc771167c 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h @@ -70,7 +70,21 @@ #define SUN4I_TCON0_TTL2_REG 0x78 #define SUN4I_TCON0_TTL3_REG 0x7c #define SUN4I_TCON0_TTL4_REG 0x80 + #define SUN4I_TCON0_LVDS_IF_REG 0x84 +#define SUN4I_TCON0_LVDS_IF_EN BIT(31) +#define SUN4I_TCON0_LVDS_IF_BITWIDTH_MASK BIT(26) +#define SUN4I_TCON0_LVDS_IF_BITWIDTH_18BITS (1 << 26) +#define SUN4I_TCON0_LVDS_IF_BITWIDTH_24BITS (0 << 26) +#define SUN4I_TCON0_LVDS_IF_CLK_SEL_MASK BIT(20) +#define SUN4I_TCON0_LVDS_IF_CLK_SEL_TCON0 (1 << 20) +#define SUN4I_TCON0_LVDS_IF_CLK_POL_MASK BIT(4) +#define SUN4I_TCON0_LVDS_IF_CLK_POL_NORMAL (1 << 4) +#define SUN4I_TCON0_LVDS_IF_CLK_POL_INV (0 << 4) +#define SUN4I_TCON0_LVDS_IF_DATA_POL_MASK GENMASK(3, 0) +#define SUN4I_TCON0_LVDS_IF_DATA_POL_NORMAL (0xf) +#define SUN4I_TCON0_LVDS_IF_DATA_POL_INV (0) + #define SUN4I_TCON0_IO_POL_REG 0x88 #define SUN4I_TCON0_IO_POL_DCLK_PHASE(phase) ((phase & 3) << 28) #define SUN4I_TCON0_IO_POL_HSYNC_POSITIVE BIT(25) @@ -131,6 +145,16 @@ #define SUN4I_TCON_CEU_RANGE_G_REG 0x144 #define SUN4I_TCON_CEU_RANGE_B_REG 0x148 #define SUN4I_TCON_MUX_CTRL_REG 0x200 + +#define SUN4I_TCON0_LVDS_ANA0_REG 0x220 +#define SUN4I_TCON0_LVDS_ANA0_EN_MB BIT(31) +#define SUN4I_TCON0_LVDS_ANA0_EN_LDO BIT(30) +#define SUN4I_TCON0_LVDS_ANA0_EN_DRVC BIT(24) +#define SUN4I_TCON0_LVDS_ANA0_EN_DRVD(x) (((x) & 0xf) << 20) +#define SUN4I_TCON0_LVDS_ANA0_C(x) (((x) & 3) << 17) +#define SUN4I_TCON0_LVDS_ANA0_V(x) (((x) & 3) << 8) +#define SUN4I_TCON0_LVDS_ANA0_PD(x) (((x) & 3) << 4) + #define SUN4I_TCON1_FILL_CTL_REG 0x300 #define SUN4I_TCON1_FILL_BEG0_REG 0x304 #define SUN4I_TCON1_FILL_END0_REG 0x308 @@ -149,6 +173,7 @@ struct sun4i_tcon; struct sun4i_tcon_quirks { bool has_channel_1; /* a33 does not have channel 1 */ + bool has_lvds_pll; /* Can we mux the LVDS clock to a PLL? */ bool needs_de_be_mux; /* sun6i needs mux to select backend */ /* callback to handle tcon muxing options */ @@ -167,6 +192,9 @@ struct sun4i_tcon { struct clk *sclk0; struct clk *sclk1; + /* Possible mux for the LVDS clock */ + struct clk *lvds_pll; + /* Pixel clock */ struct clk *dclk; u8 dclk_max_div; @@ -174,6 +202,7 @@ struct sun4i_tcon { /* Reset control */ struct reset_control *lcd_rst; + struct reset_control *lvds_rst; struct drm_panel *panel; From patchwork Mon Nov 27 15:41:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119739 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp439471qgn; Mon, 27 Nov 2017 07:43:32 -0800 (PST) X-Google-Smtp-Source: AGs4zMYX+9NErOER/8wjL8y0PllbPDWJzceinSwIkBs9mIYX0M6COOYJH+v4Dn6/EXE0M6N1aHkp X-Received: by 10.84.168.227 with SMTP id f90mr38291222plb.320.1511797412066; Mon, 27 Nov 2017 07:43:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797412; cv=none; d=google.com; s=arc-20160816; b=UEhMcjE1OpgeJAXJ/j2+GflxYv7SAplV+Nn2fp6CrqrUEQW8Wk1qJhIhTK0USzqm4z o40171cvTZpXhJm8/klnFvFgZGS+1xwE+oCUqg5iDbM/15qwRcw0d3h4Zux6YnTSmrqa noQZyezevoxo3tWEAHhxr7EqbP2qr0bjb0QSEsMFoOA+4yRm1WDqquqltiS69o1uNxs9 yscAf6qWCQCT4KCLiwe0foIHg284e6xHQJGWxnX/i45a2dl055rTQnxG26iiGSsLH/XL 5JbeQ5857ujiOe0w38bGTv29SY/6+KMRy0mrv0dtujIzqRMYKL82j/BDyInfkATvDqiI Mmtw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=pdGayrp72JetUR0ehI+bvl9o3hRTIwuWQhlex6aYAYA=; b=p19E3bNY3WuXk68mwRzZw0TvdvJLt0C1ZDEN6LEupyiNv+acB1Wwp2KfiOdeK9afM3 3f7lusXWfSK8QNQfiHh9lN+lfUqiQvbKOl3zgzbHwYg4T619zTWqhr2BCHin1y1BHkPO HBkqV3uUi/rNY4ioQqABbG4CUVloH53GByI4hzo1IdDnqwE3Nltfn/8rrfSTe7pD8dRS Fupt/MknmGNWlzt4Yj0mNMqmpXYTxF+mPNVrrNa+bzoHes2gifKUweiZuycBaMABK3Ip i0HLObNORB/HeeY9xDHuvpu91i9pR+Jg162eKIM/TYgtO6+0LV4JGhjN6rs+nJFzikeM 9PDQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id j89si13672691pfa.108.2017.11.27.07.43.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Nov 2017 07:43:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C33426E325; Mon, 27 Nov 2017 15:42:19 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 6DA656E2F3 for ; Mon, 27 Nov 2017 15:41:56 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 491C82083F; Mon, 27 Nov 2017 16:41:55 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id 12E9B207CC; Mon, 27 Nov 2017 16:41:55 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v2 11/18] drm/sun4i: Add A83T support Date: Mon, 27 Nov 2017 16:41:35 +0100 Message-Id: <1c4f6b275597dec7d97b5c1d9f749ba27c0610f3.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , jernej.skrabec@siol.net, plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add support for the A83T display pipeline. Reviewed-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++ drivers/gpu/drm/sun4i/sun4i_drv.c | 2 ++ drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 +++++ drivers/gpu/drm/sun4i/sun8i_mixer.c | 4 ++++ 4 files changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index d4259a4f5171..d6b52e5c48c0 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -93,6 +93,7 @@ Required properties: * allwinner,sun6i-a31s-tcon * allwinner,sun7i-a20-tcon * allwinner,sun8i-a33-tcon + * allwinner,sun8i-a83t-tcon-lcd * allwinner,sun8i-v3s-tcon - reg: base address and size of memory-mapped region - interrupts: interrupt associated to this IP @@ -224,6 +225,7 @@ supported. Required properties: - compatible: value must be one of: + * allwinner,sun8i-a83t-de2-mixer * allwinner,sun8i-v3s-de2-mixer - reg: base address and size of the memory-mapped region. - clocks: phandles to the clocks feeding the mixer @@ -253,6 +255,7 @@ Required properties: * allwinner,sun6i-a31s-display-engine * allwinner,sun7i-a20-display-engine * allwinner,sun8i-a33-display-engine + * allwinner,sun8i-a83t-display-engine * allwinner,sun8i-v3s-display-engine - allwinner,pipelines: list of phandle to the display engine diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c index 75c76cdd82bc..c418be2f22be 100644 --- a/drivers/gpu/drm/sun4i/sun4i_drv.c +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c @@ -193,6 +193,7 @@ static bool sun4i_drv_node_is_tcon(struct device_node *node) of_device_is_compatible(node, "allwinner,sun6i-a31s-tcon") || of_device_is_compatible(node, "allwinner,sun7i-a20-tcon") || of_device_is_compatible(node, "allwinner,sun8i-a33-tcon") || + of_device_is_compatible(node, "allwinner,sun8i-a83t-tcon-lcd") || of_device_is_compatible(node, "allwinner,sun8i-v3s-tcon"); } @@ -353,6 +354,7 @@ static const struct of_device_id sun4i_drv_of_table[] = { { .compatible = "allwinner,sun6i-a31s-display-engine" }, { .compatible = "allwinner,sun7i-a20-display-engine" }, { .compatible = "allwinner,sun8i-a33-display-engine" }, + { .compatible = "allwinner,sun8i-a83t-display-engine" }, { .compatible = "allwinner,sun8i-v3s-display-engine" }, { } }; diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 46ce6daa0b1a..871df75793a9 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -1132,6 +1132,10 @@ static const struct sun4i_tcon_quirks sun8i_a33_quirks = { .has_lvds_pll = true, }; +static const struct sun4i_tcon_quirks sun8i_a83t_quirks = { + /* nothing is supported */ +}; + static const struct sun4i_tcon_quirks sun8i_v3s_quirks = { /* nothing is supported */ }; @@ -1143,6 +1147,7 @@ static const struct of_device_id sun4i_tcon_of_table[] = { { .compatible = "allwinner,sun6i-a31s-tcon", .data = &sun6i_a31s_quirks }, { .compatible = "allwinner,sun7i-a20-tcon", .data = &sun7i_a20_quirks }, { .compatible = "allwinner,sun8i-a33-tcon", .data = &sun8i_a33_quirks }, + { .compatible = "allwinner,sun8i-a83t-tcon-lcd", .data = &sun8i_a83t_quirks }, { .compatible = "allwinner,sun8i-v3s-tcon", .data = &sun8i_v3s_quirks }, { } }; diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 44d5e639ebb2..5a1376965270 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -395,6 +395,10 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = { static const struct of_device_id sun8i_mixer_of_table[] = { { + .compatible = "allwinner,sun8i-a83t-de2-mixer", + .data = &sun8i_v3s_mixer_cfg, + }, + { .compatible = "allwinner,sun8i-v3s-de2-mixer", .data = &sun8i_v3s_mixer_cfg, }, From patchwork Mon Nov 27 15:41:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119732 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp438200qgn; Mon, 27 Nov 2017 07:42:31 -0800 (PST) X-Google-Smtp-Source: AGs4zMZJhgR0xuMw/Jo54qKzva7jU+ncE6FcC8dXZnPkNd/1x/an1iIHGTAi6msCZHOvbMVt9cHD X-Received: by 10.98.70.132 with SMTP id o4mr37906179pfi.102.1511797351382; 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[131.252.210.177]) by mx.google.com with ESMTPS id f15si23825630plr.237.2017.11.27.07.42.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Nov 2017 07:42:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 75E256E2F8; Mon, 27 Nov 2017 15:41:59 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 8D1566E2F9 for ; Mon, 27 Nov 2017 15:41:57 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 6ED4920995; Mon, 27 Nov 2017 16:41:56 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id 3A7EA20869; Mon, 27 Nov 2017 16:41:56 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v2 13/18] ARM: dts: sun8i: a83t: Add display pipeline Date: Mon, 27 Nov 2017 16:41:37 +0100 Message-Id: X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , jernej.skrabec@siol.net, plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The display pipeline on the A83T is mainly composed of the mixers and TCONs, plus various encoders. Let's add the first mixer and TCON to the DTSI since the only board I have can use only the LVDS output on the first TCON. The other parts will be added eventually. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t.dtsi | 79 ++++++++++++++++++++++++++++++++- 1 file changed, 79 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 19acae1b4089..0a91f5c17f51 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -45,8 +45,10 @@ #include #include +#include #include #include +#include #include / { @@ -151,6 +153,12 @@ }; }; + de: display-engine { + compatible = "allwinner,sun8i-a83t-display-engine"; + allwinner,pipelines = <&mixer0>; + status = "disabled"; + }; + memory { reg = <0x40000000 0x80000000>; device_type = "memory"; @@ -162,6 +170,44 @@ #size-cells = <1>; ranges; + display_clocks: clock@1000000 { + compatible = "allwinner,sun8i-a83t-de2-clk"; + reg = <0x01000000 0x100000>; + clocks = <&ccu CLK_PLL_DE>, + <&ccu CLK_BUS_DE>; + clock-names = "mod", + "bus"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + mixer0: mixer@1100000 { + compatible = "allwinner,sun8i-a83t-de2-mixer"; + reg = <0x01100000 0x100000>; + clocks = <&display_clocks CLK_BUS_MIXER0>, + <&display_clocks CLK_MIXER0>; + clock-names = "bus", + "mod"; + resets = <&display_clocks RST_MIXER0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mixer0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + mixer0_out_tcon0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_in_mixer0>; + }; + }; + }; + }; + syscon: syscon@1c00000 { compatible = "allwinner,sun8i-a83t-system-controller", "syscon"; @@ -177,6 +223,39 @@ #dma-cells = <1>; }; + tcon0: lcd-controller@1c0c000 { + compatible = "allwinner,sun8i-a83t-tcon-lcd"; + reg = <0x01c0c000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; + clock-names = "ahb", "tcon-ch0"; + clock-output-names = "tcon-pixel-clock"; + resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; + reset-names = "lcd", "lvds"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tcon0_in_mixer0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mixer0_out_tcon0>; + }; + }; + + tcon0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + }; + }; + mmc0: mmc@1c0f000 { compatible = "allwinner,sun8i-a83t-mmc", "allwinner,sun7i-a20-mmc"; From patchwork Mon Nov 27 15:41:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119728 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp437953qgn; Mon, 27 Nov 2017 07:42:19 -0800 (PST) X-Google-Smtp-Source: AGs4zMZRqxmv6KpLESKRG81rDbCNiO+A1Siqp8L7SR5kw7qQi/R+O4FdOPCqvcp8tt+CxQrD5ka3 X-Received: by 10.98.193.1 with SMTP id i1mr10549667pfg.29.1511797339122; Mon, 27 Nov 2017 07:42:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797339; cv=none; d=google.com; s=arc-20160816; b=1AA4xpYbJ0rOTjCYSh2mErw8P/hP3zUBcVUQ60dwW2lRh7OZ+HjNIlJnUXkIFxABTV lVZshzIVYIHBVFs+gidupkb2PveUHEgL7KVZvH5S52+8Qm5z+mxo2rIbLSMriAa5wKuy TSgohjwf+hUAgIEyA+O9g4/MZypP9cgAZTAwlcoNh95mBtdcZjuyySzlXomDs63ViNsx hOFHxmNV3lRGB41ZXif3BTCe1UZFeXCnWZVeGIwtHRoADLPmjux6J7Eo53S1zD5uirk1 JnniQq9pzwMYhvFCEgbh/PBpCHqK+iTxBVp2k1hZyLcX9OIQYnmicF5grsmuentdNF+Z Ub+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=NudrjbKtZYhEdAsclRPJPXnKAg+ZaD/Ph2TkJ7Fhl+c=; b=pG5FDzyTM/EXPW58fzqkZ4g9oiwOHLoZrRefTcH3ix2lso+Is3CWFDDs66erdQrfqo tGQrRVXbwDNg+eZMzsBbUC3xmPtcmwqPmcVOa24kCWj4cqZQOQ9/a4snJ8e+ZvhJm2Yb w3c1EI/w/v24OkhZFOLJVNDE2XKfdrxibdYILwEmfAWHGcWsEndPx9+QXeFs87NEifbm Cv38ze7Iumsv+FHySw0/JeLU0uUDKeJNYS8DvEC0bpUTcbVid6DzM/OfoLwtaWGwVFIn DtzNJ9ckZ6dZyi34xGv7DaKFTwi9myAgc4UL8EGzbhKaJT3eEHtq1g9jRt0MxyP1NAGJ NHJw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id f15si23825392plr.237.2017.11.27.07.42.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Nov 2017 07:42:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8696C6E309; Mon, 27 Nov 2017 15:42:05 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id C6CB96E2F3 for ; Mon, 27 Nov 2017 15:41:57 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id F3401209B6; Mon, 27 Nov 2017 16:41:56 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id C27AF20946; Mon, 27 Nov 2017 16:41:56 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v2 14/18] ARM: dts: sun8i: a83t: Enable the PWM Date: Mon, 27 Nov 2017 16:41:38 +0100 Message-Id: <257f6ffb088c1d165c3fdc6a2b2283e493cbaa16.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , jernej.skrabec@siol.net, plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The A83T has the same PWM block than the H3. Add it to our DT. Reviewed-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 0a91f5c17f51..2cb71e460ea2 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -497,6 +497,15 @@ status = "disabled"; }; + pwm: pwm@1c21400 { + compatible = "allwinner,sun8i-a83t-pwm", + "allwinner,sun8i-h3-pwm"; + reg = <0x01c21400 0x400>; + clocks = <&osc24M>; + #pwm-cells = <3>; + status = "disabled"; + }; + uart0: serial@1c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; From patchwork Mon Nov 27 15:41:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119736 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp438879qgn; Mon, 27 Nov 2017 07:43:05 -0800 (PST) X-Google-Smtp-Source: AGs4zMaLWX9mdnKv0rbE/jkHfs3Uyst6S3O+lRK0jrk3JZK+SJMSYDc4we0Bo8wM5sg7ZED2l+e2 X-Received: by 10.101.100.215 with SMTP id t23mr11827562pgv.433.1511797385439; Mon, 27 Nov 2017 07:43:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797385; cv=none; d=google.com; s=arc-20160816; b=QJBp3W3E+V9DHKqUjBSbzMiBw2vNm7DbKit3K5MG5bHiGAcFSPDQn/zGao9TYdwfLc c5Z1tqaARSrIeGoBnHZ1oNpiRdJpAQvkfecuDtFOCojjPTkxWxnQVQNJTihbg2eKdiPL F2zczijpdiX6VGUczfW2maBooFnRSubFPpmt3js1gqbb/w7PpNEJFIdp/74tUS0g5RZy w0fWeDHGRO8BrKOSraWi73uF0MyqkRwmq4WnbkTvmUyHxzh8oYGUKvEu8GK/tEaNJdt/ uGNRIS0GRPBuiz+8qgzAzV8bFazp3qgQd2mYORvM99m6/qoDIHuXkrkpQnDN0VGb/zky YkBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=YMCLRo/5rA7Z4NXKYUqwscaoxC+m2WeV25FoZ/Zw+64=; b=LBM2z40OX93+K67aRAHVOv2GjdILo7jKDWIW7VSghN2IDGWbzM9rF0Pt2wCHgWvLrU Ys0+F0dfJvUMolNkNGGaxeWikqCaYXZu+p8s3bvofrFRmUaInvNlinp8QKY521zrXs9o VYsyKQXIjNA9n4kQa/Xs+HQarEGGXlAMT+5MhJupENLP3viDZepGPWBSyCt1+diU/b/X SgiqRpHKfymH3vpjQrFXSOt7cJrZFeO8s6pI27hgaV3LwM1XdzcIV4XbUZ9rKaGSjPP5 clW73Vbg3EBZGME9VV0vnwCxd7OeP/jSY53Mq2rjEX8dNWZhaI9pR+ffTfzaDrSncQhL qcyQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id p6si23247526pgf.114.2017.11.27.07.43.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Nov 2017 07:43:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5FDC26E312; Mon, 27 Nov 2017 15:42:06 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id AEA3E6E2F3 for ; Mon, 27 Nov 2017 15:41:58 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 906BF209DE; Mon, 27 Nov 2017 16:41:57 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id 5D31A209A0; Mon, 27 Nov 2017 16:41:57 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v2 15/18] ARM: dts: sun8i: a83t: Add LVDS pins group Date: Mon, 27 Nov 2017 16:41:39 +0100 Message-Id: <8aa6ab23aaf36493c8f0bbef54043c030e1d4eff.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , jernej.skrabec@siol.net, plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The A83T has an LVDS bus that can be connected to a panel or a bridge. Add the pinctrl group for it. Reviewed-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 2cb71e460ea2..b4615f150dbf 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -415,6 +415,12 @@ #interrupt-cells = <3>; #gpio-cells = <3>; + lcd_lvds_pins: lcd-lvds-pins { + pins = "PD18", "PD19", "PD20", "PD21", "PD22", + "PD23", "PD24", "PD25", "PD26", "PD27"; + function = "lvds0"; + }; + mmc0_pins: mmc0-pins { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; From patchwork Mon Nov 27 15:41:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119723 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp437588qgn; Mon, 27 Nov 2017 07:42:03 -0800 (PST) X-Google-Smtp-Source: AGs4zMY41rGRFgQs/B9Z20KZGsOqrCxUI5TzIMnz6NqhoenXnTMm9iC7mtJrQrpd3iMyVmvFL1Wx X-Received: by 10.159.203.133 with SMTP id ay5mr39134362plb.12.1511797323043; Mon, 27 Nov 2017 07:42:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797323; cv=none; d=google.com; s=arc-20160816; b=kn4wGe37fDmJycO/LOiZPfYLiFmOxfTymTZ2VyeMtQmfGFQ335FU3eid4YFQ+jpxd3 5FcPilMg1JBtLFszq9PWtn3u0yBTHvPO6+38FoqvmMYstiJ4oh4AM8rxkGC8wEerIe7M 6g2P7pEUXsoaAcNo30G9Rg90tVe9e/8UhnSIW1KqZuf2TSC+yGyWN7NLEqF21SyIsx63 6SsF4XI5E1AtTzKeCEW8xf5m3WzztvUw9Sztl+R1BU9E+LAofyJV5jmKW5KAOl1jYbPA rpcZzox63jkEHjOAexhYeDnVGPhyOaOzX2fpXm9haBoaTzsJmIA8B5/vwlPyW27f/6/t 07yg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=s/vjUzKOhf/inCI8g7wYIJmVN6+1ZI2I8v8rDlp2ZFo=; b=DJtD0aVAfPawmPfLt3ruVU31WvndtwdJ2nKcQps6DL1lzRnAQuZiLfl79Y+xlZNVhx wVk1LeVDviWNn4iSStlm2+b3Adoau9j/nh2JHlqeJMxxozfudJslpNaJYSXTBfedTanq O3Mx+O5pK2bD7cGmZMPIuqwCxZiAXdLTHjhb9XJmbSh/C8ExRBUSKCfN8l8P8e8Inc4j PJxl7/Nj4Al0LbWM71ZlOaQdoN+McC7optFl+0KFUcw2F+k8mweIjnd2/KBfX5CRPCPu vlbh1Oa36WAQkV5+U6wiDQS8+hJD+Cb/qGEtykFp9NR8PMlYVBjCQv9ryxwDLdtWnyLb h60A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id h16si4831590pli.95.2017.11.27.07.42.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Nov 2017 07:42:03 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B6B3E6E2FD; Mon, 27 Nov 2017 15:42:01 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 40A006E2F3 for ; Mon, 27 Nov 2017 15:41:59 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 2462C209E9; Mon, 27 Nov 2017 16:41:58 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id E5C19209CD; Mon, 27 Nov 2017 16:41:57 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v2 16/18] ARM: dts: sun8i: a83t: Add the PWM pin group Date: Mon, 27 Nov 2017 16:41:40 +0100 Message-Id: <7971dafad2e029e3248ae9c393413b7c19802282.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , jernej.skrabec@siol.net, plaes@plaes.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The A83T has a PWM that can be output from the SoC. Let's add a pinctrl group for it. Reviewed-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index b4615f150dbf..4bc8f1246513 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -446,6 +446,11 @@ bias-pull-up; }; + pwm_pin: pwm-pin { + pins = "PD28"; + function = "pwm"; + }; + spdif_tx_pin: spdif-tx-pin { pins = "PE18"; function = "spdif";