From patchwork Fri Dec 8 14:13:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 121171 Delivered-To: patches@linaro.org Received: by 10.140.22.227 with SMTP id 90csp710081qgn; Fri, 8 Dec 2017 06:13:24 -0800 (PST) X-Google-Smtp-Source: AGs4zMYWL7ijLaZvcfGe/ImKuVzL9uSs5e9SMriUmbz5wmKBpEf4KCrK3mUQHnaK4yCOop3i9THa X-Received: by 10.223.168.23 with SMTP id l23mr3519759wrc.15.1512742403941; Fri, 08 Dec 2017 06:13:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512742403; cv=none; d=google.com; s=arc-20160816; b=tCpOXw5jawSPggg5d4/uv+VRDxEYiEadppXHY+f5Gaj0X9T7w5mWTc++NJ84vIOfDm Sge4mzZ96gcbTQgIimx6I03Ajv8qSED2B/MQoEJzeB5LZbN09lau8TmeXq3rbzhJLZkd Gcj6lNtQzhobq0A2x51W9i6t8VuxRIlcYObNuw5Oi4Si0ZsQXLEn5Pt6YACFCoqn8Rh8 UvZ706DHQByMzdISADk/nedW3Eym796AMwR9RC8z0YOBr5h7g198OAFz5vcdTXf3qDQC yE94bYWiLLb+LYAOsDtXcSpm8RbSM+4ZOSjCvaSQ/Z8Zf7YAi3DuG3ViOfLY/ckdDCIR d/Dw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=message-id:date:subject:cc:to:from:arc-authentication-results; bh=utfcmAydYl1E0hq6KzqEXKDL1NHAKJX34HlXeavZtMI=; b=FONUSmjWBHXCvjUmoYhRRudjwNz7pnYoVacCsxS1ngxEH5yrgk5jkhOtIQNprnGcgX Wwv+Y25H/mS7648k2zo+5a6oiGJYXB68akPWxJkxXCHHPoC2tSivG5mftxc5fgB7MxSE 9adKqvR4v7e3nLFHLv07ELpLiwGAhXtEeo9U/u9B8Dtc6Xs+CcxYR0ZfZO0dIFS4+lT7 QC4Dy1L4/xsEIjrZifhi62MnRvy63R725L5O1duVm12e9TxIGo2XkYxeROV6IS80/9c2 S8qQPFkJrsEsVOKLjXcTJFE3UXgH4UJw/wplSCcKEoGOjUSJRfzihMXnSQN+d5X+jDq6 rQuw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id s71si5866980wrc.364.2017.12.08.06.13.23 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 08 Dec 2017 06:13:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1eNJP1-0000qV-7p; Fri, 08 Dec 2017 14:13:23 +0000 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org, Andy Gross Subject: [PATCH] get_phys_addr_pmsav7: Support AP=0b111 for v7M Date: Fri, 8 Dec 2017 14:13:22 +0000 Message-Id: <1512742402-31669-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 For PMSAv7, the v7A/R Arm ARM defines that setting AP to 0b111 is an UNPREDICTABLE reserved combination. However, for v7M this value is documented as having the same behaviour as 0b110: read-only for both privileged and unprivileged. Accept this value on an M profile core rather than treating it as a guest error and a no-access page. Reported-by: Andy Gross Signed-off-by: Peter Maydell --- target/arm/helper.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.7.4 Reviewed-by: Philippe Mathieu-Daudé diff --git a/target/arm/helper.c b/target/arm/helper.c index 91a9300..2f53dd8 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -9229,6 +9229,13 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, case 6: *prot |= PAGE_READ | PAGE_EXEC; break; + case 7: + /* for v7M, same as 6; for R profile a reserved value */ + if (arm_feature(env, ARM_FEATURE_M)) { + *prot |= PAGE_READ | PAGE_EXEC; + break; + } + /* fall through */ default: qemu_log_mask(LOG_GUEST_ERROR, "DRACR[%d]: Bad value for AP bits: 0x%" @@ -9247,6 +9254,13 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, case 6: *prot |= PAGE_READ | PAGE_EXEC; break; + case 7: + /* for v7M, same as 6; for R profile a reserved value */ + if (arm_feature(env, ARM_FEATURE_M)) { + *prot |= PAGE_READ | PAGE_EXEC; + break; + } + /* fall through */ default: qemu_log_mask(LOG_GUEST_ERROR, "DRACR[%d]: Bad value for AP bits: 0x%"