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Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR03MB2363 Subject: [dpdk-dev] [PATCH 1/3] ethdev: add max burst size to device info X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Currently, if the rte_eth_rx_burst() function returns a value less than *nb_pkts*, the application will assume that no more packets are present. Some of the hw queue based hardware can only support smaller burst for RX and TX and thus break the expectation of the rx_burst API. This patch adds support to provide the maximum burst size that can be supported by a given PMD. The dev_info is being memset to '0' in rte_ethdev library. The value of '0' indicates that any value for burst size can be supported i.e. no change for existing PMDs. The application can now use the lowest available max_burst_size value for rte_eth_rx_burst. Signed-off-by: Nikhil Agarwal --- lib/librte_ether/rte_ethdev.h | 1 + 1 file changed, 1 insertion(+) -- 2.7.4 diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h index 341c2d6..3ab6f02 100644 --- a/lib/librte_ether/rte_ethdev.h +++ b/lib/librte_ether/rte_ethdev.h @@ -1047,6 +1047,7 @@ struct rte_eth_dev_info { /** Configured number of rx/tx queues */ uint16_t nb_rx_queues; /**< Number of RX queues. */ uint16_t nb_tx_queues; /**< Number of TX queues. */ + uint16_t max_burst_size; /**< MAX burst size, 0 for no limit. */ }; /** From patchwork Tue Dec 12 10:05:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nikhil Agarwal X-Patchwork-Id: 121494 Delivered-To: patch@linaro.org Received: by 10.80.152.193 with SMTP id j59csp3863764edb; Tue, 12 Dec 2017 02:09:07 -0800 (PST) X-Google-Smtp-Source: ACJfBovN7DgkPXns3qbFxDBds/+WQqEFvhHULSHGp4j8GyDyVFgiOf/X74CY2/xNWaW5pBdCQ1sb X-Received: by 10.223.128.164 with SMTP id 33mr3052977wrl.41.1513073347814; Tue, 12 Dec 2017 02:09:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513073347; cv=none; d=google.com; s=arc-20160816; b=rh55OgNZY5gg//pE4EN/IUtICbg8b65KZ9qdAxkV7Z3B7ZTGOLEiiNOmG4mF73bcg7 gsUF3vm1X62qFEtdoEAU6kDZIua0IIDxwb5Ap/QOIyCH5DlJ5KQRQPRsaegrFHZ+8CNF jx6+Xz3baTHbSqFmM75Lw44OHA8KfqcOH0jzWbUe/nsBSNAjKx3jWerjKiiC3GLkVOX9 +tnf40iLSjV2azfbZSnAK5ln9gb17Jp3sb04D5gch1mGOwc3abzVFp3UiBPjWDHJsDrT jk0XWv1DRxiW7ARwL0POhiKu4ootAIpPvbo+zVuSd+J2lFP7SskQFxEm2AI5ZYMjFiYG xq0w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:spamdiagnosticmetadata :spamdiagnosticoutput:mime-version:references:in-reply-to:message-id :date:cc:to:from:arc-authentication-results; bh=KGHA2gdYSgWa/ohIIr7nhgtWgRNKeNjtgaXNBKPEWHA=; b=XNM9J87hqe6QzMedNp/Ctl87AznlI78UbXG88H04cFOwf27CP4zhoip7wFrLUVWrFx 1zpPjDALO28XWHhc8+NrDAt1mXHpZQDClAKizCP8+AL6Eq2vEpgbAB4gEb7SGQe5bEDb GfA9g+mXbE6EuV5QVqhk4eiTEJZLS2JZSduIZbjkSfUU+NcYxG4nAtEy9vsBo0RrIj4U wQGJXs9i7IDW4j8mY9SivkyujwDeS617pbDL+R1QWDBfiKHOGy9csCkWky6NSr+I8F8Q og0X/H6uwKL7qsFhO3wk6gmsLIBL3KgbAPLmf8dx+jVqgk2+1nRb15AvYVfXVu8yBEUJ anBA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from dpdk.org (dpdk.org. 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Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR03MB2362 Subject: [dpdk-dev] [PATCH 2/3] net/dpaa: implement max burst size in dev info X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Signed-off-by: Nikhil Agarwal --- drivers/net/dpaa/dpaa_ethdev.c | 1 + drivers/net/dpaa/dpaa_ethdev.h | 1 + 2 files changed, 2 insertions(+) -- 2.7.4 diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c index cf5a2ec..79c6cc4 100644 --- a/drivers/net/dpaa/dpaa_ethdev.c +++ b/drivers/net/dpaa/dpaa_ethdev.c @@ -242,6 +242,7 @@ static void dpaa_eth_dev_info(struct rte_eth_dev *dev, dev_info->max_tx_queues = dpaa_intf->nb_tx_queues; dev_info->min_rx_bufsize = DPAA_MIN_RX_BUF_SIZE; dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN; + dev_info->max_burst_size = DPAA_MAX_BURST_SIZE; dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER; dev_info->max_hash_mac_addrs = 0; dev_info->max_vfs = 0; diff --git a/drivers/net/dpaa/dpaa_ethdev.h b/drivers/net/dpaa/dpaa_ethdev.h index 5457d61..0400dce 100644 --- a/drivers/net/dpaa/dpaa_ethdev.h +++ b/drivers/net/dpaa/dpaa_ethdev.h @@ -64,6 +64,7 @@ #define DPAA_MIN_RX_BUF_SIZE 512 #define DPAA_MAX_RX_PKT_LEN 10240 +#define DPAA_MAX_BURST_SIZE 16 /* RX queue tail drop threshold * currently considering 32 KB packets. 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Tue, 12 Dec 2017 03:08:58 -0700 From: Nikhil Agarwal To: CC: , , , Date: Tue, 12 Dec 2017 15:35:20 +0530 Message-ID: <20171212100520.20502-3-nikhil.agarwal@linaro.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20171212100520.20502-1-nikhil.agarwal@linaro.org> References: <20171212100520.20502-1-nikhil.agarwal@linaro.org> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131575469355421222; (91ab9b29-cfa4-454e-5278-08d120cd25b8); () X-Forefront-Antispam-Report: CIP:192.88.168.50; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(336005)(376002)(346002)(39380400002)(39860400002)(2980300002)(3190300001)(199004)(189003)(81156014)(54906003)(77096006)(36756003)(498600001)(81166006)(356003)(53936002)(2950100002)(68736007)(5660300001)(51416003)(6916009)(59450400001)(1076002)(97736004)(2906002)(86362001)(16586007)(76176011)(316002)(50466002)(106466001)(48376002)(305945005)(47776003)(104016004)(2351001)(4326008)(8656006)(105596002)(6666003)(8936002)(50226002)(8676002); DIR:OUT; SFP:1101; SCL:1; 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Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR03MB2364 Subject: [dpdk-dev] [PATCH 3/3] examples/l3fwd-power: use device max burst size X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On some of the hardware e.g. DPAA, rx burst can only return upto 16 packets, which causes the application to assume that no more packets are present. This patch modifies the application to use device published packet burst size. Signed-off-by: Nikhil Agarwal --- examples/l3fwd-power/main.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/examples/l3fwd-power/main.c b/examples/l3fwd-power/main.c index d80f663..000ac53 100644 --- a/examples/l3fwd-power/main.c +++ b/examples/l3fwd-power/main.c @@ -145,6 +145,7 @@ #define RTE_TEST_TX_DESC_DEFAULT 512 static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT; static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT; +static uint16_t max_pkt_burst = MAX_PKT_BURST; /* ethernet addresses of ports */ static struct ether_addr ports_eth_addr[RTE_MAX_ETHPORTS]; @@ -421,7 +422,7 @@ power_timer_cb(__attribute__((unused)) struct rte_timer *tim, rte_power_freq_down(lcore_id); } else if ( (unsigned)(stats[lcore_id].nb_rx_processed / - stats[lcore_id].nb_iteration_looped) < MAX_PKT_BURST) { + stats[lcore_id].nb_iteration_looped) < max_pkt_burst) { /** * scale down a step if average packet per iteration less * than expectation. @@ -759,9 +760,9 @@ power_freq_scaleup_heuristic(unsigned lcore_id, * HW Rx queue size is 128 by default, Rx burst read at maximum 32 entries * per iteration */ -#define FREQ_GEAR1_RX_PACKET_THRESHOLD MAX_PKT_BURST -#define FREQ_GEAR2_RX_PACKET_THRESHOLD (MAX_PKT_BURST*2) -#define FREQ_GEAR3_RX_PACKET_THRESHOLD (MAX_PKT_BURST*3) +#define FREQ_GEAR1_RX_PACKET_THRESHOLD max_pkt_burst +#define FREQ_GEAR2_RX_PACKET_THRESHOLD (max_pkt_burst*2) +#define FREQ_GEAR3_RX_PACKET_THRESHOLD (max_pkt_burst*3) #define FREQ_UP_TREND1_ACC 1 #define FREQ_UP_TREND2_ACC 100 #define FREQ_UP_THRESHOLD 10000 @@ -950,7 +951,7 @@ main_loop(__attribute__((unused)) void *dummy) queueid = rx_queue->queue_id; nb_rx = rte_eth_rx_burst(portid, queueid, pkts_burst, - MAX_PKT_BURST); + max_pkt_burst); stats[lcore_id].nb_rx_processed += nb_rx; if (unlikely(nb_rx == 0)) { @@ -1703,6 +1704,9 @@ main(int argc, char **argv) dev_rxq_num = dev_info.max_rx_queues; dev_txq_num = dev_info.max_tx_queues; + if (dev_info.max_burst_size && + dev_info.max_burst_size < max_pkt_burst) + max_pkt_burst = dev_info.max_burst_size; nb_rx_queue = get_port_n_rx_queues(portid); if (nb_rx_queue > dev_rxq_num) rte_exit(EXIT_FAILURE,