From patchwork Fri Sep 18 11:21:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 313181 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1225478ilg; Fri, 18 Sep 2020 04:23:22 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyA6SmSg6fjgsHuGZ09cxV57WYswQhoWE32pQCy3UpPaqpdEDQzkFJm/swJTowCa2S9D8sh X-Received: by 2002:a50:ce06:: with SMTP id y6mr38670302edi.273.1600428202404; Fri, 18 Sep 2020 04:23:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600428202; cv=none; d=google.com; s=arc-20160816; b=QDLHwnNyvosHRYx4Ct6j98ine47T9QgrVt2SSFQsfhrh0Ywa2OtXHiC7jDjj0bpOky z2Ksnz9LGqjgR6YNLd+PdpoEhzCm0ORm5WtyXP4RZ7fWOzbE8JAW/xbMIbu1Gi7GDBRb vuKxGq2PoEb2A9MpbsQsKBVwgNNYYF7Y2qOPFMCD+TZu9Uzj3Z8t6fJa8kXdoNtyN5xu s0aiVntvxube/1jc8gg0euqnUZIbJ8dYSoaJwm9Lv8f/N89qachVa4laqglKSpZHqQhj KBuSbhYvdxN1muNkQFeiwKtn892NHuR1O0uHr7GKqzl80nj7B/PTkHNplMzYdAQe01Ov LD+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=XM3e5S5YjUUHiZd0qTy4Kqbz6+SzTvPbvQicxdyvzlA=; b=XX8FyvoqIx6fjA9j5RY4vHho2nI7s5/xIkIrKQDRZOv0RnLldZAvgIj6Auy1akOzsX hGcAT90PbDH+7WuMOqHolAQAWqnupkulxywQHCfVWvDR8jgHrdLqLxSw/kGTqumaYVYe yKfraxXAmhDsPqhGT9tgD1xOE8HfLpvF/fR3zlYDhf7eC7JQbXhNje1SiHYy5z1JRTcG RQoefhLom1Dj6EHyYofLzYzmnzcpdg/7H7HaP2laOqQJ3ZLZxEePjkfUJuQURU0TW6yf doADtm3TAeib+XnYrqnNQksocqI8m9Mkohuan5bs0CmCfuFr5Qhq1DAT5bcjKRqkQwEl 9z0A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id en9si2025344ejb.220.2020.09.18.04.23.22; Fri, 18 Sep 2020 04:23:22 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726422AbgIRLW7 (ORCPT + 6 others); Fri, 18 Sep 2020 07:22:59 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:33904 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725941AbgIRLWz (ORCPT ); Fri, 18 Sep 2020 07:22:55 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 191923A6D08B770DF102; Fri, 18 Sep 2020 19:22:52 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Fri, 18 Sep 2020 19:22:45 +0800 From: Zhen Lei To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , "Alexey Brodkin" , Vineet Gupta , devicetree , linux-snps-arc , linux-kernel CC: Zhen Lei , Sebastian Hesselbarth , Haoyu Lv , Libin , Kefeng Wang Subject: [PATCH v5 1/6] genirq: define an empty function set_handle_irq() if !GENERIC_IRQ_MULTI_HANDLER Date: Fri, 18 Sep 2020 19:21:57 +0800 Message-ID: <20200918112202.3418-2-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200918112202.3418-1-thunder.leizhen@huawei.com> References: <20200918112202.3418-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org To avoid compilation error if an irqchip driver references the function set_handle_irq() but may not select GENERIC_IRQ_MULTI_HANDLER on some systems. For example, the Synopsys DesignWare APB interrupt controller (dw_apb_ictl) is used as the secondary interrupt controller on arc, csky, arm64, and most arm32 SoCs, and it's also used as the primary interrupt controller on Hisilicon SD5203 (an arm32 SoC). The latter need to use set_handle_irq() to register the top-level IRQ handler, but this multi irq handler registration mechanism is not implemented on arc system. The input parameter "handle_irq" maybe defined as static and only set_handle_irq() references it. This will trigger "defined but not used" warning. So add "(void)handle_irq" to suppress it. Signed-off-by: Zhen Lei --- include/linux/irq.h | 6 ++++++ 1 file changed, 6 insertions(+) -- 1.8.3 diff --git a/include/linux/irq.h b/include/linux/irq.h index 1b7f4dfee35b397..b167baef88c0b43 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -1252,6 +1252,12 @@ void irq_matrix_free(struct irq_matrix *m, unsigned int cpu, * top-level IRQ handler. */ extern void (*handle_arch_irq)(struct pt_regs *) __ro_after_init; +#else +#define set_handle_irq(handle_irq) \ + do { \ + (void)handle_irq; \ + WARN_ON(1); \ + } while (0) #endif #endif /* _LINUX_IRQ_H */ From patchwork Fri Sep 18 11:21:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 313177 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1225240ilg; Fri, 18 Sep 2020 04:23:01 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzqMR9RRXBQhpfmD/SHuI1PXZY+8ipd4Ck1IS1TFM5QwqjaEGRv/Na10CYk9zHSzIJ5vu9v X-Received: by 2002:a50:bb26:: with SMTP id y35mr39377546ede.234.1600428181098; Fri, 18 Sep 2020 04:23:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600428181; cv=none; d=google.com; s=arc-20160816; b=chUqZrjGW7PiFwWzsel2IT/BulW3VmAfPW4LiVEIdym15by9W9jSM83P1dmsYW2Bdd TmsgsGwnzzlpSQvqCWwGylHSme+2HER21dOx7FwmylpWDndGvhjjY6VBu54Q/KEY/0D4 qVFH/HbWPDCj5LcUAHz6IcAOFFSc1SKC7BwTOdPc7aEwhcf20l955fBqle5ik7BDx3A+ r//vgWjypR7XrrafLkj/Fmo8W45w1HlaUDfNEOlANAwmkcBPMDFi0S2ugo6LHsni428b AjeC7CZyKHm6G5Vzce2aDB3+jJLf/bwW2Lnv5F2FRcfb4lJg/kh9axE9BXl9snamSBzT nsLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=jKCPgBoZifUDjMMCwZGOSJO4/f7Mmp752AqKn/FNlvc=; b=UbR3s7NBqGPAiSzjAs5PrgVMBb7oMS6/TJ/4Uc+z30OcybiM+lFzdry1s1J36l7Ef9 512DfryJmF8edPk8Fs/cl9/Iie+s8wqvtKv5kUmtPNQd3SvxjAshTb7l2dIouUUf8p2P PNE4wZBtOV140oHfg77Jg4xwjT8J27bFMmW2/nLqHfqZ0p1MT3Jr33vlyZ5uE0ZN1f+p YZLVbelMXU+YcPUtXYsaJRGZO4if71M2SBME6RTCNgG/H+NettezTfGaWs2cMiAoUb3G ir8cNFzMVhfUkMOWXxlXGaevSBDP6gn57qUHTtGsvOvAFPyTYm6TldA0eJfNTo73+6gF FDDg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a1si2012182ejk.68.2020.09.18.04.23.00; Fri, 18 Sep 2020 04:23:01 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726454AbgIRLXA (ORCPT + 6 others); Fri, 18 Sep 2020 07:23:00 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:34160 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726382AbgIRLW7 (ORCPT ); Fri, 18 Sep 2020 07:22:59 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 3781E6F9B949E4532D43; Fri, 18 Sep 2020 19:22:57 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Fri, 18 Sep 2020 19:22:46 +0800 From: Zhen Lei To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , "Alexey Brodkin" , Vineet Gupta , devicetree , linux-snps-arc , linux-kernel CC: Zhen Lei , Sebastian Hesselbarth , Haoyu Lv , Libin , Kefeng Wang Subject: [PATCH v5 2/6] irqchip: dw-apb-ictl: prepare for support hierarchy irq domain Date: Fri, 18 Sep 2020 19:21:58 +0800 Message-ID: <20200918112202.3418-3-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200918112202.3418-1-thunder.leizhen@huawei.com> References: <20200918112202.3418-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Rename some functions and variables in advance, to make the next patch looks more clear. The details are as follows: 1. rename dw_apb_ictl_handler() to dw_apb_ictl_handle_irq_cascaded(). 2. change (1 << hwirq) to BIT(hwirq). In function dw_apb_ictl_init(): 1. rename local variable irq to parent_irq. 2. add "const struct irq_domain_ops *domain_ops = &irq_generic_chip_ops", then replace &irq_generic_chip_ops in other places with domain_ops. No functional change. Signed-off-by: Zhen Lei Tested-by: Haoyu Lv --- drivers/irqchip/irq-dw-apb-ictl.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) -- 1.8.3 diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c index e4550e9c810ba94..5458004242e9d20 100644 --- a/drivers/irqchip/irq-dw-apb-ictl.c +++ b/drivers/irqchip/irq-dw-apb-ictl.c @@ -26,7 +26,7 @@ #define APB_INT_FINALSTATUS_H 0x34 #define APB_INT_BASE_OFFSET 0x04 -static void dw_apb_ictl_handler(struct irq_desc *desc) +static void dw_apb_ictl_handle_irq_cascaded(struct irq_desc *desc) { struct irq_domain *d = irq_desc_get_handler_data(desc); struct irq_chip *chip = irq_desc_get_chip(desc); @@ -43,7 +43,7 @@ static void dw_apb_ictl_handler(struct irq_desc *desc) u32 virq = irq_find_mapping(d, gc->irq_base + hwirq); generic_handle_irq(virq); - stat &= ~(1 << hwirq); + stat &= ~BIT(hwirq); } } @@ -73,12 +73,13 @@ static int __init dw_apb_ictl_init(struct device_node *np, struct irq_domain *domain; struct irq_chip_generic *gc; void __iomem *iobase; - int ret, nrirqs, irq, i; + int ret, nrirqs, parent_irq, i; u32 reg; + const struct irq_domain_ops *domain_ops = &irq_generic_chip_ops; /* Map the parent interrupt for the chained handler */ - irq = irq_of_parse_and_map(np, 0); - if (irq <= 0) { + parent_irq = irq_of_parse_and_map(np, 0); + if (parent_irq <= 0) { pr_err("%pOF: unable to parse irq\n", np); return -EINVAL; } @@ -120,8 +121,7 @@ static int __init dw_apb_ictl_init(struct device_node *np, else nrirqs = fls(readl_relaxed(iobase + APB_INT_ENABLE_L)); - domain = irq_domain_add_linear(np, nrirqs, - &irq_generic_chip_ops, NULL); + domain = irq_domain_add_linear(np, nrirqs, domain_ops, NULL); if (!domain) { pr_err("%pOF: unable to add irq domain\n", np); ret = -ENOMEM; @@ -146,7 +146,8 @@ static int __init dw_apb_ictl_init(struct device_node *np, gc->chip_types[0].chip.irq_resume = dw_apb_ictl_resume; } - irq_set_chained_handler_and_data(irq, dw_apb_ictl_handler, domain); + irq_set_chained_handler_and_data(parent_irq, + dw_apb_ictl_handle_irq_cascaded, domain); return 0; From patchwork Fri Sep 18 11:21:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 313178 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1225319ilg; Fri, 18 Sep 2020 04:23:08 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxDTOUQqTeELoDr+lGMFhkX2R/E1rJ+TJ5pT0SurZv7W3/gTo0DKGzL++RNj1BMKtlwTuYv X-Received: by 2002:a50:abc3:: with SMTP id u61mr36902919edc.129.1600428188655; Fri, 18 Sep 2020 04:23:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600428188; cv=none; d=google.com; s=arc-20160816; b=Q8sbaSbWgLZFh5hTpJs4WjCCVskxNdNidVj06XlC/ze9MD9seMIE/9wvFNWM0J+E4C vrroy7JdByr0saJrndpUY8jueOaglPt9ct//AA54lKx24cabj0pXR8uIxH8r/vSqemip 5ZfbXYmxekWb7tjdCU/Shj2pmJ+1jCjvDfw4ML+tiydjhJnK4N3Za6MRc73mKA6CYipG 35qVGuf03H2CH/l558Ama332tuZSsvI73jzf/KYkXZGx14j5kPW/NdeDx/d5BXE6WxDD tv9vs6JKZUGcBALMDUUaq92o8p3I6tGlQCsTLDH3PkF/3+Y5OC29j3ywbiIa4Oo+1p1Y UK6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=RTSWwN5wysrw426Y6GMoSbsnTHALOD9sljibBRw0yjI=; b=RcDzLbnUJVhu7VR103LUBpjR0Bm1N2Xe6ciIIfI6w5R5A9K4NkKAHWRXIIkZXIi6zM qI3K97M7jj2zU/9k8HBbNn+H6L0HnG2yZRhc80+FeJTwhjVTKwWOhbp7HNNNjnHDziv2 z0X/LwGqQCf2wNa81lCo5rtVVZnjb7/F/9AorUCYr5Uo2nqY3R4EGmSqkPpcjJK22uxQ EbRFo0Y2ej2+IvtF/h/kF51dVQdL/+/q4utF4h9De+4yTHNeO4EPYWDiX2fmXqs3kTfu 1XoffxpvWBczMw99k4XksEpZhLacs6AtY8Jz9Xa9vHSCdWOJJByFQequJuQo/6LSUUTB +OJg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a1si2012182ejk.68.2020.09.18.04.23.08; Fri, 18 Sep 2020 04:23:08 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726477AbgIRLXH (ORCPT + 6 others); Fri, 18 Sep 2020 07:23:07 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:13301 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726413AbgIRLXB (ORCPT ); Fri, 18 Sep 2020 07:23:01 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 5271EADEF9CA90532B09; Fri, 18 Sep 2020 19:22:57 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Fri, 18 Sep 2020 19:22:47 +0800 From: Zhen Lei To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , "Alexey Brodkin" , Vineet Gupta , devicetree , linux-snps-arc , linux-kernel CC: Zhen Lei , Sebastian Hesselbarth , Haoyu Lv , Libin , Kefeng Wang Subject: [PATCH v5 3/6] irqchip: dw-apb-ictl: support hierarchy irq domain Date: Fri, 18 Sep 2020 19:21:59 +0800 Message-ID: <20200918112202.3418-4-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200918112202.3418-1-thunder.leizhen@huawei.com> References: <20200918112202.3418-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add support to use dw-apb-ictl as primary interrupt controller. Suggested-by: Marc Zyngier Signed-off-by: Zhen Lei Tested-by: Haoyu Lv --- drivers/irqchip/Kconfig | 2 +- drivers/irqchip/irq-dw-apb-ictl.c | 74 ++++++++++++++++++++++++++++++++++----- 2 files changed, 67 insertions(+), 9 deletions(-) -- 1.8.3 diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index bfc9719dbcdc31c..7c2d1c8fa551a66 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -148,7 +148,7 @@ config DAVINCI_CP_INTC config DW_APB_ICTL bool select GENERIC_IRQ_CHIP - select IRQ_DOMAIN + select IRQ_DOMAIN_HIERARCHY config FARADAY_FTINTC010 bool diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c index 5458004242e9d20..418183b9983dfad 100644 --- a/drivers/irqchip/irq-dw-apb-ictl.c +++ b/drivers/irqchip/irq-dw-apb-ictl.c @@ -17,6 +17,7 @@ #include #include #include +#include #define APB_INT_ENABLE_L 0x00 #define APB_INT_ENABLE_H 0x04 @@ -26,6 +27,27 @@ #define APB_INT_FINALSTATUS_H 0x34 #define APB_INT_BASE_OFFSET 0x04 +/* irq domain of the primary interrupt controller. */ +static struct irq_domain *dw_apb_ictl_irq_domain; + +static void __irq_entry dw_apb_ictl_handle_irq(struct pt_regs *regs) +{ + struct irq_domain *d = dw_apb_ictl_irq_domain; + int n; + + for (n = 0; n < d->revmap_size; n += 32) { + struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, n); + u32 stat = readl_relaxed(gc->reg_base + APB_INT_FINALSTATUS_L); + + while (stat) { + u32 hwirq = ffs(stat) - 1; + + handle_domain_irq(d, hwirq, regs); + stat &= ~BIT(hwirq); + } + } +} + static void dw_apb_ictl_handle_irq_cascaded(struct irq_desc *desc) { struct irq_domain *d = irq_desc_get_handler_data(desc); @@ -50,6 +72,30 @@ static void dw_apb_ictl_handle_irq_cascaded(struct irq_desc *desc) chained_irq_exit(chip, desc); } +static int dw_apb_ictl_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, + unsigned int nr_irqs, void *arg) +{ + int i, ret; + irq_hw_number_t hwirq; + unsigned int type = IRQ_TYPE_NONE; + struct irq_fwspec *fwspec = arg; + + ret = irq_domain_translate_onecell(domain, fwspec, &hwirq, &type); + if (ret) + return ret; + + for (i = 0; i < nr_irqs; i++) + irq_map_generic_chip(domain, virq + i, hwirq + i); + + return 0; +} + +static const struct irq_domain_ops dw_apb_ictl_irq_domain_ops = { + .translate = irq_domain_translate_onecell, + .alloc = dw_apb_ictl_irq_domain_alloc, + .free = irq_domain_free_irqs_top, +}; + #ifdef CONFIG_PM static void dw_apb_ictl_resume(struct irq_data *d) { @@ -75,13 +121,20 @@ static int __init dw_apb_ictl_init(struct device_node *np, void __iomem *iobase; int ret, nrirqs, parent_irq, i; u32 reg; - const struct irq_domain_ops *domain_ops = &irq_generic_chip_ops; - - /* Map the parent interrupt for the chained handler */ - parent_irq = irq_of_parse_and_map(np, 0); - if (parent_irq <= 0) { - pr_err("%pOF: unable to parse irq\n", np); - return -EINVAL; + const struct irq_domain_ops *domain_ops; + + if (!parent || (np == parent)) { + /* It's used as the primary interrupt controller */ + parent_irq = 0; + domain_ops = &dw_apb_ictl_irq_domain_ops; + } else { + /* Map the parent interrupt for the chained handler */ + parent_irq = irq_of_parse_and_map(np, 0); + if (parent_irq <= 0) { + pr_err("%pOF: unable to parse irq\n", np); + return -EINVAL; + } + domain_ops = &irq_generic_chip_ops; } ret = of_address_to_resource(np, 0, &r); @@ -146,8 +199,13 @@ static int __init dw_apb_ictl_init(struct device_node *np, gc->chip_types[0].chip.irq_resume = dw_apb_ictl_resume; } - irq_set_chained_handler_and_data(parent_irq, + if (parent_irq) { + irq_set_chained_handler_and_data(parent_irq, dw_apb_ictl_handle_irq_cascaded, domain); + } else { + dw_apb_ictl_irq_domain = domain; + set_handle_irq(dw_apb_ictl_handle_irq); + } return 0; From patchwork Fri Sep 18 11:22:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 313180 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1225461ilg; Fri, 18 Sep 2020 04:23:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyMFybvFg965Bkcuk8OOLmzyPdXJWNuFWr4dkffWgetjymwc6SJwSoFTsYq16ptXqGAlVwB X-Received: by 2002:a17:906:a207:: with SMTP id r7mr36190842ejy.32.1600428200973; Fri, 18 Sep 2020 04:23:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600428200; cv=none; d=google.com; s=arc-20160816; b=HfyUOv4Jyyu0lXlgD12Loh0gaJUOfpKZ0xYz8FfSC5PVuWROJSDu7bSVokLf3jFmY1 c7JknnzrigIs/XZSE3fLGfSq1yWZcjQlNIFC8IUrP5XWIqLRV4DTyqC9drIucKPflatf dpbppcghB2bXdqF8exPOfRTaGaBIQZHHRTVY1u+n7Hcnd8KOcj0Nkf7oxwpPzAn1SLJx JI/rc8oiPhnwr2UOBBt/iIMJPwBRNmxykdxNxkySMRsCFLvpIAdXDSvM+oRFbfphU1GU fbADGzRBe5xjxPIfWyDlU4AEWKhpoy/287bud46L7plLGmcGfYpj21pT1Kp3/C61hIaJ L2IQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=qUa/Kjd1vWY85qZkOA44kmv3cSG2ul4HwF89NXfszuA=; b=dL2MvJngcsowtZSLBpLh9sGOSTRuSlRqFBbsgOJN2RYuMAfzX4eVn16dE6ATzqgJv5 UpIy0Fsdz1OwT6JAeYua062PdyS750RwY8xo9t3b+rCX6jVjCa7TRz6jIJViy0y4OZB8 9guJG7Mxn3Zr2zr3TBE1L6ze9jwfMYJoCeZlHG4xRmQvdvNgO8U0EJsBf8b/1Flc9ola fU9snQIJkoaIUslDuF8YyCg1AmS41F+6kV+6lXkhhpaHoTaLbOVASeLMSerAmx5AcMqw 9Oq/j59LkGBbS3pILaOhaLzN4bsVH+XJmCPvn3N0jieNAG80i7cBd7ATI+pGEtCLxAe5 XFnA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id en9si2025344ejb.220.2020.09.18.04.23.20; Fri, 18 Sep 2020 04:23:20 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726344AbgIRLXN (ORCPT + 6 others); Fri, 18 Sep 2020 07:23:13 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:34072 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726375AbgIRLXA (ORCPT ); Fri, 18 Sep 2020 07:23:00 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 225C0F4620A62FDC9C63; Fri, 18 Sep 2020 19:22:57 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Fri, 18 Sep 2020 19:22:48 +0800 From: Zhen Lei To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , "Alexey Brodkin" , Vineet Gupta , devicetree , linux-snps-arc , linux-kernel CC: Zhen Lei , Sebastian Hesselbarth , Haoyu Lv , Libin , Kefeng Wang Subject: [PATCH v5 4/6] dt-bindings: dw-apb-ictl: support hierarchy irq domain Date: Fri, 18 Sep 2020 19:22:00 +0800 Message-ID: <20200918112202.3418-5-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200918112202.3418-1-thunder.leizhen@huawei.com> References: <20200918112202.3418-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add support to use dw-apb-ictl as primary interrupt controller. Signed-off-by: Zhen Lei --- .../bindings/interrupt-controller/snps,dw-apb-ictl.txt | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) -- 1.8.3 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt index 086ff08322db94f..2db59df9408f4c6 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt @@ -2,7 +2,8 @@ Synopsys DesignWare APB interrupt controller (dw_apb_ictl) Synopsys DesignWare provides interrupt controller IP for APB known as dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with -APB bus, e.g. Marvell Armada 1500. +APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt +controller in some SoCs, e.g. Hisilicon SD5203. Required properties: - compatible: shall be "snps,dw-apb-ictl" @@ -10,6 +11,8 @@ Required properties: region starting with ENABLE_LOW register - interrupt-controller: identifies the node as an interrupt controller - #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1 + +Additional required property when it's used as secondary interrupt controller: - interrupts: interrupt reference to primary interrupt controller The interrupt sources map to the corresponding bits in the interrupt @@ -21,6 +24,7 @@ registers, i.e. - (optional) fast interrupts start at 64. Example: + /* dw_apb_ictl is used as secondary interrupt controller */ aic: interrupt-controller@3000 { compatible = "snps,dw-apb-ictl"; reg = <0x3000 0xc00>; @@ -29,3 +33,11 @@ Example: interrupt-parent = <&gic>; interrupts = ; }; + + /* dw_apb_ictl is used as primary interrupt controller */ + vic: interrupt-controller@10130000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x10130000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; From patchwork Fri Sep 18 11:22:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 313179 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1225451ilg; Fri, 18 Sep 2020 04:23:20 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwUkxNc932a4lllPXgA7D822a433fGMZt8gy3DD1ilpMEOeC1MXlW/hGT3BwNFP/LKFCfLl X-Received: by 2002:a05:6402:2d9:: with SMTP id b25mr38196070edx.131.1600428200521; Fri, 18 Sep 2020 04:23:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600428200; cv=none; d=google.com; s=arc-20160816; b=ohNJOfAhPeJHRdn3eGEyispGLEYJ/9gEXJYdzXsql3refsxwF0JYZk1RtYgEiD6g6e mnAfeQCqtOnIMH1vbvFrjfrQYHeo8XCleKBwt/MFHHgQtADHUZZCiz7qRJDg4n8d42WS 71KI+MvWQkM1MYKxbbBkOePgABJsye6bKts/FKSEJAwREJkquRnmHvwCqTSqMxYAjoKi vn2P0oVT80v7dWktwDjmL56jPmFLrHXsMoc/lUslWedlfNi9Ho7Sv+trm6feAsn5mdJz lkJDNX5tU+AzXJSmxMxz5VKEwu7SuLTb9bYKKf6Ga/M2rBIOQT2TD4US+3q5Kidh9wSh huOg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=h22uWY3tidm4FsrdhlQigJ+SgXxjOAZOWnOIcuIu3g0=; b=qfsfFRiQbRdGga4NoGtRTSI0EPVpVNBEmtDIwh7UV/LmR+FB9p4oYQY+C7hpQzPIb4 Y5DCReSTjZNdauPua+CZfUQHSBM8IeBbzgI9ag9qljAxuR+/1Oeo2kXWQphqb2/RHGzt KHGsITehrBali9RFlFvaJh4jkHR567i1Z3OMgT7wHa62zhDP2kYuAZHn8pYWshvmlz3D Xl/J8F7MAhvoRc7FgNQ4rUL/aBQy5T3VmGy/LqWMMEKDwrPFLZO4VZ8MTcLukPP7Y8pJ YpTCMhp7QgTemUhQEjJZDGtn3z0HmTBINBxLGStlL2C9xotYUMCjmq1mJw2k23rFL7dO 0p8g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id en9si2025344ejb.220.2020.09.18.04.23.20; Fri, 18 Sep 2020 04:23:20 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726435AbgIRLXN (ORCPT + 6 others); Fri, 18 Sep 2020 07:23:13 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:34156 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726381AbgIRLXA (ORCPT ); Fri, 18 Sep 2020 07:23:00 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 30D7F45A98C32F96A6A1; Fri, 18 Sep 2020 19:22:57 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Fri, 18 Sep 2020 19:22:49 +0800 From: Zhen Lei To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , "Alexey Brodkin" , Vineet Gupta , devicetree , linux-snps-arc , linux-kernel CC: Zhen Lei , Sebastian Hesselbarth , Haoyu Lv , Libin , Kefeng Wang Subject: [PATCH v5 5/6] dt-bindings: dw-apb-ictl: convert to json-schema Date: Fri, 18 Sep 2020 19:22:01 +0800 Message-ID: <20200918112202.3418-6-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200918112202.3418-1-thunder.leizhen@huawei.com> References: <20200918112202.3418-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the Synopsys DesignWare APB interrupt controller (dw_apb_ictl) binding to DT schema format using json-schema. Signed-off-by: Zhen Lei --- .../interrupt-controller/snps,dw-apb-ictl.txt | 43 ------------- .../interrupt-controller/snps,dw-apb-ictl.yaml | 75 ++++++++++++++++++++++ 2 files changed, 75 insertions(+), 43 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml -- 1.8.3 diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt deleted file mode 100644 index 2db59df9408f4c6..000000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt +++ /dev/null @@ -1,43 +0,0 @@ -Synopsys DesignWare APB interrupt controller (dw_apb_ictl) - -Synopsys DesignWare provides interrupt controller IP for APB known as -dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with -APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt -controller in some SoCs, e.g. Hisilicon SD5203. - -Required properties: -- compatible: shall be "snps,dw-apb-ictl" -- reg: physical base address of the controller and length of memory mapped - region starting with ENABLE_LOW register -- interrupt-controller: identifies the node as an interrupt controller -- #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1 - -Additional required property when it's used as secondary interrupt controller: -- interrupts: interrupt reference to primary interrupt controller - -The interrupt sources map to the corresponding bits in the interrupt -registers, i.e. -- 0 maps to bit 0 of low interrupts, -- 1 maps to bit 1 of low interrupts, -- 32 maps to bit 0 of high interrupts, -- 33 maps to bit 1 of high interrupts, -- (optional) fast interrupts start at 64. - -Example: - /* dw_apb_ictl is used as secondary interrupt controller */ - aic: interrupt-controller@3000 { - compatible = "snps,dw-apb-ictl"; - reg = <0x3000 0xc00>; - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = ; - }; - - /* dw_apb_ictl is used as primary interrupt controller */ - vic: interrupt-controller@10130000 { - compatible = "snps,dw-apb-ictl"; - reg = <0x10130000 0x1000>; - interrupt-controller; - #interrupt-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml new file mode 100644 index 000000000000000..70c12979c843bf0 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/snps,dw-apb-ictl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare APB interrupt controller (dw_apb_ictl) + +maintainers: + - Marc Zyngier + +description: + Synopsys DesignWare provides interrupt controller IP for APB known as + dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs + with APB bus, e.g. Marvell Armada 1500. It can also be used as primary + interrupt controller in some SoCs, e.g. Hisilicon SD5203. + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + const: snps,dw-apb-ictl + + interrupt-controller: true + + reg: + description: + Physical base address of the controller and length of memory mapped + region starting with ENABLE_LOW register. + + interrupts: + description: + Interrupt reference to primary interrupt controller. + + The interrupt sources map to the corresponding bits in the interrupt + registers, i.e. + - 0 maps to bit 0 of low interrupts, + - 1 maps to bit 1 of low interrupts, + - 32 maps to bit 0 of high interrupts, + - 33 maps to bit 1 of high interrupts, + - (optional) fast interrupts start at 64. + minItems: 1 + maxItems: 65 + + "#interrupt-cells": + description: + Number of cells to encode an interrupt-specifier. + const: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +examples: + - | + /* dw_apb_ictl is used as secondary interrupt controller */ + aic: interrupt-controller@3000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x3000 0xc00>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = <0 3 4>; + }; + + /* dw_apb_ictl is used as primary interrupt controller */ + vic: interrupt-controller@10130000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x10130000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; From patchwork Fri Sep 18 11:22:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 313176 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1225226ilg; Fri, 18 Sep 2020 04:23:00 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzNrvf6E4bhyt3S2xC106yN84C6R/s2o0LN0LJWdE5uahlO7J438thF8CC57HRCtERGZQWx X-Received: by 2002:aa7:c98d:: with SMTP id c13mr38756459edt.199.1600428180680; Fri, 18 Sep 2020 04:23:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600428180; cv=none; d=google.com; s=arc-20160816; b=U5IZK27elQ+B+hlh0PUp90GM2a+xtpRJ+cQbNY7vc+H2c46/91xx+wJ0vPPDt8gAhz 9MR3cdLCrsKVjWfd/qJoP3dBMP03VHB2PlpdqX7d1tM5WLm47JYMd5gJmScNcThxDDZv RCiuRp9o1evQXluQINQ7WUs9VFETFoFb5/3l6vPrmoSieknpW23wVSLU7TfTqvvfBWcm 5Flm+nGHnI3srn18d0gACNx8MrmPaJV8ByGWABos2cAkLMDj8y4tQRnWGj7nfBnuCiHY zbM7j3Yye0y9Xgvc1xhjkhGqzvb+/haVtcW82aPBghFWMfEkWYyonq8X92YFmRdVa9bS BXxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=80N4R45uWZpnJetSR/OUuZNoT5L0RYsOoeUfMRI7g00=; b=cSIFV46bmvWK+j4lmZAqsxV1ISyBqI2bkHoNI5RKCUfjG7or82FtbS0Xd79NTJkxTt RizIbAhxbRmVbCGQqRmjW8XIy/56ufVYEWylkOMQjYlWC9b3XxSalXy6s9fruwM2GezP KDJ8Oe5nipK59x5JePzlPyj6n8g/OG4ZmfEpjPW1J19ST5uePYm3ldQ1uzZPDGLBUaPG ETDOrWB6P+eoa/2TzS85iQw/Ty+RizuLOflE1nbgw9oF511X/tbcd8wLSCdBHuZmDs+h 2VaZI9zIvPZQxPAPTLQKNvovNfTNTe5FqPYD0oo5FaIwOmQOibkDpOE9yy/9owy6bKCw fI5w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a1si2012182ejk.68.2020.09.18.04.23.00; Fri, 18 Sep 2020 04:23:00 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726396AbgIRLW7 (ORCPT + 6 others); Fri, 18 Sep 2020 07:22:59 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:34122 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725900AbgIRLW7 (ORCPT ); Fri, 18 Sep 2020 07:22:59 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 2939F63E3C0AF96437F3; Fri, 18 Sep 2020 19:22:57 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Fri, 18 Sep 2020 19:22:50 +0800 From: Zhen Lei To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , "Alexey Brodkin" , Vineet Gupta , devicetree , linux-snps-arc , linux-kernel CC: Zhen Lei , Sebastian Hesselbarth , Haoyu Lv , Libin , Kefeng Wang Subject: [PATCH v5 6/6] ARC: [dts] fix the errors detected by dtbs_check Date: Fri, 18 Sep 2020 19:22:02 +0800 Message-ID: <20200918112202.3418-7-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200918112202.3418-1-thunder.leizhen@huawei.com> References: <20200918112202.3418-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org xxx/arc/boot/dts/axs101.dt.yaml: dw-apb-ictl@e0012000: $nodename:0: \ 'dw-apb-ictl@e0012000' does not match '^interrupt-controller(@[0-9a-f,]+)*$' >From schema: xxx/interrupt-controller/snps,dw-apb-ictl.yaml The node name of the interrupt controller must start with "interrupt-controller" instead of "dw-apb-ictl". Signed-off-by: Zhen Lei --- arch/arc/boot/dts/axc001.dtsi | 2 +- arch/arc/boot/dts/axc003.dtsi | 2 +- arch/arc/boot/dts/axc003_idu.dtsi | 2 +- arch/arc/boot/dts/vdk_axc003.dtsi | 2 +- arch/arc/boot/dts/vdk_axc003_idu.dtsi | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) -- 1.8.3 diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi index 79ec27c043c1da7..2a151607b08057c 100644 --- a/arch/arc/boot/dts/axc001.dtsi +++ b/arch/arc/boot/dts/axc001.dtsi @@ -91,7 +91,7 @@ * avoid duplicating the MB dtsi file given that IRQ from * this intc to cpu intc are different for axs101 and axs103 */ - mb_intc: dw-apb-ictl@e0012000 { + mb_intc: interrupt-controller@e0012000 { #interrupt-cells = <1>; compatible = "snps,dw-apb-ictl"; reg = < 0x0 0xe0012000 0x0 0x200 >; diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi index ac8e1b463a70992..cd1edcf4f95efe6 100644 --- a/arch/arc/boot/dts/axc003.dtsi +++ b/arch/arc/boot/dts/axc003.dtsi @@ -129,7 +129,7 @@ * avoid duplicating the MB dtsi file given that IRQ from * this intc to cpu intc are different for axs101 and axs103 */ - mb_intc: dw-apb-ictl@e0012000 { + mb_intc: interrupt-controller@e0012000 { #interrupt-cells = <1>; compatible = "snps,dw-apb-ictl"; reg = < 0x0 0xe0012000 0x0 0x200 >; diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi index 9da21e7fd246f9f..70779386ca7963a 100644 --- a/arch/arc/boot/dts/axc003_idu.dtsi +++ b/arch/arc/boot/dts/axc003_idu.dtsi @@ -135,7 +135,7 @@ * avoid duplicating the MB dtsi file given that IRQ from * this intc to cpu intc are different for axs101 and axs103 */ - mb_intc: dw-apb-ictl@e0012000 { + mb_intc: interrupt-controller@e0012000 { #interrupt-cells = <1>; compatible = "snps,dw-apb-ictl"; reg = < 0x0 0xe0012000 0x0 0x200 >; diff --git a/arch/arc/boot/dts/vdk_axc003.dtsi b/arch/arc/boot/dts/vdk_axc003.dtsi index f8be7ba8dad499c..c21d0eb07bf6737 100644 --- a/arch/arc/boot/dts/vdk_axc003.dtsi +++ b/arch/arc/boot/dts/vdk_axc003.dtsi @@ -46,7 +46,7 @@ }; - mb_intc: dw-apb-ictl@e0012000 { + mb_intc: interrupt-controller@e0012000 { #interrupt-cells = <1>; compatible = "snps,dw-apb-ictl"; reg = < 0xe0012000 0x200 >; diff --git a/arch/arc/boot/dts/vdk_axc003_idu.dtsi b/arch/arc/boot/dts/vdk_axc003_idu.dtsi index 0afa3e53a4e3932..4d348853ac7c5dc 100644 --- a/arch/arc/boot/dts/vdk_axc003_idu.dtsi +++ b/arch/arc/boot/dts/vdk_axc003_idu.dtsi @@ -54,7 +54,7 @@ }; - mb_intc: dw-apb-ictl@e0012000 { + mb_intc: interrupt-controller@e0012000 { #interrupt-cells = <1>; compatible = "snps,dw-apb-ictl"; reg = < 0xe0012000 0x200 >;