From patchwork Sat Sep 19 06:45:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 313298 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1932519ilg; Fri, 18 Sep 2020 23:46:37 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx2ZDgVKOlOghXV0nvVT7j0sOreLs3ufVXerjL0A41SYh7iw5A/xMkOTL8XXQFmoZnY/ZiJ X-Received: by 2002:a50:baed:: with SMTP id x100mr26725581ede.384.1600497997455; Fri, 18 Sep 2020 23:46:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600497997; cv=none; d=google.com; s=arc-20160816; b=08+NvJJpkGohsYdDgXvJWWze3dhaspA+OF83373QNKw0nmuO/oAsZIix0R3Jqk5uaO a6uXPrBGbAOW7fQmkJ2byhGxX+Ml3q41IbAE8QXlfSi7ANifHhlZt9IkduRxowxh8yYB sOsjr9rMVFQmvEcFJUOz+4dliBCNVGnx2jQ0IpsulEHOdrm9gHmntVKmgyW9fyS27Qsy J69d77YJnDoux0c7gykc97VToS0m6ZpXNJ63INxMBP3PQ4/iWzoiI208nEb1jeJShcp4 CfLN8QusTcfNarO6wWFM6x9QseNzDnHkN5WX45M9J+2bQcHHt7dEmtsGmGJDxJEphLam BclA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=Uu4/DJzH3Dxd3tF1bsTkJ9hKP3WbTadVYyhC/6ryPzM=; b=lufawyOGUB3yT2H+tst9tFggE91pjnjjzuDimvcXPTxafkIrvnrGoMpJ2KIvhDu0bW +NKNMbK03sWBjWoy267RHW+CB99AY7JSQUX01EiN5MugkR+L6zYnhJYhLZt1ajX3rS9c IJGJq5fW4SjuL9Y8RzXsqTNNZI1+WTo/bI98/n4ZLFAh3504xygQi6KBCQcrILYuGZz/ /gDckeFhSPw8DGuNZqSBlX/dYLWP/eTlfkU2jTbHSgS/XwprSTFbFQ4TDfflDOr/XwSC fw7h+D3kuFq/iIt4rTYV3o/tEO0E3Kzd/Zz4I+ohLViYAfFaafwY0SF8/23s5px7PvHp /NIQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id r15si3837930edo.318.2020.09.18.23.46.37; Fri, 18 Sep 2020 23:46:37 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726157AbgISGqd (ORCPT + 6 others); Sat, 19 Sep 2020 02:46:33 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:33156 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726112AbgISGqc (ORCPT ); Sat, 19 Sep 2020 02:46:32 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 9F2B36905347ACCDFFFD; Sat, 19 Sep 2020 14:46:29 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Sat, 19 Sep 2020 14:46:20 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei , Libin , Kefeng Wang Subject: [PATCH v2 1/4] dt-bindings: arm: hisilicon: add binding for SD5203 SoC Date: Sat, 19 Sep 2020 14:45:52 +0800 Message-ID: <20200919064555.3616-2-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200919064555.3616-1-thunder.leizhen@huawei.com> References: <20200919064555.3616-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add devicetree binding for Hisilicon SD5203 SoC. Signed-off-by: Zhen Lei --- Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | 5 +++++ 1 file changed, 5 insertions(+) -- 1.8.3 diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt index a97f643e7d1c760..5d80070bfb13fc0 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt @@ -56,6 +56,11 @@ HiP07 D05 Board Required root node properties: - compatible = "hisilicon,hip07-d05"; +SD5203 SoC +Required root node properties: + - compatible = "hisilicon,sd5203"; + + Hisilicon system controller Required properties: From patchwork Sat Sep 19 06:45:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 313299 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1932523ilg; Fri, 18 Sep 2020 23:46:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxmkCvNBHR97tlXgZUrlTkcJvWWZOzd7o62mkt1iT863+88o77vuboEesmfaWUK/Vcs7eUN X-Received: by 2002:a17:906:fa8a:: with SMTP id lt10mr39115505ejb.307.1600497997879; Fri, 18 Sep 2020 23:46:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600497997; cv=none; d=google.com; s=arc-20160816; b=WkZ0NyDgbwhJTvVFpuTYemjd04ukbAQ7CpQElH3CZ7l9GMB6lp1ab1hn2E5+n7W0+0 PmaAspAgciodVVSYmZ5EpYfEuDbIqJJPo9mqMFlX+Aq/fl8XECjmgQKnM5Daj+HSeW/W ymAHFSx3PZ4pr5PQsR+hBuCheuvnzSRCJqBBJIvIhqsvlD005GxkAHPaZr0AtxDR1pC3 Noq6gtZBEvubXrkkukBImCJeb6t9Gf9zbOMw6LR7jEbcOcNBghWX8XW7mEoAYthdMPCL 9a90yd7dNmqvtVw5lqn6yFoICdXIPHjOAITjbclElgKzEaozzz+rQ/VOPogR0i75VSlY z44Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=7S2NxD+MhlhEdXZBEzBKVlIncr3e0pL4ulB33Jw88Vg=; b=FbqZ0pcN56HxZKACMN47RFNpjyJwzaO/IhdpupnRHtX/mZb+RxImDt1sJ76xmMnBsb UvUkfOobj/BdCUvVmADPHbB2U4b7F1c+KtYle6MKJBioGlq+Irdx6RSl0fyY4eZvdPyI 6R1ZDRhl82C76xs4CKHV96ohrD0Pc8yxhajB/G2s3JVYWhBnzZHhGfQGTaGpZtBcaHvd vC+hrfqeFlG49amb9+TBnf2JJbm734beMrIENl5ht7zrAiIZodn+PdNxY4VityyLuaMs HB7CLp6bwdD9B8XshFrTZRVD0s3pdZZwDG0UIS931V9/6zHOZZHaLVcz/hJzgNpibDqi UvIA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id r15si3837930edo.318.2020.09.18.23.46.37; Fri, 18 Sep 2020 23:46:37 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726112AbgISGqg (ORCPT + 6 others); Sat, 19 Sep 2020 02:46:36 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:33150 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726054AbgISGqd (ORCPT ); Sat, 19 Sep 2020 02:46:33 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 9A9E5726B9C783EBAADF; Sat, 19 Sep 2020 14:46:29 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Sat, 19 Sep 2020 14:46:20 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei , Libin , Kefeng Wang Subject: [PATCH v2 2/4] ARM: hisi: add support for SD5203 SoC Date: Sat, 19 Sep 2020 14:45:53 +0800 Message-ID: <20200919064555.3616-3-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200919064555.3616-1-thunder.leizhen@huawei.com> References: <20200919064555.3616-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Kefeng Wang Enable support for the Hisilicon SD5203 SoC. The core is ARM926EJ-S. Signed-off-by: Kefeng Wang Signed-off-by: Zhen Lei --- arch/arm/mach-hisi/Kconfig | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) -- 1.8.3 diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig index 3b010fe7c0e9b48..2e980f834a6aa1b 100644 --- a/arch/arm/mach-hisi/Kconfig +++ b/arch/arm/mach-hisi/Kconfig @@ -1,9 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-only config ARCH_HISI bool "Hisilicon SoC Support" - depends on ARCH_MULTI_V7 + depends on ARCH_MULTI_V7 || ARCH_MULTI_V5 select ARM_AMBA - select ARM_GIC + select ARM_GIC if ARCH_MULTI_V7 select ARM_TIMER_SP804 select POWER_RESET select POWER_RESET_HISI @@ -15,6 +15,7 @@ menu "Hisilicon platform type" config ARCH_HI3xxx bool "Hisilicon Hi36xx family" + depends on ARCH_MULTI_V7 select CACHE_L2X0 select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP @@ -25,6 +26,7 @@ config ARCH_HI3xxx config ARCH_HIP01 bool "Hisilicon HIP01 family" + depends on ARCH_MULTI_V7 select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP select ARM_GLOBAL_TIMER @@ -33,6 +35,7 @@ config ARCH_HIP01 config ARCH_HIP04 bool "Hisilicon HiP04 Cortex A15 family" + depends on ARCH_MULTI_V7 select ARM_ERRATA_798181 if SMP select HAVE_ARM_ARCH_TIMER select MCPM if SMP @@ -43,6 +46,7 @@ config ARCH_HIP04 config ARCH_HIX5HD2 bool "Hisilicon X5HD2 family" + depends on ARCH_MULTI_V7 select CACHE_L2X0 select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP @@ -50,6 +54,14 @@ config ARCH_HIX5HD2 select PINCTRL_SINGLE help Support for Hisilicon HIX5HD2 SoC family + +config ARCH_SD5203 + bool "Hisilicon SD5203 family" + depends on ARCH_MULTI_V5 + select DW_APB_ICTL + help + Support for Hisilicon SD5203 SoC family + endmenu endif From patchwork Sat Sep 19 06:45:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 313300 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1932563ilg; Fri, 18 Sep 2020 23:46:43 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwWBj+6jJp/tPQK+c1zScMc6L35W29YhB2HOl3fTDZMHJzxXL9H2WJDkyf7P9C7wUMVrpRH X-Received: by 2002:a17:906:829a:: with SMTP id h26mr41001428ejx.11.1600498003751; Fri, 18 Sep 2020 23:46:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600498003; cv=none; d=google.com; s=arc-20160816; b=AvwVJM8Y2wi6uGqgnB6DjXuz5zBkUsF7vUBk9QD1pREMptEQ+6lyVqvo1cMS3O8COr /bIW2so/tjJ2hUi1Wh62wpahscxyLzrVuyV7GEwDoExi8rNz0B8QPk9WAC4tvVrskzYr BA9nZxvFr982xRqlcqHxtydHvB8WjZsTxDFRKIGfQeEpv0W/etiQ/eT0xWfWyY6J09i9 V52dEqeBjGYB+OyE7d615Q2yAtkO9AHyh8WxoG5hr3EuQzrPht5TGJHicDS+0Mj1zBJ2 HQUW2WkhztlpxsRBy4OfjJ8qaFwqNjCniepYI39cYJ+1NzRvccL6Z8VlTiDKFcN56Kef GEAQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=vBY6HV1Qej/RJ01qRTL+9wLFWIqsKm76YvTE5EBi5y0=; b=Arb8wV5TKr4K2xK++58NffAeX77bGPYvcfwBI2OVBBGIVfn53Jq4kzubkh9hQtMRJy ScJW2X1L6bcARX40tmxqMIwjzGAi45Mlt5Roy1Xwp8/5BpLC/1R6UrtscMSdkjzxud1E 7PR4CWluooCI/fcTHo19TDX9FTuWFZIRAFSD4tZPxRIoxyg9pRLW+S3aHx7Sn6yWByzl OqInlIs2/sNaqu+RLdnDwRZlDh2LpKBCXMm0qkd7axRNbjGRotwryWVuRtmjdVcvIFr7 Ebv4UeWHWXfmk1mxS7IpufuWrTuu1JC0OpZZeuIyBKb4JTwecthey+EF91ttaz3+/bcz Ge6A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z19si3757106edx.205.2020.09.18.23.46.43; Fri, 18 Sep 2020 23:46:43 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726054AbgISGqj (ORCPT + 6 others); Sat, 19 Sep 2020 02:46:39 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:33130 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726168AbgISGqh (ORCPT ); Sat, 19 Sep 2020 02:46:37 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 95FEE4F16F056ABAC522; Sat, 19 Sep 2020 14:46:29 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Sat, 19 Sep 2020 14:46:21 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei , Libin , Kefeng Wang Subject: [PATCH v2 3/4] ARM: debug: add UART early console support for SD5203 Date: Sat, 19 Sep 2020 14:45:54 +0800 Message-ID: <20200919064555.3616-4-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200919064555.3616-1-thunder.leizhen@huawei.com> References: <20200919064555.3616-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Kefeng Wang Add support of early console for SD5203. Signed-off-by: Kefeng Wang Signed-off-by: Zhen Lei --- arch/arm/Kconfig.debug | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) -- 1.8.3 diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 80000a66a4e3549..d27a7764c3bfb46 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -1086,6 +1086,14 @@ choice on SA-11x0 UART ports. The kernel will check for the first enabled UART in a sequence 3-1-2. + config DEBUG_SD5203_UART + bool "Hisilicon SD5203 Debug UART" + depends on ARCH_SD5203 + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on SD5203 UART. + config DEBUG_SOCFPGA_UART0 depends on ARCH_SOCFPGA bool "Use SOCFPGA UART0 for low-level debug" @@ -1639,6 +1647,7 @@ config DEBUG_UART_PHYS default 0x11006000 if DEBUG_MT6589_UART0 default 0x11009000 if DEBUG_MT8135_UART3 default 0x16000000 if DEBUG_INTEGRATOR + default 0x1600d000 if DEBUG_SD5203_UART default 0x18000300 if DEBUG_BCM_5301X default 0x18000400 if DEBUG_BCM_HR2 default 0x18010000 if DEBUG_SIRFATLAS7_UART0 @@ -1841,7 +1850,7 @@ config DEBUG_UART_VIRT default 0xfec60000 if DEBUG_SIRFPRIMA2_UART1 default 0xfec90000 if DEBUG_RK32_UART2 default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1 - default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2 + default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_SD5203_UART default 0xfed60000 if DEBUG_RK29_UART0 default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 From patchwork Sat Sep 19 06:45:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 313301 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1932596ilg; Fri, 18 Sep 2020 23:46:50 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz54TGe1/Q4zjEik8IoCk7X5E7yJE4kT8fVH6vg7oE+VAAKBCW2Cc6Xa3UCwxj/CFhXvFRw X-Received: by 2002:a17:906:2354:: with SMTP id m20mr38684761eja.341.1600498009854; Fri, 18 Sep 2020 23:46:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600498009; cv=none; d=google.com; s=arc-20160816; b=LWYH59YvZv5EeqZUMBHcWVseicorLNfu7tpJxwoC2kvf4h4jG26VUEPJvUUOpsIa6h nt3+o8UItCnyoWhWXztynTf3QRbeoj9ynU/Op/4BiZi7mZofa/AV6Zyl+s6X8AyCmmSv KSKbQznEQj/afZng8wbBzVEedzFk740j85gS12oVoZ6DfCLQ93e71kRNiUMxe2ChBECU 3nxw1O3/Pj923nB8IhFI6btVwMUMapeBI8Eac1JrUOPIXFxtrw0yLvOn8/V3IwFpRM7e hNRQOBS7odOmwe+HlfIrOFCKeBny39zjeI+uAS1BwbUDpwHHHxk4RclIrkd+kjxnIXcG iUWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=eP9Kk2TWGXf3Fp1/uhi3NrjPJNNPWX/aTD0AhgZAW7o=; b=hB/jRAnsApasV4qoE5uo+6lKNsEVGpnbOXXcnhyS+6DAhClZfhA1WvDxeZfOkhNoYz nPH34KGUoAGM2jSKd95bqC2uTKoEOIQjHril5AXYqWxsrKuSjrwBilDozvpNQ9aaj9lZ aGBDs5TFtWnIIvqwvZOPwwvRLD8Oi7gio7E9iNG9h7nkDai+YrRi8wkJZ8HMXZ4CFhSV bIC2YRbKMBoTHrelS7yEPwIsWFnt7eryVW/e5AV5l0nU6f3k//CGp/8+rSFwopH0A/gs 4pDD00pZV3j9Sx2aR32y9wq5Snr5SDmZCQygrd/FzQccQ/F23rzNlPDP4H5WbOe/XHGF 0cww== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z19si3757106edx.205.2020.09.18.23.46.49; Fri, 18 Sep 2020 23:46:49 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726380AbgISGqq (ORCPT + 6 others); Sat, 19 Sep 2020 02:46:46 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:33104 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726097AbgISGqc (ORCPT ); Sat, 19 Sep 2020 02:46:32 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 8C066BDEA0A1AD18A0AE; Sat, 19 Sep 2020 14:46:29 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Sat, 19 Sep 2020 14:46:21 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei , Libin , Kefeng Wang Subject: [PATCH v2 4/4] ARM: dts: add SD5203 dts Date: Sat, 19 Sep 2020 14:45:55 +0800 Message-ID: <20200919064555.3616-5-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200919064555.3616-1-thunder.leizhen@huawei.com> References: <20200919064555.3616-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Kefeng Wang Add sd5203.dts for Hisilicon SD5203 SoC platform. Signed-off-by: Kefeng Wang Signed-off-by: Zhen Lei --- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/sd5203.dts | 96 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 98 insertions(+) create mode 100644 arch/arm/boot/dts/sd5203.dts -- 1.8.3 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 4572db3fa5ae302..1d1262df5c55907 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -357,6 +357,8 @@ dtb-$(CONFIG_ARCH_MPS2) += \ mps2-an399.dtb dtb-$(CONFIG_ARCH_MOXART) += \ moxart-uc7112lx.dtb +dtb-$(CONFIG_ARCH_SD5203) += \ + sd5203.dtb dtb-$(CONFIG_SOC_IMX1) += \ imx1-ads.dtb \ imx1-apf9328.dtb diff --git a/arch/arm/boot/dts/sd5203.dts b/arch/arm/boot/dts/sd5203.dts new file mode 100644 index 000000000000000..41113a46a71a584 --- /dev/null +++ b/arch/arm/boot/dts/sd5203.dts @@ -0,0 +1,96 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020 Hisilicon Limited. + * + * DTS file for Hisilicon SD5203 Board + */ + +/dts-v1/; + +/ { + model = "Hisilicon SD5203"; + compatible = "hisilicon,sd5203"; + interrupt-parent = <&vic>; + #address-cells = <1>; + #size-cells = <1>; + + chosen { + bootargs="console=ttyS0,9600 earlycon=uart8250,mmio32,0x1600d000"; + }; + + aliases { + serial0 = &uart0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0 { + device_type = "cpu"; + compatible = "arm,arm926ej-s"; + reg = <0x0>; + }; + }; + + memory@30000000 { + device_type = "memory"; + reg = <0x30000000 0x8000000>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + + vic: interrupt-controller@10130000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x10130000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + refclk125mhz: refclk125mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + timer0: timer@16002000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x16002000 0x1000>; + interrupts = <4>; + clocks = <&refclk125mhz>; + clock-names = "apb_pclk"; + }; + + timer1: timer@16003000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x16003000 0x1000>; + interrupts = <5>; + clocks = <&refclk125mhz>; + clock-names = "apb_pclk"; + }; + + uart0: serial@1600d000 { + compatible = "snps,dw-apb-uart"; + reg = <0x1600d000 0x1000>; + bus_id = "uart0"; + clocks = <&refclk125mhz>; + clock-names = "baudclk", "apb_pclk"; + reg-shift = <2>; + interrupts = <17>; + }; + + uart1: serial@1600c000 { + compatible = "snps,dw-apb-uart"; + reg = <0x1600c000 0x1000>; + clocks = <&refclk125mhz>; + clock-names = "baudclk", "apb_pclk"; + reg-shift = <2>; + interrupts = <16>; + status = "disabled"; + }; + }; +};