From patchwork Thu Sep 24 07:17:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 313448 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1117343ilg; Thu, 24 Sep 2020 00:19:39 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxJPWng5ZKh+xjzIe3DmtDTAMWEglmCZzicTw5AeCmm5x1TTyYM7mVY5sR+BKAqga4eyyks X-Received: by 2002:a17:906:fa81:: with SMTP id lt1mr3135854ejb.459.1600931979697; Thu, 24 Sep 2020 00:19:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600931979; cv=none; d=google.com; s=arc-20160816; b=D87yNC/9Yg+vQZGskyZV3pZDN1HQA4Gesqdwui0SL69t7ONMsu/XzQaoxGzMoHxTnt IDXIx3298WxhVxFlBdtrdbEGuvNaOuZSmTirYCCyhcHg1BFHtc6j1LVkrSb+77cEOYSA aUThZHT6y7BL4cJfXNcSo+k773pFYFa6jSy9Bq1fRnkcGh5eqW81KRbSbpdGQRhJnehB dDRUk+SY1GIYTmm34L9u68/U4VlYPfnYb1h4A9wCEpdcP+f5ouZcknzlFO8sRy58dxxS nB7P+XtOd1m+ZGnXaINHbMzFa2RKHbW9PqmtKZjeC+9K+/guhUfiq9/85ixBCjUz3hPx mVnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=XM3e5S5YjUUHiZd0qTy4Kqbz6+SzTvPbvQicxdyvzlA=; b=lAW+hadwAlQ2X+h+F0u62TopFP6A5jMDLD3Fxnk5utmfbbfZPcmZOpl7I5+aPLr1UA p3Jsrp9sdrfsLRO2KKERmdLv01PZfphNPKj2yO01hCApJ5gfZrFAiW0b60kbFZMx/hBX LGi0/Px6v/qnLDccN7dVDRYgGyIwSP9qakm7666340O4Jp0QmAvdzIx5YMdw8qGPL0HV p8eJOrQXdXReD6mFDqtjFc7OBNT/Zxao2zXk97yf5opK3YQkA6uP1J6dj1+UXwQs8yoh bXaQ4zrel6P/M2zEaWmblaAXAkyuY/FVXf0EyM9mw9XvFSnV6ztZfeQ/+TZ4E056vgGx lI1g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j19si1394050ejx.272.2020.09.24.00.19.39; Thu, 24 Sep 2020 00:19:39 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727160AbgIXHTf (ORCPT + 6 others); Thu, 24 Sep 2020 03:19:35 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:45512 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727054AbgIXHTf (ORCPT ); Thu, 24 Sep 2020 03:19:35 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id BFA6150DC3FAB62E2252; Thu, 24 Sep 2020 15:19:32 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Thu, 24 Sep 2020 15:19:26 +0800 From: Zhen Lei To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , "Alexey Brodkin" , Vineet Gupta , devicetree , linux-snps-arc , linux-kernel CC: Zhen Lei , Sebastian Hesselbarth , Haoyu Lv , Libin , Kefeng Wang Subject: [PATCH v6 1/6] genirq: define an empty function set_handle_irq() if !GENERIC_IRQ_MULTI_HANDLER Date: Thu, 24 Sep 2020 15:17:49 +0800 Message-ID: <20200924071754.4509-2-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200924071754.4509-1-thunder.leizhen@huawei.com> References: <20200924071754.4509-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org To avoid compilation error if an irqchip driver references the function set_handle_irq() but may not select GENERIC_IRQ_MULTI_HANDLER on some systems. For example, the Synopsys DesignWare APB interrupt controller (dw_apb_ictl) is used as the secondary interrupt controller on arc, csky, arm64, and most arm32 SoCs, and it's also used as the primary interrupt controller on Hisilicon SD5203 (an arm32 SoC). The latter need to use set_handle_irq() to register the top-level IRQ handler, but this multi irq handler registration mechanism is not implemented on arc system. The input parameter "handle_irq" maybe defined as static and only set_handle_irq() references it. This will trigger "defined but not used" warning. So add "(void)handle_irq" to suppress it. Signed-off-by: Zhen Lei --- include/linux/irq.h | 6 ++++++ 1 file changed, 6 insertions(+) -- 1.8.3 diff --git a/include/linux/irq.h b/include/linux/irq.h index 1b7f4dfee35b397..b167baef88c0b43 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -1252,6 +1252,12 @@ void irq_matrix_free(struct irq_matrix *m, unsigned int cpu, * top-level IRQ handler. */ extern void (*handle_arch_irq)(struct pt_regs *) __ro_after_init; +#else +#define set_handle_irq(handle_irq) \ + do { \ + (void)handle_irq; \ + WARN_ON(1); \ + } while (0) #endif #endif /* _LINUX_IRQ_H */ From patchwork Thu Sep 24 07:17:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 313450 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1117404ilg; Thu, 24 Sep 2020 00:19:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyqKOluNt+Q4SqpEiYeBbZzRyY1WvZ6g5YMhbTpLvRAh8jxdGPXVSwtNJREPEJ45BDbteXD X-Received: by 2002:a17:906:c447:: with SMTP id ck7mr3213405ejb.358.1600931985635; Thu, 24 Sep 2020 00:19:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600931985; cv=none; d=google.com; s=arc-20160816; b=m6VkNPaxnvuSrb7fYLXRzGGNI6jJxPVvpKQI56UF8FpCcUZGlOBjQh8toNkP4REJJB fjERPcd5BR21QUkVWuZqaTq5iA3nUVO41t10VCKU8QXIrq3hawhsPLirngkkyUVK/3v7 zeqbcy5HYCMGTaOca9WErJy24RCITZ1tn9ev2XoaxwfFRtMDHelIcKdz+CnYD80aZvAU Z4yBJKr18glv7nErrzLzuQNHvSXHWW22fAhcjCCYn6TLubLPsPcLyiYPnpJbLtK483cF x6z6I5ItTwXFVYn/DFAnaQ5W0fo065W1v0WOEREHiguWDa1Cn1Fyp6C18yeVoxYHjTMt lQ5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=jKCPgBoZifUDjMMCwZGOSJO4/f7Mmp752AqKn/FNlvc=; b=0yZmjc6+xPutiWiw0C3kcTDVewNEH28j2V1izyDUTqS+pYqDL6Wu7vj4SSUgrhW03l vN3pstKid4N8gqmwczHFtInm0CtHEnvS7buMDHBLWyuWwZtFSlJ7tKYVrxoAP8T+2y/S HpwYCticZ5Sehd4VtkevYO0wwrd5AZfnLk3KWX1kuk/LXc+cVKg7edQi13X+5JAvbl18 TTb1+mTFQSPw189yp5FmQl87XmKDNP0Na99IOsrqH9K+iW3Mr2NSRj1nbiYb8tlUciyk XWqGSciUzbMogA36jvf095RVR1ijeOjt+DchpER5Q5hGhA30b9hCaBLnHum+CwmsufHQ s4Ow== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j19si1394050ejx.272.2020.09.24.00.19.45; Thu, 24 Sep 2020 00:19:45 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727206AbgIXHTo (ORCPT + 6 others); Thu, 24 Sep 2020 03:19:44 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:53240 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727110AbgIXHTm (ORCPT ); Thu, 24 Sep 2020 03:19:42 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id C1842825956AD73B710B; Thu, 24 Sep 2020 15:19:37 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Thu, 24 Sep 2020 15:19:26 +0800 From: Zhen Lei To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , "Alexey Brodkin" , Vineet Gupta , devicetree , linux-snps-arc , linux-kernel CC: Zhen Lei , Sebastian Hesselbarth , Haoyu Lv , Libin , Kefeng Wang Subject: [PATCH v6 2/6] irqchip: dw-apb-ictl: prepare for support hierarchy irq domain Date: Thu, 24 Sep 2020 15:17:50 +0800 Message-ID: <20200924071754.4509-3-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200924071754.4509-1-thunder.leizhen@huawei.com> References: <20200924071754.4509-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Rename some functions and variables in advance, to make the next patch looks more clear. The details are as follows: 1. rename dw_apb_ictl_handler() to dw_apb_ictl_handle_irq_cascaded(). 2. change (1 << hwirq) to BIT(hwirq). In function dw_apb_ictl_init(): 1. rename local variable irq to parent_irq. 2. add "const struct irq_domain_ops *domain_ops = &irq_generic_chip_ops", then replace &irq_generic_chip_ops in other places with domain_ops. No functional change. Signed-off-by: Zhen Lei Tested-by: Haoyu Lv --- drivers/irqchip/irq-dw-apb-ictl.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) -- 1.8.3 diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c index e4550e9c810ba94..5458004242e9d20 100644 --- a/drivers/irqchip/irq-dw-apb-ictl.c +++ b/drivers/irqchip/irq-dw-apb-ictl.c @@ -26,7 +26,7 @@ #define APB_INT_FINALSTATUS_H 0x34 #define APB_INT_BASE_OFFSET 0x04 -static void dw_apb_ictl_handler(struct irq_desc *desc) +static void dw_apb_ictl_handle_irq_cascaded(struct irq_desc *desc) { struct irq_domain *d = irq_desc_get_handler_data(desc); struct irq_chip *chip = irq_desc_get_chip(desc); @@ -43,7 +43,7 @@ static void dw_apb_ictl_handler(struct irq_desc *desc) u32 virq = irq_find_mapping(d, gc->irq_base + hwirq); generic_handle_irq(virq); - stat &= ~(1 << hwirq); + stat &= ~BIT(hwirq); } } @@ -73,12 +73,13 @@ static int __init dw_apb_ictl_init(struct device_node *np, struct irq_domain *domain; struct irq_chip_generic *gc; void __iomem *iobase; - int ret, nrirqs, irq, i; + int ret, nrirqs, parent_irq, i; u32 reg; + const struct irq_domain_ops *domain_ops = &irq_generic_chip_ops; /* Map the parent interrupt for the chained handler */ - irq = irq_of_parse_and_map(np, 0); - if (irq <= 0) { + parent_irq = irq_of_parse_and_map(np, 0); + if (parent_irq <= 0) { pr_err("%pOF: unable to parse irq\n", np); return -EINVAL; } @@ -120,8 +121,7 @@ static int __init dw_apb_ictl_init(struct device_node *np, else nrirqs = fls(readl_relaxed(iobase + APB_INT_ENABLE_L)); - domain = irq_domain_add_linear(np, nrirqs, - &irq_generic_chip_ops, NULL); + domain = irq_domain_add_linear(np, nrirqs, domain_ops, NULL); if (!domain) { pr_err("%pOF: unable to add irq domain\n", np); ret = -ENOMEM; @@ -146,7 +146,8 @@ static int __init dw_apb_ictl_init(struct device_node *np, gc->chip_types[0].chip.irq_resume = dw_apb_ictl_resume; } - irq_set_chained_handler_and_data(irq, dw_apb_ictl_handler, domain); + irq_set_chained_handler_and_data(parent_irq, + dw_apb_ictl_handle_irq_cascaded, domain); return 0; From patchwork Thu Sep 24 07:17:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 313449 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1117398ilg; Thu, 24 Sep 2020 00:19:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJypeByFq1uVsIs0NDVF4VgNnnraWqXRVz/WmKp+w9YLoje513m7L1qnO5G0wDWGkryj0d9r X-Received: by 2002:a17:906:e4c:: with SMTP id q12mr3143814eji.425.1600931985204; Thu, 24 Sep 2020 00:19:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600931985; cv=none; d=google.com; s=arc-20160816; b=phBR9WEwrBEve0JrJZI8Xd1pFWloiHf3ObWmmYZXhrad9zEfqSQSit9TOogjqRJupG q8tOMenNskJEA9H+f1K+lqJHXGox6oras0c7hH13acK06i4fQG7HGp8yRf0mXLSh924d kJr//N8O1LdO35xNH88wWXPCOLLtlWhapmzoAPHUGi0TlmqW5xuOSht14OB+9yxnEbzT cVe8Rlxx4JLULsFYz1hQd5UHHEH7EGLOiA8c8t0ZAccC5LH2MFSHt3zU6T0+VMfFJllZ GTrhVXK0u+4q+VFZ3O6CMAoaqe63LSi3bPcIuNd31ugAjaCWUnRGmJCclKdQDhHD5ovA Rqxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=RTSWwN5wysrw426Y6GMoSbsnTHALOD9sljibBRw0yjI=; b=l8cfWzXJ04NXLFcINftAl/ieBU9Np/d2Fb9Q3FP+Rxbr6vxoluwQjuL4cvQTDKcYgh kzBxHMP0IgmvvlEaH0kp/USecd022XGGHalFP9JQTBKnSDsNjKvbxrLw2HPcXlTj8QuB tlpcXt4rRJnO3nkO+RBA6DuKHwY9Z+pvhqbsRPgNlIFo4zsxAqFz5yokuolbaRVqMJmL Nzk3Ze07+u3RrNYgaY7NgotIXRvzikbME7/UM+xXKy+Q9cjLa83gZHDaZcDzzEsQ6W3o bP9/wArp9/QENgHlmsu3AbbAS8k0dFT6r6FC0bKQUzNxqC60Eg7RNh3sUbsuhv8JkwQj NGxg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j19si1394050ejx.272.2020.09.24.00.19.44; Thu, 24 Sep 2020 00:19:45 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727187AbgIXHTo (ORCPT + 6 others); Thu, 24 Sep 2020 03:19:44 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:53218 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727180AbgIXHTm (ORCPT ); Thu, 24 Sep 2020 03:19:42 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id B988C2E19A2E1A700331; Thu, 24 Sep 2020 15:19:37 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Thu, 24 Sep 2020 15:19:27 +0800 From: Zhen Lei To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , "Alexey Brodkin" , Vineet Gupta , devicetree , linux-snps-arc , linux-kernel CC: Zhen Lei , Sebastian Hesselbarth , Haoyu Lv , Libin , Kefeng Wang Subject: [PATCH v6 3/6] irqchip: dw-apb-ictl: support hierarchy irq domain Date: Thu, 24 Sep 2020 15:17:51 +0800 Message-ID: <20200924071754.4509-4-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200924071754.4509-1-thunder.leizhen@huawei.com> References: <20200924071754.4509-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add support to use dw-apb-ictl as primary interrupt controller. Suggested-by: Marc Zyngier Signed-off-by: Zhen Lei Tested-by: Haoyu Lv --- drivers/irqchip/Kconfig | 2 +- drivers/irqchip/irq-dw-apb-ictl.c | 74 ++++++++++++++++++++++++++++++++++----- 2 files changed, 67 insertions(+), 9 deletions(-) -- 1.8.3 diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index bfc9719dbcdc31c..7c2d1c8fa551a66 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -148,7 +148,7 @@ config DAVINCI_CP_INTC config DW_APB_ICTL bool select GENERIC_IRQ_CHIP - select IRQ_DOMAIN + select IRQ_DOMAIN_HIERARCHY config FARADAY_FTINTC010 bool diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c index 5458004242e9d20..418183b9983dfad 100644 --- a/drivers/irqchip/irq-dw-apb-ictl.c +++ b/drivers/irqchip/irq-dw-apb-ictl.c @@ -17,6 +17,7 @@ #include #include #include +#include #define APB_INT_ENABLE_L 0x00 #define APB_INT_ENABLE_H 0x04 @@ -26,6 +27,27 @@ #define APB_INT_FINALSTATUS_H 0x34 #define APB_INT_BASE_OFFSET 0x04 +/* irq domain of the primary interrupt controller. */ +static struct irq_domain *dw_apb_ictl_irq_domain; + +static void __irq_entry dw_apb_ictl_handle_irq(struct pt_regs *regs) +{ + struct irq_domain *d = dw_apb_ictl_irq_domain; + int n; + + for (n = 0; n < d->revmap_size; n += 32) { + struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, n); + u32 stat = readl_relaxed(gc->reg_base + APB_INT_FINALSTATUS_L); + + while (stat) { + u32 hwirq = ffs(stat) - 1; + + handle_domain_irq(d, hwirq, regs); + stat &= ~BIT(hwirq); + } + } +} + static void dw_apb_ictl_handle_irq_cascaded(struct irq_desc *desc) { struct irq_domain *d = irq_desc_get_handler_data(desc); @@ -50,6 +72,30 @@ static void dw_apb_ictl_handle_irq_cascaded(struct irq_desc *desc) chained_irq_exit(chip, desc); } +static int dw_apb_ictl_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, + unsigned int nr_irqs, void *arg) +{ + int i, ret; + irq_hw_number_t hwirq; + unsigned int type = IRQ_TYPE_NONE; + struct irq_fwspec *fwspec = arg; + + ret = irq_domain_translate_onecell(domain, fwspec, &hwirq, &type); + if (ret) + return ret; + + for (i = 0; i < nr_irqs; i++) + irq_map_generic_chip(domain, virq + i, hwirq + i); + + return 0; +} + +static const struct irq_domain_ops dw_apb_ictl_irq_domain_ops = { + .translate = irq_domain_translate_onecell, + .alloc = dw_apb_ictl_irq_domain_alloc, + .free = irq_domain_free_irqs_top, +}; + #ifdef CONFIG_PM static void dw_apb_ictl_resume(struct irq_data *d) { @@ -75,13 +121,20 @@ static int __init dw_apb_ictl_init(struct device_node *np, void __iomem *iobase; int ret, nrirqs, parent_irq, i; u32 reg; - const struct irq_domain_ops *domain_ops = &irq_generic_chip_ops; - - /* Map the parent interrupt for the chained handler */ - parent_irq = irq_of_parse_and_map(np, 0); - if (parent_irq <= 0) { - pr_err("%pOF: unable to parse irq\n", np); - return -EINVAL; + const struct irq_domain_ops *domain_ops; + + if (!parent || (np == parent)) { + /* It's used as the primary interrupt controller */ + parent_irq = 0; + domain_ops = &dw_apb_ictl_irq_domain_ops; + } else { + /* Map the parent interrupt for the chained handler */ + parent_irq = irq_of_parse_and_map(np, 0); + if (parent_irq <= 0) { + pr_err("%pOF: unable to parse irq\n", np); + return -EINVAL; + } + domain_ops = &irq_generic_chip_ops; } ret = of_address_to_resource(np, 0, &r); @@ -146,8 +199,13 @@ static int __init dw_apb_ictl_init(struct device_node *np, gc->chip_types[0].chip.irq_resume = dw_apb_ictl_resume; } - irq_set_chained_handler_and_data(parent_irq, + if (parent_irq) { + irq_set_chained_handler_and_data(parent_irq, dw_apb_ictl_handle_irq_cascaded, domain); + } else { + dw_apb_ictl_irq_domain = domain; + set_handle_irq(dw_apb_ictl_handle_irq); + } return 0; From patchwork Thu Sep 24 07:17:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 313451 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1117420ilg; Thu, 24 Sep 2020 00:19:46 -0700 (PDT) X-Google-Smtp-Source: ABdhPJymNJhIweYHbosRVd9jWCaXue6Xo+yNMA7BGvbaIhmrTyGCCKQJQlbAs0UF5PGd8njtSBR1 X-Received: by 2002:a17:906:e88:: with SMTP id p8mr3447969ejf.134.1600931986812; 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[23.128.96.18]) by mx.google.com with ESMTP id j19si1394050ejx.272.2020.09.24.00.19.46; Thu, 24 Sep 2020 00:19:46 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727210AbgIXHTp (ORCPT + 6 others); Thu, 24 Sep 2020 03:19:45 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:45684 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727030AbgIXHTl (ORCPT ); Thu, 24 Sep 2020 03:19:41 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id E2A5B6417747A76B4C8A; Thu, 24 Sep 2020 15:19:37 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Thu, 24 Sep 2020 15:19:28 +0800 From: Zhen Lei To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , "Alexey Brodkin" , Vineet Gupta , devicetree , linux-snps-arc , linux-kernel CC: Zhen Lei , Sebastian Hesselbarth , Haoyu Lv , Libin , Kefeng Wang Subject: [PATCH v6 4/6] dt-bindings: dw-apb-ictl: support hierarchy irq domain Date: Thu, 24 Sep 2020 15:17:52 +0800 Message-ID: <20200924071754.4509-5-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200924071754.4509-1-thunder.leizhen@huawei.com> References: <20200924071754.4509-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add support to use dw-apb-ictl as primary interrupt controller. Signed-off-by: Zhen Lei Reviewed-by: Rob Herring --- .../bindings/interrupt-controller/snps,dw-apb-ictl.txt | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) -- 1.8.3 diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt index 086ff08322db94f..2db59df9408f4c6 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt @@ -2,7 +2,8 @@ Synopsys DesignWare APB interrupt controller (dw_apb_ictl) Synopsys DesignWare provides interrupt controller IP for APB known as dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with -APB bus, e.g. Marvell Armada 1500. +APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt +controller in some SoCs, e.g. Hisilicon SD5203. Required properties: - compatible: shall be "snps,dw-apb-ictl" @@ -10,6 +11,8 @@ Required properties: region starting with ENABLE_LOW register - interrupt-controller: identifies the node as an interrupt controller - #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1 + +Additional required property when it's used as secondary interrupt controller: - interrupts: interrupt reference to primary interrupt controller The interrupt sources map to the corresponding bits in the interrupt @@ -21,6 +24,7 @@ registers, i.e. - (optional) fast interrupts start at 64. Example: + /* dw_apb_ictl is used as secondary interrupt controller */ aic: interrupt-controller@3000 { compatible = "snps,dw-apb-ictl"; reg = <0x3000 0xc00>; @@ -29,3 +33,11 @@ Example: interrupt-parent = <&gic>; interrupts = ; }; + + /* dw_apb_ictl is used as primary interrupt controller */ + vic: interrupt-controller@10130000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x10130000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; From patchwork Thu Sep 24 07:17:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 313452 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1117429ilg; Thu, 24 Sep 2020 00:19:47 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwDw9wdpszkhHvzDlM49ZF3S581nSse6srtxhlt9d0dYVYD6VAMoalslN6Apz3Sxxrq2SLQ X-Received: by 2002:aa7:ce19:: with SMTP id d25mr3152153edv.189.1600931987715; Thu, 24 Sep 2020 00:19:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600931987; cv=none; d=google.com; s=arc-20160816; b=QcItmVCWWzLYXuNINWPR06QQitVTuzXC7ecBfd7rNAqsWMaKfYShK7djWQEfov1gzA R1jG6ajSs3zUfYnSlQK1GOfGkwo7CNDoYMH6NWZ9XQ8dEg/1DHe26XIu2Z3AYFZhxz5y caRdTIjRd1xFzkET2MSrGTMCKyHw/0AvyAMsNiwOytdN/6x7XzxlB2wkFfkE5+71Dn50 RYaE2Yck0G8OD6PsufZTyBvT+z6S+VGDF9CtNiRb+RXT89wtNxX4kT3NAYmPmJaF+48K kJa4kESrmkkh6yZqaLt/T65VNem/Zc7RysSoaOP0FNDuH7eOmoCnpCYRtptaUzY3sTBF dW9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=UvoPzmUQI7wvJV240fnFDBD82L+8dZdrtEpUIzI43S4=; b=y9DvFOIJwk2Ple7VRId4bwRmAFV7mIvcgM/xEh6emXLcOxX0AfEXVBcrl5kU5uJTC3 uQg1B46fwZuFTvE/x9d/dJRV3O7Qmsbb4+GiBObsSLgiDlbwNK8Md3q5c7fQdp9ek+l3 aP95KSMW9t1KqztvfYig8iLKuhK/kPBPC+lkEI9qg2yLke3EBWH+M/CnPGysF9DJ0En+ pfkmJ063XqMFeGq59Z323naRYP6DiAHl2HdHPM9pYcwp8Hla14Gf4iXNyA3nWb3s37Ch aoXO+vf2U/UpURgAGrAtKe3kyk1KNtl3shUg4N3+3C9wrjrjIQQ5T1oivAvqOLicdDUY Ar8w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j19si1394050ejx.272.2020.09.24.00.19.47; Thu, 24 Sep 2020 00:19:47 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727180AbgIXHTo (ORCPT + 6 others); Thu, 24 Sep 2020 03:19:44 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:45674 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727054AbgIXHTl (ORCPT ); Thu, 24 Sep 2020 03:19:41 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id DACED760207721AC7E87; Thu, 24 Sep 2020 15:19:37 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Thu, 24 Sep 2020 15:19:29 +0800 From: Zhen Lei To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , "Alexey Brodkin" , Vineet Gupta , devicetree , linux-snps-arc , linux-kernel CC: Zhen Lei , Sebastian Hesselbarth , Haoyu Lv , Libin , Kefeng Wang Subject: [PATCH v6 5/6] dt-bindings: dw-apb-ictl: convert to json-schema Date: Thu, 24 Sep 2020 15:17:53 +0800 Message-ID: <20200924071754.4509-6-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200924071754.4509-1-thunder.leizhen@huawei.com> References: <20200924071754.4509-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the Synopsys DesignWare APB interrupt controller (dw_apb_ictl) binding to DT schema format using json-schema. Signed-off-by: Zhen Lei --- .../interrupt-controller/snps,dw-apb-ictl.txt | 43 ------------- .../interrupt-controller/snps,dw-apb-ictl.yaml | 74 ++++++++++++++++++++++ 2 files changed, 74 insertions(+), 43 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml -- 1.8.3 diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt deleted file mode 100644 index 2db59df9408f4c6..000000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt +++ /dev/null @@ -1,43 +0,0 @@ -Synopsys DesignWare APB interrupt controller (dw_apb_ictl) - -Synopsys DesignWare provides interrupt controller IP for APB known as -dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with -APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt -controller in some SoCs, e.g. Hisilicon SD5203. - -Required properties: -- compatible: shall be "snps,dw-apb-ictl" -- reg: physical base address of the controller and length of memory mapped - region starting with ENABLE_LOW register -- interrupt-controller: identifies the node as an interrupt controller -- #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1 - -Additional required property when it's used as secondary interrupt controller: -- interrupts: interrupt reference to primary interrupt controller - -The interrupt sources map to the corresponding bits in the interrupt -registers, i.e. -- 0 maps to bit 0 of low interrupts, -- 1 maps to bit 1 of low interrupts, -- 32 maps to bit 0 of high interrupts, -- 33 maps to bit 1 of high interrupts, -- (optional) fast interrupts start at 64. - -Example: - /* dw_apb_ictl is used as secondary interrupt controller */ - aic: interrupt-controller@3000 { - compatible = "snps,dw-apb-ictl"; - reg = <0x3000 0xc00>; - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = ; - }; - - /* dw_apb_ictl is used as primary interrupt controller */ - vic: interrupt-controller@10130000 { - compatible = "snps,dw-apb-ictl"; - reg = <0x10130000 0x1000>; - interrupt-controller; - #interrupt-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml new file mode 100644 index 000000000000000..1b05d36b5f7b943 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/snps,dw-apb-ictl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare APB interrupt controller (dw_apb_ictl) + +maintainers: + - Sebastian Hesselbarth + +description: | + Synopsys DesignWare provides interrupt controller IP for APB known as + dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs + with APB bus, e.g. Marvell Armada 1500. It can also be used as primary + interrupt controller in some SoCs, e.g. Hisilicon SD5203. + + The interrupt sources map to the corresponding bits in the interrupt + registers, i.e. + - 0 maps to bit 0 of low interrupts, + - 1 maps to bit 1 of low interrupts, + - 32 maps to bit 0 of high interrupts, + - 33 maps to bit 1 of high interrupts, + - (optional) fast interrupts start at 64. + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + const: snps,dw-apb-ictl + + interrupt-controller: true + + reg: + description: | + Physical base address of the controller and length of memory mapped + region starting with ENABLE_LOW register. + maxItems: 1 + + interrupts: + description: Interrupt reference to primary interrupt controller. + maxItems: 1 + + "#interrupt-cells": + description: Number of cells to encode an interrupt-specifier. + const: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +examples: + - | + /* dw_apb_ictl is used as secondary interrupt controller */ + aic: interrupt-controller@3000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x3000 0xc00>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = <0 3 4>; + }; + + /* dw_apb_ictl is used as primary interrupt controller */ + vic: interrupt-controller@10130000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x10130000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; +... 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[23.128.96.18]) by mx.google.com with ESMTP id j35si1472165edc.541.2020.09.24.00.19.59; Thu, 24 Sep 2020 00:19:59 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727151AbgIXHTo (ORCPT + 6 others); Thu, 24 Sep 2020 03:19:44 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:53230 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726929AbgIXHTm (ORCPT ); Thu, 24 Sep 2020 03:19:42 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id C7F1F5720738CBE2A4A6; Thu, 24 Sep 2020 15:19:37 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Thu, 24 Sep 2020 15:19:30 +0800 From: Zhen Lei To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , "Alexey Brodkin" , Vineet Gupta , devicetree , linux-snps-arc , linux-kernel CC: Zhen Lei , Sebastian Hesselbarth , Haoyu Lv , Libin , Kefeng Wang Subject: [PATCH v6 6/6] ARC: [dts] fix the errors detected by dtbs_check Date: Thu, 24 Sep 2020 15:17:54 +0800 Message-ID: <20200924071754.4509-7-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200924071754.4509-1-thunder.leizhen@huawei.com> References: <20200924071754.4509-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org xxx/arc/boot/dts/axs101.dt.yaml: dw-apb-ictl@e0012000: $nodename:0: \ 'dw-apb-ictl@e0012000' does not match '^interrupt-controller(@[0-9a-f,]+)*$' >From schema: xxx/interrupt-controller/snps,dw-apb-ictl.yaml The node name of the interrupt controller must start with "interrupt-controller" instead of "dw-apb-ictl". Signed-off-by: Zhen Lei --- arch/arc/boot/dts/axc001.dtsi | 2 +- arch/arc/boot/dts/axc003.dtsi | 2 +- arch/arc/boot/dts/axc003_idu.dtsi | 2 +- arch/arc/boot/dts/vdk_axc003.dtsi | 2 +- arch/arc/boot/dts/vdk_axc003_idu.dtsi | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) -- 1.8.3 diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi index 79ec27c043c1da7..2a151607b08057c 100644 --- a/arch/arc/boot/dts/axc001.dtsi +++ b/arch/arc/boot/dts/axc001.dtsi @@ -91,7 +91,7 @@ * avoid duplicating the MB dtsi file given that IRQ from * this intc to cpu intc are different for axs101 and axs103 */ - mb_intc: dw-apb-ictl@e0012000 { + mb_intc: interrupt-controller@e0012000 { #interrupt-cells = <1>; compatible = "snps,dw-apb-ictl"; reg = < 0x0 0xe0012000 0x0 0x200 >; diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi index ac8e1b463a70992..cd1edcf4f95efe6 100644 --- a/arch/arc/boot/dts/axc003.dtsi +++ b/arch/arc/boot/dts/axc003.dtsi @@ -129,7 +129,7 @@ * avoid duplicating the MB dtsi file given that IRQ from * this intc to cpu intc are different for axs101 and axs103 */ - mb_intc: dw-apb-ictl@e0012000 { + mb_intc: interrupt-controller@e0012000 { #interrupt-cells = <1>; compatible = "snps,dw-apb-ictl"; reg = < 0x0 0xe0012000 0x0 0x200 >; diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi index 9da21e7fd246f9f..70779386ca7963a 100644 --- a/arch/arc/boot/dts/axc003_idu.dtsi +++ b/arch/arc/boot/dts/axc003_idu.dtsi @@ -135,7 +135,7 @@ * avoid duplicating the MB dtsi file given that IRQ from * this intc to cpu intc are different for axs101 and axs103 */ - mb_intc: dw-apb-ictl@e0012000 { + mb_intc: interrupt-controller@e0012000 { #interrupt-cells = <1>; compatible = "snps,dw-apb-ictl"; reg = < 0x0 0xe0012000 0x0 0x200 >; diff --git a/arch/arc/boot/dts/vdk_axc003.dtsi b/arch/arc/boot/dts/vdk_axc003.dtsi index f8be7ba8dad499c..c21d0eb07bf6737 100644 --- a/arch/arc/boot/dts/vdk_axc003.dtsi +++ b/arch/arc/boot/dts/vdk_axc003.dtsi @@ -46,7 +46,7 @@ }; - mb_intc: dw-apb-ictl@e0012000 { + mb_intc: interrupt-controller@e0012000 { #interrupt-cells = <1>; compatible = "snps,dw-apb-ictl"; reg = < 0xe0012000 0x200 >; diff --git a/arch/arc/boot/dts/vdk_axc003_idu.dtsi b/arch/arc/boot/dts/vdk_axc003_idu.dtsi index 0afa3e53a4e3932..4d348853ac7c5dc 100644 --- a/arch/arc/boot/dts/vdk_axc003_idu.dtsi +++ b/arch/arc/boot/dts/vdk_axc003_idu.dtsi @@ -54,7 +54,7 @@ }; - mb_intc: dw-apb-ictl@e0012000 { + mb_intc: interrupt-controller@e0012000 { #interrupt-cells = <1>; compatible = "snps,dw-apb-ictl"; reg = < 0xe0012000 0x200 >;