From patchwork Thu Oct 15 05:28:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengjiu Wang X-Patchwork-Id: 317762 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp158764ilm; Wed, 14 Oct 2020 22:33:48 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzPCluZwd4lbAfJaVWlY/gzWt70Wb5MSutF2zR4mgMAhnAEh/9R6who212lpPmQG7FdvL+S X-Received: by 2002:a17:906:a392:: with SMTP id k18mr2610983ejz.35.1602740028402; Wed, 14 Oct 2020 22:33:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602740028; cv=none; d=google.com; s=arc-20160816; b=kNWSWy09KoO31kzVisYSEId7BsxE6xoSeBdVSa02vEdw1bYKLMagBhegQsmiWumFwx 1JTvAQIfEx9gNezsq2cMN4SbRD6JNeYfrQfb1u0VWJuuHOzCiuz8GGxSEsbA4A9Eyy9l yQUXUyJHlzM2+qqfXlcfvoOR/XlnkS6SEN4+fzv0EaJodM6Sa//l3y6Vm1mocqT8n+tn kzNJYmGMojjQ47UoXXT5vubSl5zSyH5T2PJL5X1PEdzXvUJ+8QhA4Q1nzu6wFQhgkHZs mpXRVpx8AomNvCI17UAqYzCSGb0Id0F/OFD48xfo4vBYBc92tyfgP5C0AkORZvw7EFVl Qesg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:message-id:date:subject:cc:to:from; bh=fVHGie4NI5RamE2bMt5OC1HoIom0QcT5Nh2LOgnYUBE=; b=mUUAP23YqzqjsolV4zIqouA0ZshVL5GV+5+SFDN/L+etSA0W+7UDGmfF3ezwvsOROy I9nGzcWNF2dmcTjSyLt7NAa8/Duz+HYSyWeQTiFRd2uA5ivkf8H6+HBOjixYU4LOrkIp YwoyXm8lZ+4LNDCDEsvGDwZnIXwblICkT83M+04WM9QtzmczKhBu6VBO461UBtRIY+Ui qOlDAgK2jJeC6nU40rNaQfrlS/VLSHetrK/EuUglhXQp+73mUWDAaIe9oCBdCc6EG7Kz b6hT1hvtiS+i06kjS24nCWx3nw1ILdmppok3WfEYj3w0oC7xpKIY7Dnj73OoTE4EsAwA SYAA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z24si1262107edl.8.2020.10.14.22.33.47; Wed, 14 Oct 2020 22:33:48 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727790AbgJOFdr (ORCPT + 6 others); Thu, 15 Oct 2020 01:33:47 -0400 Received: from inva020.nxp.com ([92.121.34.13]:48148 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726307AbgJOFdr (ORCPT ); Thu, 15 Oct 2020 01:33:47 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 0C0F31A06CE; Thu, 15 Oct 2020 07:33:45 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id E1BFC1A0693; Thu, 15 Oct 2020 07:33:39 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 6335540323; Thu, 15 Oct 2020 07:33:33 +0200 (CEST) From: Shengjiu Wang To: timur@kernel.org, nicoleotsuka@gmail.com, Xiubo.Lee@gmail.com, festevam@gmail.com, broonie@kernel.org, perex@perex.cz, tiwai@suse.com, alsa-devel@alsa-project.org, lgirdwood@gmail.com, robh+dt@kernel.org, devicetree@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] ASoC: dt-bindings: fsl_spdif: Add new compatible string for i.MX8QM Date: Thu, 15 Oct 2020 13:28:47 +0800 Message-Id: <1602739728-4433-1-git-send-email-shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add new compatible string "fsl,imx8qm-spdif" for supporting spdif module on i.MX8QM. Signed-off-by: Shengjiu Wang --- Documentation/devicetree/bindings/sound/fsl,spdif.yaml | 1 + 1 file changed, 1 insertion(+) -- 2.27.0 Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/sound/fsl,spdif.yaml b/Documentation/devicetree/bindings/sound/fsl,spdif.yaml index 2ac671f5cb9b..50449b6d1048 100644 --- a/Documentation/devicetree/bindings/sound/fsl,spdif.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,spdif.yaml @@ -20,6 +20,7 @@ properties: - fsl,imx35-spdif - fsl,vf610-spdif - fsl,imx6sx-spdif + - fsl,imx8qm-spdif reg: maxItems: 1 From patchwork Thu Oct 15 05:28:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengjiu Wang X-Patchwork-Id: 317763 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp158786ilm; Wed, 14 Oct 2020 22:33:51 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwcFhwd6ix7Gx5wU5L5JkvT+b0NMqd6OPMlRrRsi7auDt1h6HLCuzRA8lgwNfyqDFuM79KZ X-Received: by 2002:a17:907:10ce:: with SMTP id rv14mr2600384ejb.547.1602740031491; Wed, 14 Oct 2020 22:33:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602740031; cv=none; d=google.com; s=arc-20160816; b=Fcgr4sm7frx67t2MX8mJPY/ELzLLJgYz8ONTq95ioFQzyvq8c3ydsvTM6IC/zz1X1n 2gSgrksDjuT0eVxNmTAru9ou/w61+B/HE2cNzJ+9rEGUpQZ2JkmOhzy0CAFKi9F7GA1W heuzekdK8ixpuHH1Kt6npPZdXibWsPxKba3e7aCwjEnh/4f/almX5byZTo/Wsh8Ohwzm A+6/gqYsA7HnAzGSBoTgTE8nx/ibEy8RZAesCTocxwHkvNuvJY4uCsTq9SwpKCyg7fhD xIDYqKzqX6pApTq++hdeoNGfniQAXF0C14t+fIUIQahLJ86vzRwVz4gtUa7267RoRluV LnCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=eshPCsHnWMeXTqm3r52ZXc0wQV+W0Gcha6IpqiK/BgA=; b=FZg9bzUM/L1gliG3SplqOf4nABPPH4yoLHt0Ju4tyI8fc+VWgjd9hC/5zZIaAM6+6k U6IXE/NLiIB3Sy5VhbnEt4Hwk+q8L8ifFSNx+mS2rfH51pEY34X+SjIJGgCdvs82yv8r So7AKvYBg3MSb4hZ76OsC0THXavPO31xWSkARH9hU3xt8wK3Hh6MWmae8lLN72z7v6wr m01GBbFPVp/kR0V+wCt+e3mXmIF9SsKP9YA13m5QJ79Jk37NYHgRYhj1cvT/UxJTBf4m 5yghTLPSpx8ieb4wihDVk3fCPYzL6lPFh3jMI93ZrVhLM8lGF0tZ2dWObjGzOJzagKLh Ubww== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z24si1262107edl.8.2020.10.14.22.33.51; Wed, 14 Oct 2020 22:33:51 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726307AbgJOFdu (ORCPT + 6 others); Thu, 15 Oct 2020 01:33:50 -0400 Received: from inva021.nxp.com ([92.121.34.21]:48898 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726323AbgJOFds (ORCPT ); Thu, 15 Oct 2020 01:33:48 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id EF5E6200557; Thu, 15 Oct 2020 07:33:45 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id AAE992006C9; Thu, 15 Oct 2020 07:33:40 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 8B10440327; Thu, 15 Oct 2020 07:33:34 +0200 (CEST) From: Shengjiu Wang To: timur@kernel.org, nicoleotsuka@gmail.com, Xiubo.Lee@gmail.com, festevam@gmail.com, broonie@kernel.org, perex@perex.cz, tiwai@suse.com, alsa-devel@alsa-project.org, lgirdwood@gmail.com, robh+dt@kernel.org, devicetree@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] ASoC: fsl_spdif: Add support for i.MX8QM platform Date: Thu, 15 Oct 2020 13:28:48 +0800 Message-Id: <1602739728-4433-2-git-send-email-shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1602739728-4433-1-git-send-email-shengjiu.wang@nxp.com> References: <1602739728-4433-1-git-send-email-shengjiu.wang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On i.MX8QM, there are separate interrupts for TX and RX. As the EDMA can't be configured to swing back to first FIFO after writing the second FIFO, so we need to force the burst size to be 2 on i.MX8QM. And EDMA don't support to shift the data from S24_LE to S16_LE, so the supported TX format is also different on i.MX8QM. Signed-off-by: Shengjiu Wang --- sound/soc/fsl/fsl_spdif.c | 57 ++++++++++++++++++++++++++++++++------- 1 file changed, 47 insertions(+), 10 deletions(-) -- 2.27.0 Acked-by: Nicolin Chen diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c index f41496cf5b63..5fa178f3f497 100644 --- a/sound/soc/fsl/fsl_spdif.c +++ b/sound/soc/fsl/fsl_spdif.c @@ -49,10 +49,18 @@ static u8 srpc_dpll_locked[] = { 0x0, 0x1, 0x2, 0x3, 0x4, 0xa, 0xb }; * @imx: for imx platform * @shared_root_clock: flag of sharing a clock source with others; * so the driver shouldn't set root clock rate + * @interrupts: interrupt number + * @tx_burst: tx maxburst size + * @rx_burst: rx maxburst size + * @tx_formats: tx supported data format */ struct fsl_spdif_soc_data { bool imx; bool shared_root_clock; + u32 interrupts; + u32 tx_burst; + u32 rx_burst; + u64 tx_formats; }; /* @@ -128,16 +136,38 @@ struct fsl_spdif_priv { static struct fsl_spdif_soc_data fsl_spdif_vf610 = { .imx = false, .shared_root_clock = false, + .interrupts = 1, + .tx_burst = FSL_SPDIF_TXFIFO_WML, + .rx_burst = FSL_SPDIF_RXFIFO_WML, + .tx_formats = FSL_SPDIF_FORMATS_PLAYBACK, }; static struct fsl_spdif_soc_data fsl_spdif_imx35 = { .imx = true, .shared_root_clock = false, + .interrupts = 1, + .tx_burst = FSL_SPDIF_TXFIFO_WML, + .rx_burst = FSL_SPDIF_RXFIFO_WML, + .tx_formats = FSL_SPDIF_FORMATS_PLAYBACK, }; static struct fsl_spdif_soc_data fsl_spdif_imx6sx = { .imx = true, .shared_root_clock = true, + .interrupts = 1, + .tx_burst = FSL_SPDIF_TXFIFO_WML, + .rx_burst = FSL_SPDIF_RXFIFO_WML, + .tx_formats = FSL_SPDIF_FORMATS_PLAYBACK, + +}; + +static struct fsl_spdif_soc_data fsl_spdif_imx8qm = { + .imx = true, + .shared_root_clock = true, + .interrupts = 2, + .tx_burst = 2, /* Applied for EDMA */ + .rx_burst = 2, /* Applied for EDMA */ + .tx_formats = SNDRV_PCM_FMTBIT_S24_LE, /* Applied for EDMA */ }; /* Check if clk is a root clock that does not share clock source with others */ @@ -1283,6 +1313,8 @@ static int fsl_spdif_probe(struct platform_device *pdev) /* Initialize this copy of the CPU DAI driver structure */ memcpy(&spdif_priv->cpu_dai_drv, &fsl_spdif_dai, sizeof(fsl_spdif_dai)); spdif_priv->cpu_dai_drv.name = dev_name(&pdev->dev); + spdif_priv->cpu_dai_drv.playback.formats = + spdif_priv->soc->tx_formats; /* Get the addresses and IRQ */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -1297,15 +1329,19 @@ static int fsl_spdif_probe(struct platform_device *pdev) return PTR_ERR(spdif_priv->regmap); } - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return irq; + for (i = 0; i < spdif_priv->soc->interrupts; i++) { + irq = platform_get_irq(pdev, i); + if (irq < 0) { + dev_err(&pdev->dev, "no irq for node %s\n", pdev->name); + return irq; + } - ret = devm_request_irq(&pdev->dev, irq, spdif_isr, 0, - dev_name(&pdev->dev), spdif_priv); - if (ret) { - dev_err(&pdev->dev, "could not claim irq %u\n", irq); - return ret; + ret = devm_request_irq(&pdev->dev, irq, spdif_isr, 0, + dev_name(&pdev->dev), spdif_priv); + if (ret) { + dev_err(&pdev->dev, "could not claim irq %u\n", irq); + return ret; + } } /* Get system clock for rx clock rate calculation */ @@ -1354,8 +1390,8 @@ static int fsl_spdif_probe(struct platform_device *pdev) spdif_priv->dpll_locked = false; - spdif_priv->dma_params_tx.maxburst = FSL_SPDIF_TXFIFO_WML; - spdif_priv->dma_params_rx.maxburst = FSL_SPDIF_RXFIFO_WML; + spdif_priv->dma_params_tx.maxburst = spdif_priv->soc->tx_burst; + spdif_priv->dma_params_rx.maxburst = spdif_priv->soc->rx_burst; spdif_priv->dma_params_tx.addr = res->start + REG_SPDIF_STL; spdif_priv->dma_params_rx.addr = res->start + REG_SPDIF_SRL; @@ -1468,6 +1504,7 @@ static const struct of_device_id fsl_spdif_dt_ids[] = { { .compatible = "fsl,imx35-spdif", .data = &fsl_spdif_imx35, }, { .compatible = "fsl,vf610-spdif", .data = &fsl_spdif_vf610, }, { .compatible = "fsl,imx6sx-spdif", .data = &fsl_spdif_imx6sx, }, + { .compatible = "fsl,imx8qm-spdif", .data = &fsl_spdif_imx8qm, }, {} }; MODULE_DEVICE_TABLE(of, fsl_spdif_dt_ids);