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[209.132.180.67]) by mx.google.com with ESMTP id r80si726949pfk.216.2018.01.03.05.36.10; Wed, 03 Jan 2018 05:36:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752663AbeACNgI (ORCPT + 28 others); Wed, 3 Jan 2018 08:36:08 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:49956 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751188AbeACNgG (ORCPT ); Wed, 3 Jan 2018 08:36:06 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DFF7C1529; Wed, 3 Jan 2018 05:36:05 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5B52E3F24A; Wed, 3 Jan 2018 05:36:04 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 01/27] staging: ccree: SPDXify driver Date: Wed, 3 Jan 2018 13:35:08 +0000 Message-Id: <1514986544-5888-2-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace verbatim GPL v2 copy with SPDX tag. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/Kconfig | 2 ++ drivers/staging/ccree/Makefile | 2 ++ drivers/staging/ccree/cc_crypto_ctx.h | 17 ++--------------- drivers/staging/ccree/cc_debugfs.c | 17 ++--------------- drivers/staging/ccree/cc_debugfs.h | 17 ++--------------- drivers/staging/ccree/cc_hw_queue_defs.h | 17 ++--------------- drivers/staging/ccree/cc_lli_defs.h | 17 ++--------------- drivers/staging/ccree/dx_crys_kernel.h | 17 ++--------------- drivers/staging/ccree/dx_host.h | 17 ++--------------- drivers/staging/ccree/dx_reg_common.h | 17 ++--------------- drivers/staging/ccree/hash_defs.h | 17 ++--------------- drivers/staging/ccree/ssi_aead.c | 17 ++--------------- drivers/staging/ccree/ssi_aead.h | 17 ++--------------- drivers/staging/ccree/ssi_buffer_mgr.c | 17 ++--------------- drivers/staging/ccree/ssi_buffer_mgr.h | 17 ++--------------- drivers/staging/ccree/ssi_cipher.c | 17 ++--------------- drivers/staging/ccree/ssi_cipher.h | 17 ++--------------- drivers/staging/ccree/ssi_driver.c | 17 ++--------------- drivers/staging/ccree/ssi_driver.h | 17 ++--------------- drivers/staging/ccree/ssi_fips.c | 17 ++--------------- drivers/staging/ccree/ssi_fips.h | 17 ++--------------- drivers/staging/ccree/ssi_hash.c | 17 ++--------------- drivers/staging/ccree/ssi_hash.h | 17 ++--------------- drivers/staging/ccree/ssi_ivgen.c | 17 ++--------------- drivers/staging/ccree/ssi_ivgen.h | 17 ++--------------- drivers/staging/ccree/ssi_pm.c | 17 ++--------------- drivers/staging/ccree/ssi_pm.h | 17 ++--------------- drivers/staging/ccree/ssi_request_mgr.c | 17 ++--------------- drivers/staging/ccree/ssi_request_mgr.h | 17 ++--------------- drivers/staging/ccree/ssi_sram_mgr.c | 17 ++--------------- drivers/staging/ccree/ssi_sram_mgr.h | 17 ++--------------- 31 files changed, 62 insertions(+), 435 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/Kconfig b/drivers/staging/ccree/Kconfig index 0b3092b..c94dfe8 100644 --- a/drivers/staging/ccree/Kconfig +++ b/drivers/staging/ccree/Kconfig @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0 + config CRYPTO_DEV_CCREE tristate "Support for ARM TrustZone CryptoCell C7XX family of Crypto accelerators" depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA diff --git a/drivers/staging/ccree/Makefile b/drivers/staging/ccree/Makefile index ab9f073..bb47144 100644 --- a/drivers/staging/ccree/Makefile +++ b/drivers/staging/ccree/Makefile @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0 + obj-$(CONFIG_CRYPTO_DEV_CCREE) := ccree.o ccree-y := ssi_driver.o ssi_buffer_mgr.o ssi_request_mgr.o ssi_cipher.o ssi_hash.o ssi_aead.o ssi_ivgen.o ssi_sram_mgr.o ssi_pm.o ccree-$(CONFIG_CRYPTO_FIPS) += ssi_fips.o diff --git a/drivers/staging/ccree/cc_crypto_ctx.h b/drivers/staging/ccree/cc_crypto_ctx.h index 0e34d9a..1b2698f 100644 --- a/drivers/staging/ccree/cc_crypto_ctx.h +++ b/drivers/staging/ccree/cc_crypto_ctx.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #ifndef _CC_CRYPTO_CTX_H_ #define _CC_CRYPTO_CTX_H_ diff --git a/drivers/staging/ccree/cc_debugfs.c b/drivers/staging/ccree/cc_debugfs.c index 662fa07..518cefd 100644 --- a/drivers/staging/ccree/cc_debugfs.c +++ b/drivers/staging/ccree/cc_debugfs.c @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #include #include diff --git a/drivers/staging/ccree/cc_debugfs.h b/drivers/staging/ccree/cc_debugfs.h index edfe9ba..b77e099 100644 --- a/drivers/staging/ccree/cc_debugfs.h +++ b/drivers/staging/ccree/cc_debugfs.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #ifndef __CC_DEBUGFS_H__ #define __CC_DEBUGFS_H__ diff --git a/drivers/staging/ccree/cc_hw_queue_defs.h b/drivers/staging/ccree/cc_hw_queue_defs.h index 7c25a4f..c06c791 100644 --- a/drivers/staging/ccree/cc_hw_queue_defs.h +++ b/drivers/staging/ccree/cc_hw_queue_defs.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #ifndef __CC_HW_QUEUE_DEFS_H__ #define __CC_HW_QUEUE_DEFS_H__ diff --git a/drivers/staging/ccree/cc_lli_defs.h b/drivers/staging/ccree/cc_lli_defs.h index 861634a..c256b06 100644 --- a/drivers/staging/ccree/cc_lli_defs.h +++ b/drivers/staging/ccree/cc_lli_defs.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #ifndef _CC_LLI_DEFS_H_ #define _CC_LLI_DEFS_H_ diff --git a/drivers/staging/ccree/dx_crys_kernel.h b/drivers/staging/ccree/dx_crys_kernel.h index 30719f4..fb08beb 100644 --- a/drivers/staging/ccree/dx_crys_kernel.h +++ b/drivers/staging/ccree/dx_crys_kernel.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #ifndef __CC_CRYS_KERNEL_H__ #define __CC_CRYS_KERNEL_H__ diff --git a/drivers/staging/ccree/dx_host.h b/drivers/staging/ccree/dx_host.h index e90afbc..dc1f1b4 100644 --- a/drivers/staging/ccree/dx_host.h +++ b/drivers/staging/ccree/dx_host.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #ifndef __CC_HOST_H__ #define __CC_HOST_H__ diff --git a/drivers/staging/ccree/dx_reg_common.h b/drivers/staging/ccree/dx_reg_common.h index 8334d9f..84184d2 100644 --- a/drivers/staging/ccree/dx_reg_common.h +++ b/drivers/staging/ccree/dx_reg_common.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #ifndef __CC_REG_COMMON_H__ #define __CC_REG_COMMON_H__ diff --git a/drivers/staging/ccree/hash_defs.h b/drivers/staging/ccree/hash_defs.h index f52656f..efe403c 100644 --- a/drivers/staging/ccree/hash_defs.h +++ b/drivers/staging/ccree/hash_defs.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #ifndef _HASH_DEFS_H_ #define _HASH_DEFS_H_ diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c index 1522b00..5276bde 100644 --- a/drivers/staging/ccree/ssi_aead.c +++ b/drivers/staging/ccree/ssi_aead.c @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #include #include diff --git a/drivers/staging/ccree/ssi_aead.h b/drivers/staging/ccree/ssi_aead.h index 2507be1..0f3dcb3 100644 --- a/drivers/staging/ccree/ssi_aead.h +++ b/drivers/staging/ccree/ssi_aead.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ /* \file ssi_aead.h * ARM CryptoCell AEAD Crypto API diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c index 6846d93..60fcee4 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.c +++ b/drivers/staging/ccree/ssi_buffer_mgr.c @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #include #include diff --git a/drivers/staging/ccree/ssi_buffer_mgr.h b/drivers/staging/ccree/ssi_buffer_mgr.h index 395c93f..a9c0b2e 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.h +++ b/drivers/staging/ccree/ssi_buffer_mgr.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ /* \file buffer_mgr.h * Buffer Manager diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c index db21570..71d3e79 100644 --- a/drivers/staging/ccree/ssi_cipher.c +++ b/drivers/staging/ccree/ssi_cipher.c @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #include #include diff --git a/drivers/staging/ccree/ssi_cipher.h b/drivers/staging/ccree/ssi_cipher.h index 5d94cd3..e72327e 100644 --- a/drivers/staging/ccree/ssi_cipher.h +++ b/drivers/staging/ccree/ssi_cipher.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ /* \file ssi_cipher.h * ARM CryptoCell Cipher Crypto API diff --git a/drivers/staging/ccree/ssi_driver.c b/drivers/staging/ccree/ssi_driver.c index 1254c69..9b4c064 100644 --- a/drivers/staging/ccree/ssi_driver.c +++ b/drivers/staging/ccree/ssi_driver.c @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #include #include diff --git a/drivers/staging/ccree/ssi_driver.h b/drivers/staging/ccree/ssi_driver.h index bf83f3e..e0cd7b4 100644 --- a/drivers/staging/ccree/ssi_driver.h +++ b/drivers/staging/ccree/ssi_driver.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ /* \file ssi_driver.h * ARM CryptoCell Linux Crypto Driver diff --git a/drivers/staging/ccree/ssi_fips.c b/drivers/staging/ccree/ssi_fips.c index 9ca6857..0fd05c0 100644 --- a/drivers/staging/ccree/ssi_fips.c +++ b/drivers/staging/ccree/ssi_fips.c @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #include #include diff --git a/drivers/staging/ccree/ssi_fips.h b/drivers/staging/ccree/ssi_fips.h index 8321dde..0d26176 100644 --- a/drivers/staging/ccree/ssi_fips.h +++ b/drivers/staging/ccree/ssi_fips.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #ifndef __CC_FIPS_H__ #define __CC_FIPS_H__ diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 882f1c1..c409dcd 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #include #include diff --git a/drivers/staging/ccree/ssi_hash.h b/drivers/staging/ccree/ssi_hash.h index 81f57fc..a192249 100644 --- a/drivers/staging/ccree/ssi_hash.h +++ b/drivers/staging/ccree/ssi_hash.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ /* \file ssi_hash.h * ARM CryptoCell Hash Crypto API diff --git a/drivers/staging/ccree/ssi_ivgen.c b/drivers/staging/ccree/ssi_ivgen.c index d1b8ce0..94a0502 100644 --- a/drivers/staging/ccree/ssi_ivgen.c +++ b/drivers/staging/ccree/ssi_ivgen.c @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #include #include diff --git a/drivers/staging/ccree/ssi_ivgen.h b/drivers/staging/ccree/ssi_ivgen.h index eeca45e3..d4e19f1 100644 --- a/drivers/staging/ccree/ssi_ivgen.h +++ b/drivers/staging/ccree/ssi_ivgen.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #ifndef __CC_IVGEN_H__ #define __CC_IVGEN_H__ diff --git a/drivers/staging/ccree/ssi_pm.c b/drivers/staging/ccree/ssi_pm.c index 5b80b59..4031881 100644 --- a/drivers/staging/ccree/ssi_pm.c +++ b/drivers/staging/ccree/ssi_pm.c @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #include #include diff --git a/drivers/staging/ccree/ssi_pm.h b/drivers/staging/ccree/ssi_pm.h index 1f601bd..138de71 100644 --- a/drivers/staging/ccree/ssi_pm.h +++ b/drivers/staging/ccree/ssi_pm.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ /* \file ssi_pm.h */ diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c index c57c588..ac6846f 100644 --- a/drivers/staging/ccree/ssi_request_mgr.c +++ b/drivers/staging/ccree/ssi_request_mgr.c @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #include #include diff --git a/drivers/staging/ccree/ssi_request_mgr.h b/drivers/staging/ccree/ssi_request_mgr.h index eb068bf..1698cd4 100644 --- a/drivers/staging/ccree/ssi_request_mgr.h +++ b/drivers/staging/ccree/ssi_request_mgr.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ /* \file request_mgr.h * Request Manager diff --git a/drivers/staging/ccree/ssi_sram_mgr.c b/drivers/staging/ccree/ssi_sram_mgr.c index f72d64a..e178385 100644 --- a/drivers/staging/ccree/ssi_sram_mgr.c +++ b/drivers/staging/ccree/ssi_sram_mgr.c @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #include "ssi_driver.h" #include "ssi_sram_mgr.h" diff --git a/drivers/staging/ccree/ssi_sram_mgr.h b/drivers/staging/ccree/ssi_sram_mgr.h index 181968a..63404d3 100644 --- a/drivers/staging/ccree/ssi_sram_mgr.h +++ b/drivers/staging/ccree/ssi_sram_mgr.h @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #ifndef __CC_SRAM_MGR_H__ #define __CC_SRAM_MGR_H__ From patchwork Wed Jan 3 13:35:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123301 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10180402qgn; Wed, 3 Jan 2018 05:36:36 -0800 (PST) X-Google-Smtp-Source: ACJfBovxBPQcufZTZ8SgSCMeMQ37HgAOLon+2NV+QY/23TFgGXIzFIS4UPq4MkO6CgW9V/I0XRIV X-Received: by 10.101.93.8 with SMTP id e8mr1273294pgr.214.1514986596894; Wed, 03 Jan 2018 05:36:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986596; cv=none; d=google.com; s=arc-20160816; b=kqzkGE6YdXt7QuSU8/uZUXppOiLrtmv9tKAo1HIb1vJ2Qc9yfN/P9GN6T4NX17MPh2 RkKgsuCmZMGyFuTi31KPdiFkqZ2o3QP4zNy09UEXtIVVYvyrgOheqcVKYziLKFTu3p+n XdJ6kE8qoeGffU8xlke2XOUiiDCZWaZDwOHOGGICb90WORPSMUU/gdiC/We3AmU32IJ0 wgv7r9pQL0CiUWgWDMW42S+aO/mb+qr8MOtl1MXf9l6TJltNwWqLmcFmcPyyyFIQ0eBu QfJngF25ZKei9VsplE436O3kdbpoNxtcqXBdEKhAu1lN+huYlEjaT5jXTRdEQ28iAIcr PTLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=pAzczU5mC8QMEzYkbYDtieIx+jZyVJLnRnnhWKSVQ68=; b=gaGMSvv81RMY0BQ7n8fxdotw0hueVacw7jg6+QG2vB/RLvxhNHbJDyPkh9TvnfM8W8 WOJJ6LFH9D7eh0E4l6dNpR29Z5GeO8ysIcW27jqZikk+aZEbyinwgxwOpwfiyM9XQpWG kX4qIn0iw42zBaK/D6sXSSK2oUdnzdB1X4FIKnzq9d3q1FmVVkpWukC0WUreZKqpqFNy 10OfQHIXWICSM3EWj9W70kruFPdTEF729HTfW84u627xl+JvuOz0UWGDLhAEYUEybApL HOqERrwng80gMRz/2ExzaSTyCcsEuFbJfPVvOJm44hbl5uKrF9cHGRP+rLCg0/esrLEf 5Y4g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t64si649209pgc.258.2018.01.03.05.36.36; Wed, 03 Jan 2018 05:36:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752883AbeACNgc (ORCPT + 28 others); Wed, 3 Jan 2018 08:36:32 -0500 Received: from foss.arm.com ([217.140.101.70]:49980 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751329AbeACNga (ORCPT ); Wed, 3 Jan 2018 08:36:30 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A97C11529; Wed, 3 Jan 2018 05:36:29 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2D7423F24A; Wed, 3 Jan 2018 05:36:27 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 03/27] staging: ccree: fold reg common defines into driver Date: Wed, 3 Jan 2018 13:35:10 +0000 Message-Id: <1514986544-5888-4-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Fold the 2 macro defined in dx_reg_common.h into the file they are used in and delete the file. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/cc_crypto_ctx.h | 4 ++-- drivers/staging/ccree/dx_reg_common.h | 13 ------------- drivers/staging/ccree/ssi_driver.h | 5 +++-- 3 files changed, 5 insertions(+), 17 deletions(-) delete mode 100644 drivers/staging/ccree/dx_reg_common.h -- 2.7.4 diff --git a/drivers/staging/ccree/cc_crypto_ctx.h b/drivers/staging/ccree/cc_crypto_ctx.h index 1b2698f..88b6e88 100644 --- a/drivers/staging/ccree/cc_crypto_ctx.h +++ b/drivers/staging/ccree/cc_crypto_ctx.h @@ -8,7 +8,7 @@ /* context size */ #ifndef CC_CTX_SIZE_LOG2 -#if (CC_SUPPORT_SHA > 256) +#if (CC_DEV_SHA_MAX > 256) #define CC_CTX_SIZE_LOG2 8 #else #define CC_CTX_SIZE_LOG2 7 @@ -59,7 +59,7 @@ #define CC_SHA384_BLOCK_SIZE 128 #define CC_SHA512_BLOCK_SIZE 128 -#if (CC_SUPPORT_SHA > 256) +#if (CC_DEV_SHA_MAX > 256) #define CC_DIGEST_SIZE_MAX CC_SHA512_DIGEST_SIZE #define CC_HASH_BLOCK_SIZE_MAX CC_SHA512_BLOCK_SIZE /*1024b*/ #else /* Only up to SHA256 */ diff --git a/drivers/staging/ccree/dx_reg_common.h b/drivers/staging/ccree/dx_reg_common.h deleted file mode 100644 index 84184d2..0000000 --- a/drivers/staging/ccree/dx_reg_common.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ - -#ifndef __CC_REG_COMMON_H__ -#define __CC_REG_COMMON_H__ - -#define CC_DEV_SIGNATURE 0xDCC71200UL - -#define CC_HW_VERSION 0xef840015UL - -#define CC_DEV_SHA_MAX 512 - -#endif /*__CC_REG_COMMON_H__*/ diff --git a/drivers/staging/ccree/ssi_driver.h b/drivers/staging/ccree/ssi_driver.h index b978862..3810740 100644 --- a/drivers/staging/ccree/ssi_driver.h +++ b/drivers/staging/ccree/ssi_driver.h @@ -27,8 +27,7 @@ /* Registers definitions from shared/hw/ree_include */ #include "dx_host.h" -#include "dx_reg_common.h" -#define CC_SUPPORT_SHA CC_DEV_SHA_MAX +#define CC_DEV_SHA_MAX 512 #include "cc_crypto_ctx.h" #include "cc_hw_queue_defs.h" #include "ssi_sram_mgr.h" @@ -44,6 +43,8 @@ extern bool cc_dump_bytes; /* Maximum DMA mask supported by IP */ #define DMA_BIT_MASK_LEN 48 +#define CC_DEV_SIGNATURE 0xDCC71200UL + #define CC_AXI_IRQ_MASK ((1 << CC_AXIM_CFG_BRESPMASK_BIT_SHIFT) | \ (1 << CC_AXIM_CFG_RRESPMASK_BIT_SHIFT) | \ (1 << CC_AXIM_CFG_INFLTMASK_BIT_SHIFT) | \ From patchwork Wed Jan 3 13:35:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123302 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10180612qgn; Wed, 3 Jan 2018 05:36:49 -0800 (PST) X-Google-Smtp-Source: ACJfBovAM5NsnGEFeNm5BF1bLMwLcRbNfVNonwO5LPL7jHstK7GqB1QSSy+aqMAw8qvGGkBxh9mx X-Received: by 10.99.47.1 with SMTP id v1mr1240701pgv.162.1514986608915; Wed, 03 Jan 2018 05:36:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986608; cv=none; d=google.com; s=arc-20160816; b=RAf0y6cYzrn3aGsjeTCNbzIjHoZQRSk1ADYYWhBFmr7W/O4GDEI7T2PBgoWMT8L52w YGWuM4j1EvO8Vbfm5sE6ClSF1KIcyvZwj3K+lCQnI2Qk+R67UewXcYCu4zeSajXQMD4x 4KlhotiH1nhy20tYQ4bhsYuU0xMurhPb9FqiuIgQBdeKUcrWI9bQ/E6x4/hp+YIjW0ev f+PDLs/sdOEzlR1bYgYEEU/QDVKCH6uiBnJmzxh9+XUbd8cPAAcZNkQlF+p/wFzxueaK tgIzzGFs2pEKYJNo8JGNUmIlxCPEOjZC1rNcJTbv2EdKNPDrVpM5JH2OLZvHWrpQhoyQ BMHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=hrN5IIziJTDLly8pSS2Fcg3KFQlIVIcmovJqNF2tCbI=; b=TYUiZZKrFPkb9B7ZaBTU17ckW67V2awkAzHbrXOJoYvyt9GEO8Zyb8NMv+xjN3SoZI kf64EdYBQBeD5XCX8HOzoCn7FCbzaTZRuyhZZTMI7LlxdxFfPaha+cDHEnT/kaHQyWjm 39R7rbXsbzeuuZSTujw+LibI8acl02tYr9TOej/gkr7W+Kqpf1t94ufpWpjCm6ixZ9Dx Gaa+kKYK2asDfusPSjEvvyYJzsg4lR1XOx1pvzvidjgsSTiT3k6QUxyhaibCUbEoEJXo mBE/Ih2x7PyG1ElRelCUWDCDMwRC964qB+hOPU81ZfDciTXkavk0E99EUljsKgkpkp5T FeYg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m11si702062pln.823.2018.01.03.05.36.48; Wed, 03 Jan 2018 05:36:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752907AbeACNgp (ORCPT + 28 others); Wed, 3 Jan 2018 08:36:45 -0500 Received: from foss.arm.com ([217.140.101.70]:50000 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751677AbeACNgm (ORCPT ); Wed, 3 Jan 2018 08:36:42 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 844451529; Wed, 3 Jan 2018 05:36:42 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0006B3F24A; Wed, 3 Jan 2018 05:36:40 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 04/27] staging: ccree: remove GFP_DMA flag from mem allocs Date: Wed, 3 Jan 2018 13:35:11 +0000 Message-Id: <1514986544-5888-5-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove bogus GFP_DMA flag from memory allocations. ccree driver does not operate over an ISA or similar limited bus. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_cipher.c | 2 +- drivers/staging/ccree/ssi_hash.c | 15 ++++++--------- 2 files changed, 7 insertions(+), 10 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c index 71d3e79..479186f 100644 --- a/drivers/staging/ccree/ssi_cipher.c +++ b/drivers/staging/ccree/ssi_cipher.c @@ -166,7 +166,7 @@ static int cc_cipher_init(struct crypto_tfm *tfm) ctx_p->drvdata = cc_alg->drvdata; /* Allocate key buffer, cache line aligned */ - ctx_p->user.key = kmalloc(max_key_buf_size, GFP_KERNEL | GFP_DMA); + ctx_p->user.key = kmalloc(max_key_buf_size, GFP_KERNEL); if (!ctx_p->user.key) return -ENOMEM; diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index c409dcd..a6702cf 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -132,29 +132,27 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, struct cc_hw_desc desc; int rc = -ENOMEM; - state->buff0 = kzalloc(CC_MAX_HASH_BLCK_SIZE, GFP_KERNEL | GFP_DMA); + state->buff0 = kzalloc(CC_MAX_HASH_BLCK_SIZE, GFP_KERNEL); if (!state->buff0) goto fail0; - state->buff1 = kzalloc(CC_MAX_HASH_BLCK_SIZE, GFP_KERNEL | GFP_DMA); + state->buff1 = kzalloc(CC_MAX_HASH_BLCK_SIZE, GFP_KERNEL); if (!state->buff1) goto fail_buff0; state->digest_result_buff = kzalloc(CC_MAX_HASH_DIGEST_SIZE, - GFP_KERNEL | GFP_DMA); + GFP_KERNEL); if (!state->digest_result_buff) goto fail_buff1; - state->digest_buff = kzalloc(ctx->inter_digestsize, - GFP_KERNEL | GFP_DMA); + state->digest_buff = kzalloc(ctx->inter_digestsize, GFP_KERNEL); if (!state->digest_buff) goto fail_digest_result_buff; dev_dbg(dev, "Allocated digest-buffer in context ctx->digest_buff=@%p\n", state->digest_buff); if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) { - state->digest_bytes_len = kzalloc(HASH_LEN_SIZE, - GFP_KERNEL | GFP_DMA); + state->digest_bytes_len = kzalloc(HASH_LEN_SIZE, GFP_KERNEL); if (!state->digest_bytes_len) goto fail1; @@ -164,8 +162,7 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, state->digest_bytes_len = NULL; } - state->opad_digest_buff = kzalloc(ctx->inter_digestsize, - GFP_KERNEL | GFP_DMA); + state->opad_digest_buff = kzalloc(ctx->inter_digestsize, GFP_KERNEL); if (!state->opad_digest_buff) goto fail2; From patchwork Wed Jan 3 13:35:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123303 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10180838qgn; Wed, 3 Jan 2018 05:37:04 -0800 (PST) X-Google-Smtp-Source: ACJfBotPaSUZYGEMxnNz3ks1cphLA91HsIzrLjN2/9iz6DoG27W+w3UbwTCWx+PTf2PAiverp23b X-Received: by 10.84.254.69 with SMTP id a5mr1389929pln.353.1514986624640; Wed, 03 Jan 2018 05:37:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986624; cv=none; d=google.com; s=arc-20160816; b=UD6945hzcNsiomq06WdixtuQoW6grg5py1uPo8kiDwUO9kKCEDfTUxK7c5wp+R/G43 Ba05nO3gWuFi8jYk8eJFx4HIdlaS+6Wv6ZPH9gAlnZBA1vZRPJsfeJHfk36ilOHTexzE ppCXZINi7wgAtDyloxSwjyLenrCtvDr1IDuAOj3lW76MuBM5jTiBZinoTFVQhlbkE2dG i+YQsiaNcDoPAX2eXIBmva7KvuhaQbjzN6caDyKYjqw5ycVLL7ijdkB84NN0mXviFgNd ARvsQ/eGDk+LH6+aMMQ7Wx9RHbBvgtX8tlYFlRyHNPxvB9aPN6Rxwyilz9QqtkSXgC6j ixfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=TwXl/SfmLJ84sd0ohhLEuPkbEqjXx22lF2DPsey1tAc=; b=Nom4ghiQCUjMQsdINht4RDbmNZJ/WmgHytZ4F2DKouat3FMVBfzy8hizrfxAg8LNCs 8KpuZxXtA10Zh8/OGPAYKbvvDDEWgQ+lu4xDricodgdsEvLAuEoWBUK0F3irB6QJiwnp Jk2yodOhNtQ36wAHQdH6PzwDfguTuIfdgjr3SGzi/ozb3xQFZomO8SWQUD/P6O+A0QbX K5qsf/OOueb77acOcBEo5n5eQmRXP7P+A2YDEv2vzGKPnKJgLhV2+3c5k4pxQYX+JviF cFHf0UJxVUtyOUtbvlK7WZuV3vNBI5Z6wzHEnBecuEP/aJseujTdP66fUODa4dYVAD27 zcfA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a33si718974plc.187.2018.01.03.05.37.04; Wed, 03 Jan 2018 05:37:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752933AbeACNg7 (ORCPT + 28 others); Wed, 3 Jan 2018 08:36:59 -0500 Received: from foss.arm.com ([217.140.101.70]:50018 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751929AbeACNgy (ORCPT ); Wed, 3 Jan 2018 08:36:54 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E42ED1529; Wed, 3 Jan 2018 05:36:53 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 64C133F24A; Wed, 3 Jan 2018 05:36:52 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 05/27] staging: ccree: pick alloc mem flags based on req flags Date: Wed, 3 Jan 2018 13:35:12 +0000 Message-Id: <1514986544-5888-6-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The ccree driver was allocating memory using GFP_KERNEL flag always, ignoring the flags set in the crypto request. Fix it by choosing gfp flags based on crypto request flags. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_buffer_mgr.c | 19 +++++++------ drivers/staging/ccree/ssi_buffer_mgr.h | 6 ++-- drivers/staging/ccree/ssi_cipher.c | 8 ++++-- drivers/staging/ccree/ssi_driver.h | 6 ++++ drivers/staging/ccree/ssi_hash.c | 50 ++++++++++++++++++++-------------- 5 files changed, 54 insertions(+), 35 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c index 60fcee4..5e3cff3 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.c +++ b/drivers/staging/ccree/ssi_buffer_mgr.c @@ -217,7 +217,7 @@ static int cc_render_sg_to_mlli(struct device *dev, struct scatterlist *sgl, } static int cc_generate_mlli(struct device *dev, struct buffer_array *sg_data, - struct mlli_params *mlli_params) + struct mlli_params *mlli_params, gfp_t flags) { u32 *mlli_p; u32 total_nents = 0, prev_total_nents = 0; @@ -227,7 +227,7 @@ static int cc_generate_mlli(struct device *dev, struct buffer_array *sg_data, /* Allocate memory from the pointed pool */ mlli_params->mlli_virt_addr = - dma_pool_alloc(mlli_params->curr_pool, GFP_KERNEL, + dma_pool_alloc(mlli_params->curr_pool, flags, &mlli_params->mlli_dma_addr); if (!mlli_params->mlli_virt_addr) { dev_err(dev, "dma_pool_alloc() failed\n"); @@ -483,7 +483,7 @@ void cc_unmap_blkcipher_request(struct device *dev, void *ctx, int cc_map_blkcipher_request(struct cc_drvdata *drvdata, void *ctx, unsigned int ivsize, unsigned int nbytes, void *info, struct scatterlist *src, - struct scatterlist *dst) + struct scatterlist *dst, gfp_t flags) { struct blkcipher_req_ctx *req_ctx = (struct blkcipher_req_ctx *)ctx; struct mlli_params *mlli_params = &req_ctx->mlli_params; @@ -558,7 +558,7 @@ int cc_map_blkcipher_request(struct cc_drvdata *drvdata, void *ctx, if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) { mlli_params->curr_pool = buff_mgr->mlli_buffs_pool; - rc = cc_generate_mlli(dev, &sg_data, mlli_params); + rc = cc_generate_mlli(dev, &sg_data, mlli_params, flags); if (rc) goto ablkcipher_exit; } @@ -1200,6 +1200,7 @@ int cc_map_aead_request(struct cc_drvdata *drvdata, struct aead_request *req) u32 mapped_nents = 0; u32 dummy = 0; /*used for the assoc data fragments */ u32 size_to_map = 0; + gfp_t flags = cc_gfp_flags(&req->base); mlli_params->curr_pool = NULL; sg_data.num_of_buffers = 0; @@ -1366,7 +1367,7 @@ int cc_map_aead_request(struct cc_drvdata *drvdata, struct aead_request *req) if (areq_ctx->assoc_buff_type == CC_DMA_BUF_MLLI || areq_ctx->data_buff_type == CC_DMA_BUF_MLLI) { mlli_params->curr_pool = buff_mgr->mlli_buffs_pool; - rc = cc_generate_mlli(dev, &sg_data, mlli_params); + rc = cc_generate_mlli(dev, &sg_data, mlli_params, flags); if (rc) goto aead_map_failure; @@ -1385,7 +1386,7 @@ int cc_map_aead_request(struct cc_drvdata *drvdata, struct aead_request *req) int cc_map_hash_request_final(struct cc_drvdata *drvdata, void *ctx, struct scatterlist *src, unsigned int nbytes, - bool do_update) + bool do_update, gfp_t flags) { struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx; struct device *dev = drvdata_to_dev(drvdata); @@ -1445,7 +1446,7 @@ int cc_map_hash_request_final(struct cc_drvdata *drvdata, void *ctx, /* add the src data to the sg_data */ cc_add_sg_entry(dev, &sg_data, areq_ctx->in_nents, src, nbytes, 0, true, &areq_ctx->mlli_nents); - if (cc_generate_mlli(dev, &sg_data, mlli_params)) + if (cc_generate_mlli(dev, &sg_data, mlli_params, flags)) goto fail_unmap_din; } /* change the buffer index for the unmap function */ @@ -1466,7 +1467,7 @@ int cc_map_hash_request_final(struct cc_drvdata *drvdata, void *ctx, int cc_map_hash_request_update(struct cc_drvdata *drvdata, void *ctx, struct scatterlist *src, unsigned int nbytes, - unsigned int block_size) + unsigned int block_size, gfp_t flags) { struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx; struct device *dev = drvdata_to_dev(drvdata); @@ -1562,7 +1563,7 @@ int cc_map_hash_request_update(struct cc_drvdata *drvdata, void *ctx, cc_add_sg_entry(dev, &sg_data, areq_ctx->in_nents, src, (update_data_len - *curr_buff_cnt), 0, true, &areq_ctx->mlli_nents); - if (cc_generate_mlli(dev, &sg_data, mlli_params)) + if (cc_generate_mlli(dev, &sg_data, mlli_params, flags)) goto fail_unmap_din; } areq_ctx->buff_index = (areq_ctx->buff_index ^ swap_index); diff --git a/drivers/staging/ccree/ssi_buffer_mgr.h b/drivers/staging/ccree/ssi_buffer_mgr.h index a9c0b2e..8f238c0 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.h +++ b/drivers/staging/ccree/ssi_buffer_mgr.h @@ -43,7 +43,7 @@ int cc_buffer_mgr_fini(struct cc_drvdata *drvdata); int cc_map_blkcipher_request(struct cc_drvdata *drvdata, void *ctx, unsigned int ivsize, unsigned int nbytes, void *info, struct scatterlist *src, - struct scatterlist *dst); + struct scatterlist *dst, gfp_t flags); void cc_unmap_blkcipher_request(struct device *dev, void *ctx, unsigned int ivsize, @@ -56,11 +56,11 @@ void cc_unmap_aead_request(struct device *dev, struct aead_request *req); int cc_map_hash_request_final(struct cc_drvdata *drvdata, void *ctx, struct scatterlist *src, unsigned int nbytes, - bool do_update); + bool do_update, gfp_t flags); int cc_map_hash_request_update(struct cc_drvdata *drvdata, void *ctx, struct scatterlist *src, unsigned int nbytes, - unsigned int block_size); + unsigned int block_size, gfp_t flags); void cc_unmap_hash_request(struct device *dev, void *ctx, struct scatterlist *src, bool do_revert); diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c index 479186f..fe8d78d 100644 --- a/drivers/staging/ccree/ssi_cipher.c +++ b/drivers/staging/ccree/ssi_cipher.c @@ -639,6 +639,7 @@ static int cc_cipher_process(struct ablkcipher_request *req, struct cc_hw_desc desc[MAX_ABLKCIPHER_SEQ_LEN]; struct cc_crypto_req cc_req = {}; int rc, seq_len = 0, cts_restore_flag = 0; + gfp_t flags = cc_gfp_flags(&req->base); dev_dbg(dev, "%s req=%p info=%p nbytes=%d\n", ((direction == DRV_CRYPTO_DIRECTION_ENCRYPT) ? @@ -662,7 +663,7 @@ static int cc_cipher_process(struct ablkcipher_request *req, /* The IV we are handed may be allocted from the stack so * we must copy it to a DMAable buffer before use. */ - req_ctx->iv = kmalloc(ivsize, GFP_KERNEL); + req_ctx->iv = kmalloc(ivsize, flags); if (!req_ctx->iv) { rc = -ENOMEM; goto exit_process; @@ -692,7 +693,7 @@ static int cc_cipher_process(struct ablkcipher_request *req, /* STAT_PHASE_1: Map buffers */ rc = cc_map_blkcipher_request(ctx_p->drvdata, req_ctx, ivsize, nbytes, - req_ctx->iv, src, dst); + req_ctx->iv, src, dst, flags); if (rc) { dev_err(dev, "map_request() failed\n"); goto exit_process; @@ -751,12 +752,13 @@ static int cc_cipher_decrypt(struct ablkcipher_request *req) struct crypto_ablkcipher *ablk_tfm = crypto_ablkcipher_reqtfm(req); struct blkcipher_req_ctx *req_ctx = ablkcipher_request_ctx(req); unsigned int ivsize = crypto_ablkcipher_ivsize(ablk_tfm); + gfp_t flags = cc_gfp_flags(&req->base); /* * Allocate and save the last IV sized bytes of the source, which will * be lost in case of in-place decryption and might be needed for CTS. */ - req_ctx->backup_info = kmalloc(ivsize, GFP_KERNEL); + req_ctx->backup_info = kmalloc(ivsize, flags); if (!req_ctx->backup_info) return -ENOMEM; diff --git a/drivers/staging/ccree/ssi_driver.h b/drivers/staging/ccree/ssi_driver.h index 3810740..4548f78 100644 --- a/drivers/staging/ccree/ssi_driver.h +++ b/drivers/staging/ccree/ssi_driver.h @@ -184,5 +184,11 @@ static inline u32 cc_ioread(struct cc_drvdata *drvdata, u32 reg) return ioread32(drvdata->cc_base + reg); } +static inline gfp_t cc_gfp_flags(struct crypto_async_request *req) +{ + return (req->flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? + GFP_KERNEL : GFP_ATOMIC; +} + #endif /*__CC_DRIVER_H__*/ diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index a6702cf..5324914 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -123,7 +123,7 @@ static int cc_map_result(struct device *dev, struct ahash_req_ctx *state, } static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, - struct cc_hash_ctx *ctx) + struct cc_hash_ctx *ctx, gfp_t flags) { bool is_hmac = ctx->is_hmac; cc_sram_addr_t larval_digest_addr = @@ -132,27 +132,26 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, struct cc_hw_desc desc; int rc = -ENOMEM; - state->buff0 = kzalloc(CC_MAX_HASH_BLCK_SIZE, GFP_KERNEL); + state->buff0 = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags); if (!state->buff0) goto fail0; - state->buff1 = kzalloc(CC_MAX_HASH_BLCK_SIZE, GFP_KERNEL); + state->buff1 = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags); if (!state->buff1) goto fail_buff0; - state->digest_result_buff = kzalloc(CC_MAX_HASH_DIGEST_SIZE, - GFP_KERNEL); + state->digest_result_buff = kzalloc(CC_MAX_HASH_DIGEST_SIZE, flags); if (!state->digest_result_buff) goto fail_buff1; - state->digest_buff = kzalloc(ctx->inter_digestsize, GFP_KERNEL); + state->digest_buff = kzalloc(ctx->inter_digestsize, flags); if (!state->digest_buff) goto fail_digest_result_buff; dev_dbg(dev, "Allocated digest-buffer in context ctx->digest_buff=@%p\n", state->digest_buff); if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) { - state->digest_bytes_len = kzalloc(HASH_LEN_SIZE, GFP_KERNEL); + state->digest_bytes_len = kzalloc(HASH_LEN_SIZE, flags); if (!state->digest_bytes_len) goto fail1; @@ -162,7 +161,7 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, state->digest_bytes_len = NULL; } - state->opad_digest_buff = kzalloc(ctx->inter_digestsize, GFP_KERNEL); + state->opad_digest_buff = kzalloc(ctx->inter_digestsize, flags); if (!state->opad_digest_buff) goto fail2; @@ -415,11 +414,12 @@ static int cc_hash_digest(struct ahash_request *req) cc_larval_digest_addr(ctx->drvdata, ctx->hash_mode); int idx = 0; int rc = 0; + gfp_t flags = cc_gfp_flags(&req->base); dev_dbg(dev, "===== %s-digest (%d) ====\n", is_hmac ? "hmac" : "hash", nbytes); - if (cc_map_req(dev, state, ctx)) { + if (cc_map_req(dev, state, ctx, flags)) { dev_err(dev, "map_ahash_source() failed\n"); return -ENOMEM; } @@ -429,7 +429,8 @@ static int cc_hash_digest(struct ahash_request *req) return -ENOMEM; } - if (cc_map_hash_request_final(ctx->drvdata, state, src, nbytes, 1)) { + if (cc_map_hash_request_final(ctx->drvdata, state, src, nbytes, 1, + flags)) { dev_err(dev, "map_ahash_request_final() failed\n"); return -ENOMEM; } @@ -566,6 +567,7 @@ static int cc_hash_update(struct ahash_request *req) struct cc_hw_desc desc[CC_MAX_HASH_SEQ_LEN]; u32 idx = 0; int rc; + gfp_t flags = cc_gfp_flags(&req->base); dev_dbg(dev, "===== %s-update (%d) ====\n", ctx->is_hmac ? "hmac" : "hash", nbytes); @@ -576,7 +578,7 @@ static int cc_hash_update(struct ahash_request *req) } rc = cc_map_hash_request_update(ctx->drvdata, state, src, nbytes, - block_size); + block_size, flags); if (rc) { if (rc == 1) { dev_dbg(dev, " data size not require HW update %x\n", @@ -653,11 +655,13 @@ static int cc_hash_finup(struct ahash_request *req) struct cc_hw_desc desc[CC_MAX_HASH_SEQ_LEN]; int idx = 0; int rc; + gfp_t flags = cc_gfp_flags(&req->base); dev_dbg(dev, "===== %s-finup (%d) ====\n", is_hmac ? "hmac" : "hash", nbytes); - if (cc_map_hash_request_final(ctx->drvdata, state, src, nbytes, 1)) { + if (cc_map_hash_request_final(ctx->drvdata, state, src, nbytes, 1, + flags)) { dev_err(dev, "map_ahash_request_final() failed\n"); return -ENOMEM; } @@ -773,11 +777,13 @@ static int cc_hash_final(struct ahash_request *req) struct cc_hw_desc desc[CC_MAX_HASH_SEQ_LEN]; int idx = 0; int rc; + gfp_t flags = cc_gfp_flags(&req->base); dev_dbg(dev, "===== %s-final (%d) ====\n", is_hmac ? "hmac" : "hash", nbytes); - if (cc_map_hash_request_final(ctx->drvdata, state, src, nbytes, 0)) { + if (cc_map_hash_request_final(ctx->drvdata, state, src, nbytes, 0, + flags)) { dev_err(dev, "map_ahash_request_final() failed\n"); return -ENOMEM; } @@ -894,11 +900,12 @@ static int cc_hash_init(struct ahash_request *req) struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); struct cc_hash_ctx *ctx = crypto_ahash_ctx(tfm); struct device *dev = drvdata_to_dev(ctx->drvdata); + gfp_t flags = cc_gfp_flags(&req->base); dev_dbg(dev, "===== init (%d) ====\n", req->nbytes); state->xcbc_count = 0; - cc_map_req(dev, state, ctx); + cc_map_req(dev, state, ctx, flags); return 0; } @@ -1317,6 +1324,7 @@ static int cc_mac_update(struct ahash_request *req) struct cc_hw_desc desc[CC_MAX_HASH_SEQ_LEN]; int rc; u32 idx = 0; + gfp_t flags = cc_gfp_flags(&req->base); if (req->nbytes == 0) { /* no real updates required */ @@ -1326,7 +1334,7 @@ static int cc_mac_update(struct ahash_request *req) state->xcbc_count++; rc = cc_map_hash_request_update(ctx->drvdata, state, req->src, - req->nbytes, block_size); + req->nbytes, block_size, flags); if (rc) { if (rc == 1) { dev_dbg(dev, " data size not require HW update %x\n", @@ -1379,7 +1387,7 @@ static int cc_mac_final(struct ahash_request *req) int rc = 0; u32 key_size, key_len; u32 digestsize = crypto_ahash_digestsize(tfm); - + gfp_t flags = cc_gfp_flags(&req->base); u32 rem_cnt = state->buff_index ? state->buff1_cnt : state->buff0_cnt; @@ -1395,7 +1403,7 @@ static int cc_mac_final(struct ahash_request *req) dev_dbg(dev, "===== final xcbc reminder (%d) ====\n", rem_cnt); if (cc_map_hash_request_final(ctx->drvdata, state, req->src, - req->nbytes, 0)) { + req->nbytes, 0, flags)) { dev_err(dev, "map_ahash_request_final() failed\n"); return -ENOMEM; } @@ -1493,6 +1501,7 @@ static int cc_mac_finup(struct ahash_request *req) int rc = 0; u32 key_len = 0; u32 digestsize = crypto_ahash_digestsize(tfm); + gfp_t flags = cc_gfp_flags(&req->base); dev_dbg(dev, "===== finup xcbc(%d) ====\n", req->nbytes); if (state->xcbc_count > 0 && req->nbytes == 0) { @@ -1501,7 +1510,7 @@ static int cc_mac_finup(struct ahash_request *req) } if (cc_map_hash_request_final(ctx->drvdata, state, req->src, - req->nbytes, 1)) { + req->nbytes, 1, flags)) { dev_err(dev, "map_ahash_request_final() failed\n"); return -ENOMEM; } @@ -1565,10 +1574,11 @@ static int cc_mac_digest(struct ahash_request *req) u32 key_len; int idx = 0; int rc; + gfp_t flags = cc_gfp_flags(&req->base); dev_dbg(dev, "===== -digest mac (%d) ====\n", req->nbytes); - if (cc_map_req(dev, state, ctx)) { + if (cc_map_req(dev, state, ctx, flags)) { dev_err(dev, "map_ahash_source() failed\n"); return -ENOMEM; } @@ -1578,7 +1588,7 @@ static int cc_mac_digest(struct ahash_request *req) } if (cc_map_hash_request_final(ctx->drvdata, state, req->src, - req->nbytes, 1)) { + req->nbytes, 1, flags)) { dev_err(dev, "map_ahash_request_final() failed\n"); return -ENOMEM; } From patchwork Wed Jan 3 13:35:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123304 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10180930qgn; Wed, 3 Jan 2018 05:37:11 -0800 (PST) X-Google-Smtp-Source: ACJfBou9Njvd9mUU43q2H4AQKwGYyhWsgqsw0oujjPQWHXFNifANQAh9oQURgBvQX0HkCgXfkf8x X-Received: by 10.84.168.198 with SMTP id f64mr1456957plb.324.1514986631056; Wed, 03 Jan 2018 05:37:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986631; cv=none; d=google.com; s=arc-20160816; b=ds/PGRh4BtyN/fIY+Vx4zfVgvKyC8OPTjGhJ1yXpqsayKNv6MhRf3+S6ZDEpUl1g7s p1gnZ88ryO0a6LseSzS8CdjqijO8OkknnFmuvYrNaz/1jMK1xRJwvo1uopdSooEZo1Dc TZHa/tm1hCKAP1r+dIiBPvo3FTUVx0+NkdrmEdgv7mHMUVsUh5s2n0cBqijSPPGsQwPw mVWbIq+/A2ywn8wAsa0t/EwYY843igaauzceERmqHcklK6SUf85NWJ/LKNzyTh+GaTuy Rq6+WjTAfY6k1rLrUiAZF9bUH4TMFWTg2fcVLX56P0i7Tt7YEByqSeIU/qmfskFo/G9+ QhiQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=cg3E+HKu0zb6MCNIYq04J5RziO+NLoXaDP7yiV3g3qU=; b=a6bZ7cHrIy7ItT2VJqPxMKXolgBWcILQLZ5azhua+rcAWP9PH565CQ+gl1wv/BLjyb 0OlRX05yDLdVEZyLFy2Yy9jS6eJ2Kjc/mbqrZW0cmdZIiGy6gOBxGIgZs93lf2FByyqe hrL1xhFCvYogviUvh5ld6aMlbYFrTiedlK/WsnQ68WmcJU/vpiYzFeIcxr5oZZwFx6KG BT6mYq7tAIYopSJSSCEJ3FcUJoWW66+HT7qAM+xLEIpCYqprc3mehK4ge/qL00Gc+tyP 2i0eizqDvTyFgS764DvPfKf+o9pPc6FTSFV3yUtZ7IaVjMQdWghkDgXFINiZReGuy56v H34w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q7si637570pgv.687.2018.01.03.05.37.10; Wed, 03 Jan 2018 05:37:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752957AbeACNhI (ORCPT + 28 others); Wed, 3 Jan 2018 08:37:08 -0500 Received: from foss.arm.com ([217.140.101.70]:50042 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752936AbeACNhF (ORCPT ); Wed, 3 Jan 2018 08:37:05 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0E7561529; Wed, 3 Jan 2018 05:37:05 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 83ABA3F24A; Wed, 3 Jan 2018 05:37:03 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 06/27] staging: ccree: copy larval digest from RAM Date: Wed, 3 Jan 2018 13:35:13 +0000 Message-Id: <1514986544-5888-7-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The ccree driver was using a DMA operation to copy larval digest from the ccree SRAM to RAM. Replace it with a simple memcpy. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_driver.c | 2 + drivers/staging/ccree/ssi_hash.c | 121 ++++++++++++++++++++----------------- drivers/staging/ccree/ssi_hash.h | 2 + 3 files changed, 68 insertions(+), 57 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_driver.c b/drivers/staging/ccree/ssi_driver.c index 9b4c064..64db0c1 100644 --- a/drivers/staging/ccree/ssi_driver.c +++ b/drivers/staging/ccree/ssi_driver.c @@ -484,6 +484,8 @@ static int __init ccree_init(void) { int ret; + cc_hash_global_init(); + ret = cc_debugfs_global_init(); if (ret) return ret; diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 5324914..06cc5cd 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -41,10 +41,10 @@ static const u32 sha256_init[] = { #if (CC_DEV_SHA_MAX > 256) static const u32 digest_len_sha512_init[] = { 0x00000080, 0x00000000, 0x00000000, 0x00000000 }; -static const u64 sha384_init[] = { +static u64 sha384_init[] = { SHA384_H7, SHA384_H6, SHA384_H5, SHA384_H4, SHA384_H3, SHA384_H2, SHA384_H1, SHA384_H0 }; -static const u64 sha512_init[] = { +static u64 sha512_init[] = { SHA512_H7, SHA512_H6, SHA512_H5, SHA512_H4, SHA512_H3, SHA512_H2, SHA512_H1, SHA512_H0 }; #endif @@ -55,6 +55,8 @@ static void cc_setup_xcbc(struct ahash_request *areq, struct cc_hw_desc desc[], static void cc_setup_cmac(struct ahash_request *areq, struct cc_hw_desc desc[], unsigned int *seq_size); +static const void *cc_larval_digest(struct device *dev, u32 mode); + struct cc_hash_alg { struct list_head entry; int hash_mode; @@ -126,10 +128,6 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, struct cc_hash_ctx *ctx, gfp_t flags) { bool is_hmac = ctx->is_hmac; - cc_sram_addr_t larval_digest_addr = - cc_larval_digest_addr(ctx->drvdata, ctx->hash_mode); - struct cc_crypto_req cc_req = {}; - struct cc_hw_desc desc; int rc = -ENOMEM; state->buff0 = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags); @@ -203,9 +201,6 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, HASH_LEN_SIZE); #endif } - dma_sync_single_for_device(dev, state->digest_buff_dma_addr, - ctx->inter_digestsize, - DMA_BIDIRECTIONAL); if (ctx->hash_mode != DRV_HASH_NULL) { dma_sync_single_for_cpu(dev, @@ -216,22 +211,15 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, ctx->opad_tmp_keys_buff, ctx->inter_digestsize); } } else { /*hash*/ - /* Copy the initial digests if hash flow. The SRAM contains the - * initial digests in the expected order for all SHA* - */ - hw_desc_init(&desc); - set_din_sram(&desc, larval_digest_addr, ctx->inter_digestsize); - set_dout_dlli(&desc, state->digest_buff_dma_addr, - ctx->inter_digestsize, NS_BIT, 0); - set_flow_mode(&desc, BYPASS); + /* Copy the initial digests if hash flow. */ + const void *larval = cc_larval_digest(dev, ctx->hash_mode); - rc = send_request(ctx->drvdata, &cc_req, &desc, 1, 0); - if (rc) { - dev_err(dev, "send_request() failed (rc=%d)\n", rc); - goto fail4; - } + memcpy(state->digest_buff, larval, ctx->inter_digestsize); } + dma_sync_single_for_device(dev, state->digest_buff_dma_addr, + ctx->inter_digestsize, DMA_BIDIRECTIONAL); + if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) { state->digest_bytes_len_dma_addr = dma_map_single(dev, (void *)state->digest_bytes_len, @@ -2003,11 +1991,7 @@ int cc_init_hash_sram(struct cc_drvdata *drvdata) cc_sram_addr_t sram_buff_ofs = hash_handle->digest_len_sram_addr; unsigned int larval_seq_len = 0; struct cc_hw_desc larval_seq[CC_DIGEST_SIZE_MAX / sizeof(u32)]; - struct device *dev = drvdata_to_dev(drvdata); int rc = 0; -#if (CC_DEV_SHA_MAX > 256) - int i; -#endif /* Copy-to-sram digest-len */ cc_set_sram_desc(digest_len_init, sram_buff_ofs, @@ -2074,49 +2058,49 @@ int cc_init_hash_sram(struct cc_drvdata *drvdata) larval_seq_len = 0; #if (CC_DEV_SHA_MAX > 256) - /* We are forced to swap each double-word larval before copying to - * sram - */ - for (i = 0; i < ARRAY_SIZE(sha384_init); i++) { - const u32 const0 = ((u32 *)((u64 *)&sha384_init[i]))[1]; - const u32 const1 = ((u32 *)((u64 *)&sha384_init[i]))[0]; - - cc_set_sram_desc(&const0, sram_buff_ofs, 1, larval_seq, - &larval_seq_len); - sram_buff_ofs += sizeof(u32); - cc_set_sram_desc(&const1, sram_buff_ofs, 1, larval_seq, - &larval_seq_len); - sram_buff_ofs += sizeof(u32); - } + cc_set_sram_desc((u32 *)sha384_init, sram_buff_ofs, + (ARRAY_SIZE(sha384_init) * 2), larval_seq, + &larval_seq_len); rc = send_request_init(drvdata, larval_seq, larval_seq_len); - if (rc) { - dev_err(dev, "send_request() failed (rc = %d)\n", rc); + if (rc) goto init_digest_const_err; - } + sram_buff_ofs += sizeof(sha384_init); larval_seq_len = 0; - for (i = 0; i < ARRAY_SIZE(sha512_init); i++) { - const u32 const0 = ((u32 *)((u64 *)&sha512_init[i]))[1]; - const u32 const1 = ((u32 *)((u64 *)&sha512_init[i]))[0]; - - cc_set_sram_desc(&const0, sram_buff_ofs, 1, larval_seq, - &larval_seq_len); - sram_buff_ofs += sizeof(u32); - cc_set_sram_desc(&const1, sram_buff_ofs, 1, larval_seq, - &larval_seq_len); - sram_buff_ofs += sizeof(u32); - } + cc_set_sram_desc((u32 *)sha512_init, sram_buff_ofs, + (ARRAY_SIZE(sha512_init) * 2), larval_seq, + &larval_seq_len); rc = send_request_init(drvdata, larval_seq, larval_seq_len); - if (rc) { - dev_err(dev, "send_request() failed (rc = %d)\n", rc); + if (rc) goto init_digest_const_err; - } #endif init_digest_const_err: return rc; } +static void __init cc_swap_dwords(u32 *buf, unsigned long size) +{ + int i; + u32 tmp; + + for (i = 0; i < size; i += 2) { + tmp = buf[i]; + buf[i] = buf[i + 1]; + buf[i + 1] = tmp; + } +} + +/* + * Due to the way the HW works we need to swap every + * double word in the SHA384 and SHA512 larval hashes + */ +void __init cc_hash_global_init(void) +{ + cc_swap_dwords((u32 *)&sha384_init, (ARRAY_SIZE(sha384_init) * 2)); + cc_swap_dwords((u32 *)&sha512_init, (ARRAY_SIZE(sha512_init) * 2)); +} + int cc_hash_alloc(struct cc_drvdata *drvdata) { struct cc_hash_handle *hash_handle; @@ -2373,6 +2357,29 @@ static void cc_set_desc(struct ahash_req_ctx *areq_ctx, *seq_size = idx; } +static const void *cc_larval_digest(struct device *dev, u32 mode) +{ + switch (mode) { + case DRV_HASH_MD5: + return md5_init; + case DRV_HASH_SHA1: + return sha1_init; + case DRV_HASH_SHA224: + return sha224_init; + case DRV_HASH_SHA256: + return sha256_init; +#if (CC_DEV_SHA_MAX > 256) + case DRV_HASH_SHA384: + return sha384_init; + case DRV_HASH_SHA512: + return sha512_init; +#endif + default: + dev_err(dev, "Invalid hash mode (%d)\n", mode); + return md5_init; + } +} + /*! * Gets the address of the initial digest in SRAM * according to the given hash mode diff --git a/drivers/staging/ccree/ssi_hash.h b/drivers/staging/ccree/ssi_hash.h index a192249..484cbb4 100644 --- a/drivers/staging/ccree/ssi_hash.h +++ b/drivers/staging/ccree/ssi_hash.h @@ -90,5 +90,7 @@ cc_digest_len_addr(void *drvdata, u32 mode); */ cc_sram_addr_t cc_larval_digest_addr(void *drvdata, u32 mode); +void cc_hash_global_init(void); + #endif /*__CC_HASH_H__*/ From patchwork Wed Jan 3 13:35:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123305 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10181104qgn; Wed, 3 Jan 2018 05:37:22 -0800 (PST) X-Google-Smtp-Source: ACJfBoviNY65nFzWWuRMF+9TRb7awurw1jYKXsB8xbPKcW8cThJ+BI6EpaqACZevlos9A27TpGJx X-Received: by 10.101.88.8 with SMTP id g8mr1239866pgr.418.1514986641953; Wed, 03 Jan 2018 05:37:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986641; cv=none; d=google.com; s=arc-20160816; b=z3VU/XPyo/t2U2SIAczCWmE3EfwVtt1wmpBjSOGWEpHMM+XMfhZyyB25qGk9+h19W0 CjXWzT76wi0eAeiL+NmSrgj279Qf/1qDtdPOR8XzYQJMeyb/IMuNy2dwx7v3iWW2aCAI LYG+KNJsQTZTd/vPQSiyCeqWZTfVSi/ypiBvcx1CSUtwAjOKH3UZ99HY57WSuPlONhqM FMRHRAGap/6QRB2zGyh1DpacE012rNDiNIcyNPlvvvLXDgRo15DXA/fxge68xqsksg7u vZRRn4opZQFnEEEwTEjeIAbkI5SCu4xxzuSvK9/JuFTWcajC2b1vzCi8dUum7AuLTEMF SFQQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=u0z2i43TeRJM1oGZKRNnESo04amz9DykGDI2BKuHQVw=; b=JCNdTIY7SAgUDUnAazjaCwsqB8L2ADnhqFd1KRoff9kgzDdPEdUy2F0Pf05msadocu D1D2lj+jynLoJyMdvKdSlWzlbHyC+ofuxrcBUJEGxjoizki4IiH2L5cst14IMCJxy3Gc 0lyS/ykcx4xaLfmv0KxNt8c4HkJb7+dBv6tWHefiFYDUoiAR+IEn3Ufe9BOBXV318im2 1EpTOCuPtK0RZUph0VrJTWwfkrCekPctmZ4PvSaxT2SW6VBMoLlp9n95u63DS/+DUAyG /68o4k/9eY/cOZlZ0RhffuSMRqYn4wXzIUvHBeDQYajlCooTt0OsjDaw98Y2FOjDkfGc hpIw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n188si648105pgn.289.2018.01.03.05.37.21; Wed, 03 Jan 2018 05:37:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752981AbeACNhS (ORCPT + 28 others); Wed, 3 Jan 2018 08:37:18 -0500 Received: from foss.arm.com ([217.140.101.70]:50046 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752963AbeACNhP (ORCPT ); Wed, 3 Jan 2018 08:37:15 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B24611529; Wed, 3 Jan 2018 05:37:15 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3227F3F24A; Wed, 3 Jan 2018 05:37:13 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 07/27] staging: ccree: tag debugfs init/exit func properly Date: Wed, 3 Jan 2018 13:35:14 +0000 Message-Id: <1514986544-5888-8-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The debugfs global init and exit functions were missing __init and __exit tags, potentially wasting memory. Fix it by properly tagging them. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/cc_debugfs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/cc_debugfs.c b/drivers/staging/ccree/cc_debugfs.c index 518cefd..128c994 100644 --- a/drivers/staging/ccree/cc_debugfs.c +++ b/drivers/staging/ccree/cc_debugfs.c @@ -38,14 +38,14 @@ static struct debugfs_reg32 debug_regs[] = { CC_DEBUG_REG(AXIM_MON_COMP), }; -int cc_debugfs_global_init(void) +int __init cc_debugfs_global_init(void) { cc_debugfs_dir = debugfs_create_dir("ccree", NULL); return !cc_debugfs_dir; } -void cc_debugfs_global_fini(void) +void __exit cc_debugfs_global_fini(void) { debugfs_remove(cc_debugfs_dir); } From patchwork Wed Jan 3 13:35:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123307 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10181439qgn; Wed, 3 Jan 2018 05:37:44 -0800 (PST) X-Google-Smtp-Source: ACJfBosnb/Qsih6Hqg9A+WBLKKi0Mlf46Dwnv7yyWQ4R6Rws9FqTY664DuykRu8vq5kn9iT3Gf7Y X-Received: by 10.101.74.11 with SMTP id s11mr1272166pgq.119.1514986664668; Wed, 03 Jan 2018 05:37:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986664; cv=none; d=google.com; s=arc-20160816; b=gpd5Ft8n6506834541kwvl4LBTyBDc6oFAlbwwxuPvtl5iCeOiFtftrVdgeWgz1J+N iAEcTy2Wh1Bu5tOdUZQ0D/GsnZStkhlqFeIkYUYR5xXfRSq/wYZuGhwJQ3fDJVD+jPxt rkPlSL83bDGGVUL4d4IHhwavKqCIDEeQppYxj/mo+evFXQKJ2vEvdOJktpscA8BDRXzI ESML7fW0wxX3nd0229SwV5RFCcKFY9ty5tHvgp3QRDKdlYnwpYTJ9W+Ac01O3pQ+Sw5e sRQdrYarnHjcB1lEvx4AXPfAm/5Fy00dTx5gE2rjqQ64BL5WExDqLTwJvIjfOtPRSOyj adCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=slYGkO6RkTfxpdRdj6J+2zHyGX9+Djsenc9ig1ppRGU=; b=yW7g6aipsmZUyoW8DH5EJ67W7sztcGy3/f1LvCqvFWe45P11B2CU6Yd0rNkHUOjNsZ RHDG1hLAiEbXPbB6H4p0byssYStAWi1FN2W4Cn/GJlqNyYzpXEa5b195ukxOczYI7eZO 2RsPxCZTfw/1NDf3Q5tuEK9hNRjLZI3CucSXsuVbecZ5qD77d5tKIejOsh/9/dvget3Y rSCJ+xnVm+V5mQeQGRUdKGmzkGsWa10vpRdku6uDZvt4xSykSSTjF5qFCBZOhAuLllI9 3S2I+VJ8bJQhn6wFvFt8o5b5BDiTp8kZO1C0C8h+dImO4Yltnsls0iw+vZcryVhFH/Lk Z/2Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k8si652844pgf.107.2018.01.03.05.37.44; Wed, 03 Jan 2018 05:37:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753025AbeACNhm (ORCPT + 28 others); Wed, 3 Jan 2018 08:37:42 -0500 Received: from foss.arm.com ([217.140.101.70]:50086 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751833AbeACNhk (ORCPT ); Wed, 3 Jan 2018 08:37:40 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E87F61529; Wed, 3 Jan 2018 05:37:39 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 66DCA3F24A; Wed, 3 Jan 2018 05:37:38 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 09/27] staging: ccree: break send_request and fix ret val Date: Wed, 3 Jan 2018 13:35:16 +0000 Message-Id: <1514986544-5888-10-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The send_request() function was handling both synchronous and asynchronous invocations, but were not handling the asynchronous case, which may be called in an atomic context, properly as it was sleeping. Start to fix the problem by breaking up the two use cases to separate functions calling a common internal service function and return error instead of sleeping for the asynchronous case. The next patch will complete the fix by implementing proper backlog handling. Fixes: abefd6741d ("staging: ccree: introduce CryptoCell HW driver"). Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_aead.c | 6 +- drivers/staging/ccree/ssi_cipher.c | 3 +- drivers/staging/ccree/ssi_hash.c | 22 ++-- drivers/staging/ccree/ssi_request_mgr.c | 180 ++++++++++++++++++-------------- drivers/staging/ccree/ssi_request_mgr.h | 11 +- 5 files changed, 128 insertions(+), 94 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c index 5276bde..ec50014 100644 --- a/drivers/staging/ccree/ssi_aead.c +++ b/drivers/staging/ccree/ssi_aead.c @@ -531,7 +531,7 @@ cc_get_plain_hmac_key(struct crypto_aead *tfm, const u8 *key, idx++; } - rc = send_request(ctx->drvdata, &cc_req, desc, idx, 0); + rc = cc_send_sync_request(ctx->drvdata, &cc_req, desc, idx); if (rc) dev_err(dev, "send_request() failed (rc=%d)\n", rc); @@ -630,7 +630,7 @@ cc_aead_setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen) /* STAT_PHASE_3: Submit sequence to HW */ if (seq_len > 0) { /* For CCM there is no sequence to setup the key */ - rc = send_request(ctx->drvdata, &cc_req, desc, seq_len, 0); + rc = cc_send_sync_request(ctx->drvdata, &cc_req, desc, seq_len); if (rc) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); goto setkey_error; @@ -2039,7 +2039,7 @@ static int cc_proc_aead(struct aead_request *req, /* STAT_PHASE_3: Lock HW and push sequence */ - rc = send_request(ctx->drvdata, &cc_req, desc, seq_len, 1); + rc = cc_send_request(ctx->drvdata, &cc_req, desc, seq_len, &req->base); if (rc != -EINPROGRESS) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c index fe8d78d..ad56da7 100644 --- a/drivers/staging/ccree/ssi_cipher.c +++ b/drivers/staging/ccree/ssi_cipher.c @@ -717,7 +717,8 @@ static int cc_cipher_process(struct ablkcipher_request *req, /* STAT_PHASE_3: Lock HW and push sequence */ - rc = send_request(ctx_p->drvdata, &cc_req, desc, seq_len, 1); + rc = cc_send_request(ctx_p->drvdata, &cc_req, desc, seq_len, + &req->base); if (rc != -EINPROGRESS) { /* Failed to send the request or request completed * synchronously diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 06cc5cd..21745bb 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -532,7 +532,7 @@ static int cc_hash_digest(struct ahash_request *req) cc_set_endianity(ctx->hash_mode, &desc[idx]); idx++; - rc = send_request(ctx->drvdata, &cc_req, desc, idx, 1); + rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); if (rc != -EINPROGRESS) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, src, true); @@ -620,7 +620,7 @@ static int cc_hash_update(struct ahash_request *req) set_setup_mode(&desc[idx], SETUP_WRITE_STATE1); idx++; - rc = send_request(ctx->drvdata, &cc_req, desc, idx, 1); + rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); if (rc != -EINPROGRESS) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, src, true); @@ -741,7 +741,7 @@ static int cc_hash_finup(struct ahash_request *req) set_cipher_mode(&desc[idx], ctx->hw_mode); idx++; - rc = send_request(ctx->drvdata, &cc_req, desc, idx, 1); + rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); if (rc != -EINPROGRESS) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, src, true); @@ -873,7 +873,7 @@ static int cc_hash_final(struct ahash_request *req) set_cipher_mode(&desc[idx], ctx->hw_mode); idx++; - rc = send_request(ctx->drvdata, &cc_req, desc, idx, 1); + rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); if (rc != -EINPROGRESS) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, src, true); @@ -1014,7 +1014,7 @@ static int cc_hash_setkey(struct crypto_ahash *ahash, const u8 *key, idx++; } - rc = send_request(ctx->drvdata, &cc_req, desc, idx, 0); + rc = cc_send_sync_request(ctx->drvdata, &cc_req, desc, idx); if (rc) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); goto out; @@ -1071,7 +1071,7 @@ static int cc_hash_setkey(struct crypto_ahash *ahash, const u8 *key, idx++; } - rc = send_request(ctx->drvdata, &cc_req, desc, idx, 0); + rc = cc_send_sync_request(ctx->drvdata, &cc_req, desc, idx); out: if (rc) @@ -1154,7 +1154,7 @@ static int cc_xcbc_setkey(struct crypto_ahash *ahash, CC_AES_128_BIT_KEY_SIZE, NS_BIT, 0); idx++; - rc = send_request(ctx->drvdata, &cc_req, desc, idx, 0); + rc = cc_send_sync_request(ctx->drvdata, &cc_req, desc, idx); if (rc) crypto_ahash_set_flags(ahash, CRYPTO_TFM_RES_BAD_KEY_LEN); @@ -1355,7 +1355,7 @@ static int cc_mac_update(struct ahash_request *req) cc_req.user_cb = (void *)cc_update_complete; cc_req.user_arg = (void *)req; - rc = send_request(ctx->drvdata, &cc_req, desc, idx, 1); + rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); if (rc != -EINPROGRESS) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, req->src, true); @@ -1468,7 +1468,7 @@ static int cc_mac_final(struct ahash_request *req) set_cipher_mode(&desc[idx], ctx->hw_mode); idx++; - rc = send_request(ctx->drvdata, &cc_req, desc, idx, 1); + rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); if (rc != -EINPROGRESS) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, req->src, true); @@ -1541,7 +1541,7 @@ static int cc_mac_finup(struct ahash_request *req) set_cipher_mode(&desc[idx], ctx->hw_mode); idx++; - rc = send_request(ctx->drvdata, &cc_req, desc, idx, 1); + rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); if (rc != -EINPROGRESS) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, req->src, true); @@ -1615,7 +1615,7 @@ static int cc_mac_digest(struct ahash_request *req) set_cipher_mode(&desc[idx], ctx->hw_mode); idx++; - rc = send_request(ctx->drvdata, &cc_req, desc, idx, 1); + rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); if (rc != -EINPROGRESS) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, req->src, true); diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c index 18e2e1d..0d1f5b3 100644 --- a/drivers/staging/ccree/ssi_request_mgr.c +++ b/drivers/staging/ccree/ssi_request_mgr.c @@ -172,7 +172,7 @@ static void enqueue_seq(struct cc_drvdata *drvdata, struct cc_hw_desc seq[], /*! * Completion will take place if and only if user requested completion - * by setting "is_dout = 0" in send_request(). + * by cc_send_sync_request(). * * \param dev * \param dx_compl_h The completion event to signal @@ -199,7 +199,7 @@ static int cc_queues_status(struct cc_drvdata *drvdata, req_mgr_h->req_queue_tail) { dev_err(dev, "SW FIFO is full. req_queue_head=%d sw_fifo_len=%d\n", req_mgr_h->req_queue_head, MAX_REQUEST_QUEUE_SIZE); - return -EBUSY; + return -ENOSPC; } if (req_mgr_h->q_free_slots >= total_seq_len) @@ -224,24 +224,25 @@ static int cc_queues_status(struct cc_drvdata *drvdata, dev_dbg(dev, "HW FIFO full, timeout. req_queue_head=%d sw_fifo_len=%d q_free_slots=%d total_seq_len=%d\n", req_mgr_h->req_queue_head, MAX_REQUEST_QUEUE_SIZE, req_mgr_h->q_free_slots, total_seq_len); - return -EAGAIN; + return -ENOSPC; } /*! * Enqueue caller request to crypto hardware. + * Need to be called with HW lock held and PM running * * \param drvdata * \param cc_req The request to enqueue * \param desc The crypto sequence * \param len The crypto sequence length - * \param is_dout If "true": completion is handled by the caller - * If "false": this function adds a dummy descriptor completion - * and waits upon completion signal. + * \param add_comp If "true": add an artificial dout DMA to mark completion * - * \return int Returns -EINPROGRESS if "is_dout=true"; "0" if "is_dout=false" + * \return int Returns -EINPROGRESS or error code */ -int send_request(struct cc_drvdata *drvdata, struct cc_crypto_req *cc_req, - struct cc_hw_desc *desc, unsigned int len, bool is_dout) +static int cc_do_send_request(struct cc_drvdata *drvdata, + struct cc_crypto_req *cc_req, + struct cc_hw_desc *desc, unsigned int len, + bool add_comp, bool ivgen) { struct cc_req_mgr_handle *req_mgr_h = drvdata->request_mgr_handle; unsigned int used_sw_slots; @@ -250,59 +251,8 @@ int send_request(struct cc_drvdata *drvdata, struct cc_crypto_req *cc_req, struct cc_hw_desc iv_seq[CC_IVPOOL_SEQ_LEN]; struct device *dev = drvdata_to_dev(drvdata); int rc; - unsigned int max_required_seq_len = - (total_seq_len + - ((cc_req->ivgen_dma_addr_len == 0) ? 0 : - CC_IVPOOL_SEQ_LEN) + (!is_dout ? 1 : 0)); - -#if defined(CONFIG_PM) - rc = cc_pm_get(dev); - if (rc) { - dev_err(dev, "ssi_power_mgr_runtime_get returned %x\n", rc); - return rc; - } -#endif - - do { - spin_lock_bh(&req_mgr_h->hw_lock); - - /* Check if there is enough place in the SW/HW queues - * in case iv gen add the max size and in case of no dout add 1 - * for the internal completion descriptor - */ - rc = cc_queues_status(drvdata, req_mgr_h, max_required_seq_len); - if (rc == 0) - /* There is enough place in the queue */ - break; - /* something wrong release the spinlock*/ - spin_unlock_bh(&req_mgr_h->hw_lock); - - if (rc != -EAGAIN) { - /* Any error other than HW queue full - * (SW queue is full) - */ -#if defined(CONFIG_PM) - cc_pm_put_suspend(dev); -#endif - return rc; - } - - /* HW queue is full - wait for it to clear up */ - wait_for_completion_interruptible(&drvdata->hw_queue_avail); - reinit_completion(&drvdata->hw_queue_avail); - } while (1); - /* Additional completion descriptor is needed incase caller did not - * enabled any DLLI/MLLI DOUT bit in the given sequence - */ - if (!is_dout) { - init_completion(&cc_req->seq_compl); - cc_req->user_cb = request_mgr_complete; - cc_req->user_arg = &cc_req->seq_compl; - total_seq_len++; - } - - if (cc_req->ivgen_dma_addr_len > 0) { + if (ivgen) { dev_dbg(dev, "Acquire IV from pool into %d DMA addresses %pad, %pad, %pad, IV-size=%u\n", cc_req->ivgen_dma_addr_len, &cc_req->ivgen_dma_addr[0], @@ -318,10 +268,6 @@ int send_request(struct cc_drvdata *drvdata, struct cc_crypto_req *cc_req, if (rc) { dev_err(dev, "Failed to generate IV (rc=%d)\n", rc); - spin_unlock_bh(&req_mgr_h->hw_lock); -#if defined(CONFIG_PM) - cc_pm_put_suspend(dev); -#endif return rc; } @@ -350,9 +296,15 @@ int send_request(struct cc_drvdata *drvdata, struct cc_crypto_req *cc_req, wmb(); /* STAT_PHASE_4: Push sequence */ - enqueue_seq(drvdata, iv_seq, iv_seq_len); + if (ivgen) + enqueue_seq(drvdata, iv_seq, iv_seq_len); + enqueue_seq(drvdata, desc, len); - enqueue_seq(drvdata, &req_mgr_h->compl_desc, (is_dout ? 0 : 1)); + + if (add_comp) { + enqueue_seq(drvdata, &req_mgr_h->compl_desc, 1); + total_seq_len++; + } if (req_mgr_h->q_free_slots < total_seq_len) { /* This situation should never occur. Maybe indicating problem @@ -366,19 +318,95 @@ int send_request(struct cc_drvdata *drvdata, struct cc_crypto_req *cc_req, req_mgr_h->q_free_slots -= total_seq_len; } - spin_unlock_bh(&req_mgr_h->hw_lock); - - if (!is_dout) { - /* Wait upon sequence completion. - * Return "0" -Operation done successfully. - */ - wait_for_completion(&cc_req->seq_compl); - return 0; - } /* Operation still in process */ return -EINPROGRESS; } +int cc_send_request(struct cc_drvdata *drvdata, struct cc_crypto_req *cc_req, + struct cc_hw_desc *desc, unsigned int len, + struct crypto_async_request *req) +{ + int rc; + struct cc_req_mgr_handle *mgr = drvdata->request_mgr_handle; + bool ivgen = !!cc_req->ivgen_dma_addr_len; + unsigned int total_len = len + (ivgen ? CC_IVPOOL_SEQ_LEN : 0); + struct device *dev = drvdata_to_dev(drvdata); + +#if defined(CONFIG_PM) + rc = cc_pm_get(dev); + if (rc) { + dev_err(dev, "ssi_power_mgr_runtime_get returned %x\n", rc); + return rc; + } +#endif + spin_lock_bh(&mgr->hw_lock); + rc = cc_queues_status(drvdata, mgr, total_len); + + if (!rc) + rc = cc_do_send_request(drvdata, cc_req, desc, len, false, + ivgen); + + spin_unlock_bh(&mgr->hw_lock); + +#if defined(CONFIG_PM) + if (rc != -EINPROGRESS) + cc_pm_put_suspend(dev); +#endif + + return rc; +} + +int cc_send_sync_request(struct cc_drvdata *drvdata, + struct cc_crypto_req *cc_req, struct cc_hw_desc *desc, + unsigned int len) +{ + int rc; + struct device *dev = drvdata_to_dev(drvdata); + struct cc_req_mgr_handle *mgr = drvdata->request_mgr_handle; + + init_completion(&cc_req->seq_compl); + cc_req->user_cb = request_mgr_complete; + cc_req->user_arg = &cc_req->seq_compl; + +#if defined(CONFIG_PM) + rc = cc_pm_get(dev); + if (rc) { + dev_err(dev, "ssi_power_mgr_runtime_get returned %x\n", rc); + return rc; + } +#endif + while (true) { + spin_lock_bh(&mgr->hw_lock); + rc = cc_queues_status(drvdata, mgr, len + 1); + + if (!rc) + break; + + spin_unlock_bh(&mgr->hw_lock); + if (rc != -EAGAIN) { +#if defined(CONFIG_PM) + cc_pm_put_suspend(dev); +#endif + return rc; + } + wait_for_completion_interruptible(&drvdata->hw_queue_avail); + reinit_completion(&drvdata->hw_queue_avail); + } + + rc = cc_do_send_request(drvdata, cc_req, desc, len, true, false); + spin_unlock_bh(&mgr->hw_lock); + + if (rc != -EINPROGRESS) { +#if defined(CONFIG_PM) + cc_pm_put_suspend(dev); +#endif + return rc; + } + + wait_for_completion(&cc_req->seq_compl); + return 0; +} + /*! * Enqueue caller request to crypto hardware during init process. * assume this function is not called in middle of a flow, diff --git a/drivers/staging/ccree/ssi_request_mgr.h b/drivers/staging/ccree/ssi_request_mgr.h index 1698cd4..945c73d 100644 --- a/drivers/staging/ccree/ssi_request_mgr.h +++ b/drivers/staging/ccree/ssi_request_mgr.h @@ -23,10 +23,15 @@ int cc_req_mgr_init(struct cc_drvdata *drvdata); * If "false": this function adds a dummy descriptor completion * and waits upon completion signal. * - * \return int Returns -EINPROGRESS if "is_dout=true"; "0" if "is_dout=false" + * \return int Returns -EINPROGRESS or error */ -int send_request(struct cc_drvdata *drvdata, struct cc_crypto_req *cc_req, - struct cc_hw_desc *desc, unsigned int len, bool is_dout); +int cc_send_request(struct cc_drvdata *drvdata, struct cc_crypto_req *cc_req, + struct cc_hw_desc *desc, unsigned int len, + struct crypto_async_request *req); + +int cc_send_sync_request(struct cc_drvdata *drvdata, + struct cc_crypto_req *cc_req, struct cc_hw_desc *desc, + unsigned int len); int send_request_init(struct cc_drvdata *drvdata, struct cc_hw_desc *desc, unsigned int len); From patchwork Wed Jan 3 13:35:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123308 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10181647qgn; Wed, 3 Jan 2018 05:37:56 -0800 (PST) X-Google-Smtp-Source: ACJfBosjoGUX212rpoKycVpXfAk8JIyV+SanIjRZiP5OpfnLFO2QdTdSzU2UbxYxoI3hli3RsuPs X-Received: by 10.84.252.146 with SMTP id y18mr1451450pll.70.1514986675974; Wed, 03 Jan 2018 05:37:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986675; cv=none; d=google.com; s=arc-20160816; b=piKSJtib4b4BW3IL50SdMvJbjJt6xoQkdouxc/WGoh5KSjSn31UFt8QOSIR6QPeadP /bsaDaCG1G/Pk1nbAhi6ncqmevbOmxlBBDinK8rkipxaIa45Q0w879qOh/rFU+QZQNY8 zBSFKHxIs+zOBuPMCnqmrfD70wHpC7TIkpM8HMJE1s1rrhC8xfMyeTfLwylnX1x8FvZe KHRiw0J2kZHXv+pkxlgMQt3dN+GbP57eUfIjAJ7dhEsOy5ZLRPV40D69713D40xje98M Tx/g8qaMid0TvagqqNyvhxA78nYKKiszbEuo2fMKe3MDTsi14x3cqFokgxoJvEKj1oeQ +N+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=XWAXlZdYThAdZ5TdLIjsLk8AY5JVSMoprOK6jCMSzYM=; b=kMZfCormrIYM5F6Y4Hl+O8MsmT92IOODtzzxjS5TOISwCiGkgeaVPwgmJHtfQz10lM 94hgN4fwG86HBOxOpMTIVAmnt13RExxdOTtlVYiSo+mgA/SrWbGK5BjTZazRHasiGF24 Pw+hKL48TUwCRhoCILV8cYPbo7PGyYQtdTEzG7CWZbDYcga+5P7wn109jW5ayZgHkkAd sV9TWSfu1PMhxsXUkoMG0OXFbYthQLi+irpM/r690dyOFAszBv6rwZrVgsmKIDZTrQBX GA2e5k13PocWQSuRj/VCEJ4VRjOyT3rFRWXf9ZagekIqDJH4cRqqGmUCpfiZBNvM2W08 8CsA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k8si652844pgf.107.2018.01.03.05.37.55; Wed, 03 Jan 2018 05:37:55 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753044AbeACNhx (ORCPT + 28 others); Wed, 3 Jan 2018 08:37:53 -0500 Received: from foss.arm.com ([217.140.101.70]:50096 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753031AbeACNhv (ORCPT ); Wed, 3 Jan 2018 08:37:51 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C1B3C1529; Wed, 3 Jan 2018 05:37:50 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3A8093F24A; Wed, 3 Jan 2018 05:37:49 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 10/27] staging: ccree: add backlog processing Date: Wed, 3 Jan 2018 13:35:17 +0000 Message-Id: <1514986544-5888-11-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Crypto API tfm providers are required to provide a backlog service, if so indicated, that queues up requests in the case of the provider being busy and processing them later. The ccree driver did not provide this facility. Add it now. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_aead.c | 26 +++--- drivers/staging/ccree/ssi_cipher.c | 13 ++- drivers/staging/ccree/ssi_driver.h | 2 +- drivers/staging/ccree/ssi_hash.c | 28 +++---- drivers/staging/ccree/ssi_request_mgr.c | 136 ++++++++++++++++++++++++++++++-- 5 files changed, 163 insertions(+), 42 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c index ec50014..cbe520d 100644 --- a/drivers/staging/ccree/ssi_aead.c +++ b/drivers/staging/ccree/ssi_aead.c @@ -211,19 +211,21 @@ static int cc_aead_init(struct crypto_aead *tfm) return -ENOMEM; } -static void cc_aead_complete(struct device *dev, void *cc_req) +static void cc_aead_complete(struct device *dev, void *cc_req, int err) { struct aead_request *areq = (struct aead_request *)cc_req; struct aead_req_ctx *areq_ctx = aead_request_ctx(areq); struct crypto_aead *tfm = crypto_aead_reqtfm(cc_req); struct cc_aead_ctx *ctx = crypto_aead_ctx(tfm); - int err = 0; cc_unmap_aead_request(dev, areq); /* Restore ordinary iv pointer */ areq->iv = areq_ctx->backup_iv; + if (err) + goto done; + if (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) { if (memcmp(areq_ctx->mac_buf, areq_ctx->icv_virt_addr, ctx->authsize) != 0) { @@ -258,7 +260,7 @@ static void cc_aead_complete(struct device *dev, void *cc_req) CCM_BLOCK_IV_OFFSET, CCM_BLOCK_IV_SIZE); } } - +done: aead_request_complete(areq, err); } @@ -2041,7 +2043,7 @@ static int cc_proc_aead(struct aead_request *req, rc = cc_send_request(ctx->drvdata, &cc_req, desc, seq_len, &req->base); - if (rc != -EINPROGRESS) { + if (rc != -EINPROGRESS && rc != -EBUSY) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_aead_request(dev, req); } @@ -2063,7 +2065,7 @@ static int cc_aead_encrypt(struct aead_request *req) areq_ctx->plaintext_authenticate_only = false; rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_ENCRYPT); - if (rc != -EINPROGRESS) + if (rc != -EINPROGRESS && rc != -EBUSY) req->iv = areq_ctx->backup_iv; return rc; @@ -2092,7 +2094,7 @@ static int cc_rfc4309_ccm_encrypt(struct aead_request *req) cc_proc_rfc4309_ccm(req); rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_ENCRYPT); - if (rc != -EINPROGRESS) + if (rc != -EINPROGRESS && rc != -EBUSY) req->iv = areq_ctx->backup_iv; out: return rc; @@ -2111,7 +2113,7 @@ static int cc_aead_decrypt(struct aead_request *req) areq_ctx->plaintext_authenticate_only = false; rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_DECRYPT); - if (rc != -EINPROGRESS) + if (rc != -EINPROGRESS && rc != -EBUSY) req->iv = areq_ctx->backup_iv; return rc; @@ -2138,7 +2140,7 @@ static int cc_rfc4309_ccm_decrypt(struct aead_request *req) cc_proc_rfc4309_ccm(req); rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_DECRYPT); - if (rc != -EINPROGRESS) + if (rc != -EINPROGRESS && rc != -EBUSY) req->iv = areq_ctx->backup_iv; out: @@ -2257,7 +2259,7 @@ static int cc_rfc4106_gcm_encrypt(struct aead_request *req) areq_ctx->is_gcm4543 = true; rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_ENCRYPT); - if (rc != -EINPROGRESS) + if (rc != -EINPROGRESS && rc != -EBUSY) req->iv = areq_ctx->backup_iv; out: return rc; @@ -2281,7 +2283,7 @@ static int cc_rfc4543_gcm_encrypt(struct aead_request *req) areq_ctx->is_gcm4543 = true; rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_ENCRYPT); - if (rc != -EINPROGRESS) + if (rc != -EINPROGRESS && rc != -EBUSY) req->iv = areq_ctx->backup_iv; return rc; @@ -2312,7 +2314,7 @@ static int cc_rfc4106_gcm_decrypt(struct aead_request *req) areq_ctx->is_gcm4543 = true; rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_DECRYPT); - if (rc != -EINPROGRESS) + if (rc != -EINPROGRESS && rc != -EBUSY) req->iv = areq_ctx->backup_iv; out: return rc; @@ -2336,7 +2338,7 @@ static int cc_rfc4543_gcm_decrypt(struct aead_request *req) areq_ctx->is_gcm4543 = true; rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_DECRYPT); - if (rc != -EINPROGRESS) + if (rc != -EINPROGRESS && rc != -EBUSY) req->iv = areq_ctx->backup_iv; return rc; diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c index ad56da7..e2be35d 100644 --- a/drivers/staging/ccree/ssi_cipher.c +++ b/drivers/staging/ccree/ssi_cipher.c @@ -52,7 +52,7 @@ struct cc_cipher_ctx { struct crypto_shash *shash_tfm; }; -static void cc_cipher_complete(struct device *dev, void *cc_req); +static void cc_cipher_complete(struct device *dev, void *cc_req, int err); static int validate_keys_sizes(struct cc_cipher_ctx *ctx_p, u32 size) { @@ -590,7 +590,7 @@ static void cc_setup_cipher_data(struct crypto_tfm *tfm, } } -static void cc_cipher_complete(struct device *dev, void *cc_req) +static void cc_cipher_complete(struct device *dev, void *cc_req, int err) { struct ablkcipher_request *areq = (struct ablkcipher_request *)cc_req; struct scatterlist *dst = areq->dst; @@ -598,7 +598,6 @@ static void cc_cipher_complete(struct device *dev, void *cc_req) struct blkcipher_req_ctx *req_ctx = ablkcipher_request_ctx(areq); struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(areq); unsigned int ivsize = crypto_ablkcipher_ivsize(tfm); - int completion_error = 0; struct ablkcipher_request *req = (struct ablkcipher_request *)areq; cc_unmap_blkcipher_request(dev, req_ctx, ivsize, src, dst); @@ -614,13 +613,13 @@ static void cc_cipher_complete(struct device *dev, void *cc_req) if (req_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) { memcpy(req->info, req_ctx->backup_info, ivsize); kfree(req_ctx->backup_info); - } else { + } else if (!err) { scatterwalk_map_and_copy(req->info, req->dst, (req->nbytes - ivsize), ivsize, 0); } - ablkcipher_request_complete(areq, completion_error); + ablkcipher_request_complete(areq, err); } static int cc_cipher_process(struct ablkcipher_request *req, @@ -719,7 +718,7 @@ static int cc_cipher_process(struct ablkcipher_request *req, rc = cc_send_request(ctx_p->drvdata, &cc_req, desc, seq_len, &req->base); - if (rc != -EINPROGRESS) { + if (rc != -EINPROGRESS && rc != -EBUSY) { /* Failed to send the request or request completed * synchronously */ @@ -730,7 +729,7 @@ static int cc_cipher_process(struct ablkcipher_request *req, if (cts_restore_flag) ctx_p->cipher_mode = DRV_CIPHER_CBC_CTS; - if (rc != -EINPROGRESS) { + if (rc != -EINPROGRESS && rc != -EBUSY) { kfree(req_ctx->backup_info); kfree(req_ctx->iv); } diff --git a/drivers/staging/ccree/ssi_driver.h b/drivers/staging/ccree/ssi_driver.h index 4548f78..67f1403 100644 --- a/drivers/staging/ccree/ssi_driver.h +++ b/drivers/staging/ccree/ssi_driver.h @@ -81,7 +81,7 @@ extern bool cc_dump_bytes; #define CC_MAX_IVGEN_DMA_ADDRESSES 3 struct cc_crypto_req { - void (*user_cb)(struct device *dev, void *req); + void (*user_cb)(struct device *dev, void *req, int err); void *user_arg; dma_addr_t ivgen_dma_addr[CC_MAX_IVGEN_DMA_ADDRESSES]; /* For the first 'ivgen_dma_addr_len' addresses of this array, diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 21745bb..ffcd1f0 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -342,7 +342,7 @@ static void cc_unmap_result(struct device *dev, struct ahash_req_ctx *state, state->digest_result_dma_addr = 0; } -static void cc_update_complete(struct device *dev, void *cc_req) +static void cc_update_complete(struct device *dev, void *cc_req, int err) { struct ahash_request *req = (struct ahash_request *)cc_req; struct ahash_req_ctx *state = ahash_request_ctx(req); @@ -350,10 +350,10 @@ static void cc_update_complete(struct device *dev, void *cc_req) dev_dbg(dev, "req=%pK\n", req); cc_unmap_hash_request(dev, state, req->src, false); - req->base.complete(&req->base, 0); + req->base.complete(&req->base, err); } -static void cc_digest_complete(struct device *dev, void *cc_req) +static void cc_digest_complete(struct device *dev, void *cc_req, int err) { struct ahash_request *req = (struct ahash_request *)cc_req; struct ahash_req_ctx *state = ahash_request_ctx(req); @@ -366,10 +366,10 @@ static void cc_digest_complete(struct device *dev, void *cc_req) cc_unmap_hash_request(dev, state, req->src, false); cc_unmap_result(dev, state, digestsize, req->result); cc_unmap_req(dev, state, ctx); - req->base.complete(&req->base, 0); + req->base.complete(&req->base, err); } -static void cc_hash_complete(struct device *dev, void *cc_req) +static void cc_hash_complete(struct device *dev, void *cc_req, int err) { struct ahash_request *req = (struct ahash_request *)cc_req; struct ahash_req_ctx *state = ahash_request_ctx(req); @@ -382,7 +382,7 @@ static void cc_hash_complete(struct device *dev, void *cc_req) cc_unmap_hash_request(dev, state, req->src, false); cc_unmap_result(dev, state, digestsize, req->result); cc_unmap_req(dev, state, ctx); - req->base.complete(&req->base, 0); + req->base.complete(&req->base, err); } static int cc_hash_digest(struct ahash_request *req) @@ -533,7 +533,7 @@ static int cc_hash_digest(struct ahash_request *req) idx++; rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); - if (rc != -EINPROGRESS) { + if (rc != -EINPROGRESS && rc != -EBUSY) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, src, true); cc_unmap_result(dev, state, digestsize, result); @@ -621,7 +621,7 @@ static int cc_hash_update(struct ahash_request *req) idx++; rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); - if (rc != -EINPROGRESS) { + if (rc != -EINPROGRESS && rc != -EBUSY) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, src, true); } @@ -742,7 +742,7 @@ static int cc_hash_finup(struct ahash_request *req) idx++; rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); - if (rc != -EINPROGRESS) { + if (rc != -EINPROGRESS && rc != -EBUSY) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, src, true); cc_unmap_result(dev, state, digestsize, result); @@ -874,7 +874,7 @@ static int cc_hash_final(struct ahash_request *req) idx++; rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); - if (rc != -EINPROGRESS) { + if (rc != -EINPROGRESS && rc != -EBUSY) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, src, true); cc_unmap_result(dev, state, digestsize, result); @@ -1356,7 +1356,7 @@ static int cc_mac_update(struct ahash_request *req) cc_req.user_arg = (void *)req; rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); - if (rc != -EINPROGRESS) { + if (rc != -EINPROGRESS && rc != -EBUSY) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, req->src, true); } @@ -1469,7 +1469,7 @@ static int cc_mac_final(struct ahash_request *req) idx++; rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); - if (rc != -EINPROGRESS) { + if (rc != -EINPROGRESS && rc != -EBUSY) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, req->src, true); cc_unmap_result(dev, state, digestsize, req->result); @@ -1542,7 +1542,7 @@ static int cc_mac_finup(struct ahash_request *req) idx++; rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); - if (rc != -EINPROGRESS) { + if (rc != -EINPROGRESS && rc != -EBUSY) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, req->src, true); cc_unmap_result(dev, state, digestsize, req->result); @@ -1616,7 +1616,7 @@ static int cc_mac_digest(struct ahash_request *req) idx++; rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); - if (rc != -EINPROGRESS) { + if (rc != -EINPROGRESS && rc != -EBUSY) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, req->src, true); cc_unmap_result(dev, state, digestsize, req->result); diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c index 0d1f5b3..db3b29f 100644 --- a/drivers/staging/ccree/ssi_request_mgr.c +++ b/drivers/staging/ccree/ssi_request_mgr.c @@ -14,6 +14,8 @@ #include "ssi_pm.h" #define CC_MAX_POLL_ITER 10 +/* The highest descriptor count in used */ +#define CC_MAX_DESC_SEQ_LEN 23 struct cc_req_mgr_handle { /* Request manager resources */ @@ -33,6 +35,11 @@ struct cc_req_mgr_handle { u8 *dummy_comp_buff; dma_addr_t dummy_comp_buff_dma; + /* backlog queue */ + struct list_head backlog; + unsigned int bl_len; + spinlock_t bl_lock; /* protect backlog queue */ + #ifdef COMP_IN_WQ struct workqueue_struct *workq; struct delayed_work compwork; @@ -44,6 +51,14 @@ struct cc_req_mgr_handle { #endif }; +struct cc_bl_item { + struct cc_crypto_req creq; + struct cc_hw_desc desc[CC_MAX_DESC_SEQ_LEN]; + unsigned int len; + struct list_head list; + bool notif; +}; + static void comp_handler(unsigned long devarg); #ifdef COMP_IN_WQ static void comp_work_handler(struct work_struct *work); @@ -93,6 +108,9 @@ int cc_req_mgr_init(struct cc_drvdata *drvdata) drvdata->request_mgr_handle = req_mgr_h; spin_lock_init(&req_mgr_h->hw_lock); + spin_lock_init(&req_mgr_h->bl_lock); + INIT_LIST_HEAD(&req_mgr_h->backlog); + #ifdef COMP_IN_WQ dev_dbg(dev, "Initializing completion workqueue\n"); req_mgr_h->workq = create_singlethread_workqueue("arm_cc7x_wq"); @@ -177,7 +195,8 @@ static void enqueue_seq(struct cc_drvdata *drvdata, struct cc_hw_desc seq[], * \param dev * \param dx_compl_h The completion event to signal */ -static void request_mgr_complete(struct device *dev, void *dx_compl_h) +static void request_mgr_complete(struct device *dev, void *dx_compl_h, + int dummy) { struct completion *this_compl = dx_compl_h; @@ -322,6 +341,84 @@ static int cc_do_send_request(struct cc_drvdata *drvdata, return -EINPROGRESS; } +static void cc_enqueue_backlog(struct cc_drvdata *drvdata, + struct cc_bl_item *bli) +{ + struct cc_req_mgr_handle *mgr = drvdata->request_mgr_handle; + + spin_lock_bh(&mgr->bl_lock); + list_add_tail(&bli->list, &mgr->backlog); + ++mgr->bl_len; + spin_unlock_bh(&mgr->bl_lock); + tasklet_schedule(&mgr->comptask); +} + +static void cc_proc_backlog(struct cc_drvdata *drvdata) +{ + struct cc_req_mgr_handle *mgr = drvdata->request_mgr_handle; + struct cc_bl_item *bli; + struct cc_crypto_req *creq; + struct crypto_async_request *req; + bool ivgen; + unsigned int total_len; + struct device *dev = drvdata_to_dev(drvdata); + int rc; + + spin_lock(&mgr->bl_lock); + + while (mgr->bl_len) { + bli = list_first_entry(&mgr->backlog, struct cc_bl_item, list); + spin_unlock(&mgr->bl_lock); + + creq = &bli->creq; + req = (struct crypto_async_request *)creq->user_arg; + + /* + * Notify the request we're moving out of the backlog + * but only if we haven't done so already. + */ + if (!bli->notif) { + req->complete(req, -EINPROGRESS); + bli->notif = true; + } + + ivgen = !!creq->ivgen_dma_addr_len; + total_len = bli->len + (ivgen ? CC_IVPOOL_SEQ_LEN : 0); + + spin_lock(&mgr->hw_lock); + + rc = cc_queues_status(drvdata, mgr, total_len); + if (rc) { + /* + * There is still not room in the FIFO for + * this request. Bail out. We'll return here + * on the next completion irq. + */ + spin_unlock(&mgr->hw_lock); + return; + } + + rc = cc_do_send_request(drvdata, &bli->creq, bli->desc, + bli->len, false, ivgen); + + spin_unlock(&mgr->hw_lock); + + if (rc != -EINPROGRESS) { +#if defined(CONFIG_PM) + cc_pm_put_suspend(dev); +#endif + creq->user_cb(dev, req, rc); + } + + /* Remove ourselves from the backlog list */ + spin_lock(&mgr->bl_lock); + list_del(&bli->list); + --mgr->bl_len; + } + + spin_unlock(&mgr->bl_lock); +} + int cc_send_request(struct cc_drvdata *drvdata, struct cc_crypto_req *cc_req, struct cc_hw_desc *desc, unsigned int len, struct crypto_async_request *req) @@ -331,6 +428,9 @@ int cc_send_request(struct cc_drvdata *drvdata, struct cc_crypto_req *cc_req, bool ivgen = !!cc_req->ivgen_dma_addr_len; unsigned int total_len = len + (ivgen ? CC_IVPOOL_SEQ_LEN : 0); struct device *dev = drvdata_to_dev(drvdata); + bool backlog_ok = req->flags & CRYPTO_TFM_REQ_MAY_BACKLOG; + gfp_t flags = cc_gfp_flags(req); + struct cc_bl_item *bli; #if defined(CONFIG_PM) rc = cc_pm_get(dev); @@ -342,17 +442,35 @@ int cc_send_request(struct cc_drvdata *drvdata, struct cc_crypto_req *cc_req, spin_lock_bh(&mgr->hw_lock); rc = cc_queues_status(drvdata, mgr, total_len); - if (!rc) - rc = cc_do_send_request(drvdata, cc_req, desc, len, false, - ivgen); +#ifdef CC_DEBUG_FORCE_BACKLOG + if (backlog_ok) + rc = -ENOSPC; +#endif /* CC_DEBUG_FORCE_BACKLOG */ - spin_unlock_bh(&mgr->hw_lock); + if (rc == -ENOSPC && backlog_ok) { + spin_unlock_bh(&mgr->hw_lock); + bli = kmalloc(sizeof(*bli), flags); + if (!bli) { #if defined(CONFIG_PM) - if (rc != -EINPROGRESS) - cc_pm_put_suspend(dev); + cc_pm_put_suspend(dev); #endif + return -ENOMEM; + } + + memcpy(&bli->creq, cc_req, sizeof(*cc_req)); + memcpy(&bli->desc, desc, len * sizeof(*desc)); + bli->len = len; + bli->notif = false; + cc_enqueue_backlog(drvdata, bli); + return -EBUSY; + } + if (!rc) + rc = cc_do_send_request(drvdata, cc_req, desc, len, false, + ivgen); + + spin_unlock_bh(&mgr->hw_lock); return rc; } @@ -501,7 +619,7 @@ static void proc_completions(struct cc_drvdata *drvdata) cc_req = &request_mgr_handle->req_queue[*tail]; if (cc_req->user_cb) - cc_req->user_cb(dev, cc_req->user_arg); + cc_req->user_cb(dev, cc_req->user_arg, 0); *tail = (*tail + 1) & (MAX_REQUEST_QUEUE_SIZE - 1); dev_dbg(dev, "Dequeue request tail=%u\n", *tail); dev_dbg(dev, "Request completed. axi_completed=%d\n", @@ -566,6 +684,8 @@ static void comp_handler(unsigned long devarg) */ cc_iowrite(drvdata, CC_REG(HOST_IMR), cc_ioread(drvdata, CC_REG(HOST_IMR)) & ~irq); + + cc_proc_backlog(drvdata); } /* From patchwork Wed Jan 3 13:35:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123310 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10182018qgn; Wed, 3 Jan 2018 05:38:20 -0800 (PST) X-Google-Smtp-Source: ACJfBovOnlTxRsyToTVqxPwAwcbU7dGVHQQUFBgtxSEUdB5annLCFzpWpK03lntCT166DQ5OWHp5 X-Received: by 10.99.121.79 with SMTP id u76mr1233712pgc.337.1514986700245; Wed, 03 Jan 2018 05:38:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986700; cv=none; d=google.com; s=arc-20160816; b=TKX6lAPkflpuqFjx9vD9WGqP1PKwAcvJS9lmH3aEYMwLOVQWLWXzunNAte6Vpy4kRk PExr2f4tV7ZkpCFTxqy7GXqZH/RYV13bL2KvBz3RdMael/S37nVEtUE1rhFNLCrRQkY1 BQVHarnSXfHQCM1ZJZnyG/4Euy78gDHCRWw7VbB5aMVxz9lHVf9oXx8aVpMwiNQPB8Yi Y9gCfFnaojFIWYomEQajfBIz6DvYjBqbwawnR5kbWnVp4OfzZPX1OGyqIOsGhA4/dJGo +vGwHrOSJpUQFo1eOKReEY07NuoOiRMfJ2i9simpIiQz+aKfkDdH+/V6PHk2SX8vdcw0 0OeA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=f9dQEDA5mBUokYXmi7ktB3f8sB58S2z3lJHiV6AMzxU=; b=FZDsTCGe+kNVC1GRnvGqPkfFwlPdGXnm259UUJKXWYmw5trF5acU7gBVKEDKvvzU8s 1m8ZiwObXlZIKsgMPofIQSVE6Rdv9A7qXWkd/XhvgqUvfq9RSb4oZ1R7frKFKRrd3AY9 x6QO3n8lDeFyP09xs0TuN2qfoW9nRLxAuGTJUGgR2glVifdU6fcAS5Zwrc87PYUAjsJh MTAjNQ22iFIR+cnz7d6YPGj3eNGE2j0ADisHTJ3CF7P8rx36EpcWLhp4h2Kbpxadhf0A feQhypV9p2OFDMV3WwQ5kzeH5I83codMDxcrmknr9RVHLFXNgicY234F3wW5O4UxwajQ wVDA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k8si652844pgf.107.2018.01.03.05.38.19; Wed, 03 Jan 2018 05:38:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753083AbeACNiR (ORCPT + 28 others); Wed, 3 Jan 2018 08:38:17 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:50116 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753064AbeACNiO (ORCPT ); Wed, 3 Jan 2018 08:38:14 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 73B251529; Wed, 3 Jan 2018 05:38:14 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E8BA93F24A; Wed, 3 Jan 2018 05:38:12 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 12/27] staging: ccree: failing the suspend is not an error Date: Wed, 3 Jan 2018 13:35:19 +0000 Message-Id: <1514986544-5888-13-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org PM suspend returning a none zero value is not an error. It simply indicates a suspend is not advised right now so don't treat it as an error. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_request_mgr.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c index db3b29f..e99c148 100644 --- a/drivers/staging/ccree/ssi_request_mgr.c +++ b/drivers/staging/ccree/ssi_request_mgr.c @@ -598,9 +598,6 @@ static void proc_completions(struct cc_drvdata *drvdata) drvdata->request_mgr_handle; unsigned int *tail = &request_mgr_handle->req_queue_tail; unsigned int *head = &request_mgr_handle->req_queue_head; -#if defined(CONFIG_PM) - int rc = 0; -#endif while (request_mgr_handle->axi_completed) { request_mgr_handle->axi_completed--; @@ -625,10 +622,7 @@ static void proc_completions(struct cc_drvdata *drvdata) dev_dbg(dev, "Request completed. axi_completed=%d\n", request_mgr_handle->axi_completed); #if defined(CONFIG_PM) - rc = cc_pm_put_suspend(dev); - if (rc) - dev_err(dev, "Failed to set runtime suspension %d\n", - rc); + cc_pm_put_suspend(dev); #endif } } From patchwork Wed Jan 3 13:35:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123311 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10182233qgn; Wed, 3 Jan 2018 05:38:32 -0800 (PST) X-Google-Smtp-Source: ACJfBougO8QAWpsG81U43xLEFF3NnReLF0vCeqXwAy/9BoprPTNvL0sXO5bMYfy3i79VA7YXCCFM X-Received: by 10.99.121.79 with SMTP id u76mr1234146pgc.337.1514986712849; Wed, 03 Jan 2018 05:38:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986712; cv=none; d=google.com; s=arc-20160816; b=gFjp3CHf+Nw6o0A8YghbGPAqpIDUfa56/wldKyK4CDaDu5Hgk9x8zOmxouUxxf3Azf EOEWyQ6n78RRGsw9GnPhsBJ38r2gZQHXO4Hd/zYPVyKwPgLrXDMMixxmmfjQmUaVFCWV O485Y96Plb9ePeSBuPgYshU4YOeRVDplcZJi2MPbAOjlQEGh+OL01dt/RlNtaOKKNWQn K1H5oI21v/qCCs4DzEgvRkYhZ/koX8NK5VGP+ii+azmoERJNzWMa2k13GjQtRWM+jvZj xO5Lk5Z2gTI2sdViUQJorw0zZuefI5rOO2ypZxNTsuyp9dJOgL0au0ynJsR/S0lBLufJ 2BYg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=ZltmZsFaV/0E1UoDKSy0exHoZ60onNkh2XuBpRE4WHw=; b=SnhNmdLfrGSZnnxHWfI4gCFOy0irVVHnv1mjMHmzwcmwZ31ZcN1drS8Y35CYr2m6Zf pVz31znfnp9Zw7yyzPpVfBUP2DJLgJsrrFHIiMzeUWtrBs1BI72Z1i8TmmepzsLX5gte QhoXN355pHDJpLci1gkb4KP2uwkr1p0eCW5ryvlYDrBl0JdEbFOtIODjCLAa/k1BW4dP oI5M2rWfIoOGmuoVmYJ/Mn+eibbpt7FJX4Kv+uld11p6/sxahgYFl9zUNhDhMuI7PXfn hvxRpnn5ripcZBkFcim4qx7HTmggWpztkjqf8KBx09xmMpKuPGdyJeJSuuE5YLEywx0O 251w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k8si652844pgf.107.2018.01.03.05.38.32; Wed, 03 Jan 2018 05:38:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753104AbeACNi3 (ORCPT + 28 others); Wed, 3 Jan 2018 08:38:29 -0500 Received: from foss.arm.com ([217.140.101.70]:50126 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752924AbeACNi1 (ORCPT ); Wed, 3 Jan 2018 08:38:27 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1E38E1529; Wed, 3 Jan 2018 05:38:27 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 622DA3F24A; Wed, 3 Jan 2018 05:38:25 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , stable@vger.kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 13/27] staging: ccree: check DMA pool buf !NULL before free Date: Wed, 3 Jan 2018 13:35:20 +0000 Message-Id: <1514986544-5888-14-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org If we ran out of DMA pool buffers, we get into the unmap code path with a NULL before. Deal with this by checking the virtual mapping is not NULL. Cc: stable@vger.kernel.org Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_buffer_mgr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c index 5e3cff3..13cb062 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.c +++ b/drivers/staging/ccree/ssi_buffer_mgr.c @@ -465,7 +465,8 @@ void cc_unmap_blkcipher_request(struct device *dev, void *ctx, DMA_TO_DEVICE); } /* Release pool */ - if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) { + if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI && + req_ctx->mlli_params.mlli_virt_addr) { dma_pool_free(req_ctx->mlli_params.curr_pool, req_ctx->mlli_params.mlli_virt_addr, req_ctx->mlli_params.mlli_dma_addr); From patchwork Wed Jan 3 13:35:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123312 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10182430qgn; Wed, 3 Jan 2018 05:38:46 -0800 (PST) X-Google-Smtp-Source: ACJfBov6ANjIzX3ItVydS0c5uvX/o95s7M2lkb6raogRBHdbqoySR1ImhWWRAyD293hr5RR1W5YX X-Received: by 10.159.235.132 with SMTP id f4mr1454219plr.122.1514986725943; Wed, 03 Jan 2018 05:38:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986725; cv=none; d=google.com; s=arc-20160816; b=xBBcchLvVLADUWtRXHyIR575TCQgH9TB2Neq7LAVCTPdrDocMcOcOQSSMJi1qSpwec 6M2ou6Pjs6jLzlBD13d9v+6DayE2q3/2A0CYAAqDytFHo6mkOg2HSWDtIBpZRL9ebq+o VY/0aIGGuuXGG3ItdeFfu60t0ib8+DStxjKKchyfaJFMbjtACU5QUdjDYn6aL1PNi+MC EgUhPkaGvWdikX4n5W8Q4M2r9aNhCq1/Isa5y0i2HzROAhUsHvuKNSyotKdbjemaB7H1 N4sSIf8ozVvJY8wfMhLUyLpestDivkqvOhV77gORsaGysucKMVQKgQXHG+CCNoyuSEMg 4grw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=/cn+dhz0fVbZoifcX6Ya2sozgkPZs9GKxfsICBsNzUU=; b=fRmSuyAPF90hfRe9YXVRauiKayeVoC0hVHYlAvb+/QgOFskg8y46NWPT4abUR3+vKr 8w21T1D7Injw6yPYdweVj7aNTqFQJMp/CUe3Lr0SBGPk+ElLKPAZ9Bs6+0/dAPcyS8OM SohCaH4WL3RxnX5v9xhoKSDCv5lfcsnjPBUBqcIpvkiJKA3EgzI9taKgfHAq0ic71deU V9nSrS+DkZ0vNNYjzyNs2omT/MJ9EEQ4fQwi8ljBffiCqbW/OBEThK1gnUiqp6OZGM9+ qQIZbBqLnKGbzY2o9NTuvi1aqg2gJFv40Q5lv6u8tM+7B/Q6WEM8ccEutHi1IsMKHM5s Bvlw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p123si634086pga.747.2018.01.03.05.38.45; Wed, 03 Jan 2018 05:38:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753116AbeACNim (ORCPT + 28 others); Wed, 3 Jan 2018 08:38:42 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:50142 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752441AbeACNik (ORCPT ); Wed, 3 Jan 2018 08:38:40 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 09C2F1529; Wed, 3 Jan 2018 05:38:40 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4AAAF3F24A; Wed, 3 Jan 2018 05:38:38 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , stable@vger.kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 14/27] staging: ccree: handle end of sg list gracefully Date: Wed, 3 Jan 2018 13:35:21 +0000 Message-Id: <1514986544-5888-15-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org If we are asked for number of entries of an offset bigger than the sg list we should not crash. Cc: stable@vger.kernel.org Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_buffer_mgr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c index 13cb062..9e3f557 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.c +++ b/drivers/staging/ccree/ssi_buffer_mgr.c @@ -94,7 +94,7 @@ static unsigned int cc_get_sgl_nents(struct device *dev, { unsigned int nents = 0; - while (nbytes) { + while (nbytes && sg_list) { if (sg_list->length) { nents++; /* get the number of bytes in the last entry */ From patchwork Wed Jan 3 13:35:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123313 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10182625qgn; Wed, 3 Jan 2018 05:38:56 -0800 (PST) X-Google-Smtp-Source: ACJfBouzSfuOHGzP55CFgUnZrrGlC39I9EmB83rQbhPh2W+6iY2RNTrEn0ktienq3i5zskFmaIBl X-Received: by 10.98.190.26 with SMTP id l26mr1458209pff.90.1514986736715; Wed, 03 Jan 2018 05:38:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986736; cv=none; d=google.com; s=arc-20160816; b=kLNn+vVoXpTIVBh6+aF6qHM/J49cvPLjXjm5fFFIY5BHMqVMXICwYdRBxwRU9/e78W a7y2NeXTq+ZmoXOSKWvk8gqXcNe8N27eyLkTuwwz1hqfrbImoCMCLpm/HKSCi28SUViX QYjsfDOH8vPyXgKoWC+9Yq4CdMDoxk/wmm4RZijzX30odEP4tjkITSl0KCd1XSfRpJFt eo5r+tFM7yuVo6Y97tC1Rshoqtc+8lzjCRgUE+L1PLnweKH1THyPHgz4Ondh2EfYBTEU PB2Sc2ZHoHaEYpbQcFOoKMGObqELaKXA+exilsL3ixnmTITdBkogkEu25EU+rpI46XXP Nz/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=Y90JTKEYrmKZpKl9Zu73t04aMDtO40zkOOaUnv1nh6E=; b=U0qmzTB72eHaZQQgLhY9bQWrmUz6IcWzELkygmjA/fdxRPIdMtGAuooQ9z8w8QMMmh TnQBkn4inLD8rhG7UYXU/jXEIH7/eYuFAH0TgBhKVAjSTP0w5rxbiYr/hYZBSpWUYp15 Pp2ZpkQfxzcYHBPYuxxGVSzdkAtbvf2AEuKl2jIR9pSq+oFaqOxx6Gk01zyKDVHwTyCN 3+9JnGdIrFb1oi67yF0CO17tpwiJbWo5nX+jVk29WIq28cblrblwptUU2+TteT40OJUl 5MIbYP2mNWYchI1N2uqJ6mmoCauCEpj628hZMN4d3hBBGisS9aT6SEwacjAa5Q/Brzo5 +cDg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s192si15198pgs.472.2018.01.03.05.38.56; Wed, 03 Jan 2018 05:38:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753125AbeACNiw (ORCPT + 28 others); Wed, 3 Jan 2018 08:38:52 -0500 Received: from foss.arm.com ([217.140.101.70]:50152 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751716AbeACNiv (ORCPT ); Wed, 3 Jan 2018 08:38:51 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E55D71529; Wed, 3 Jan 2018 05:38:50 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6536A3F24A; Wed, 3 Jan 2018 05:38:49 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 15/27] staging: ccree: use Makefile to include PM code Date: Wed, 3 Jan 2018 13:35:22 +0000 Message-Id: <1514986544-5888-16-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace ugly ifdefs with some inline macros and Makefile magic for optionally including power management related code for better readability. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/Makefile | 3 ++- drivers/staging/ccree/ssi_pm.c | 9 +------- drivers/staging/ccree/ssi_pm.h | 39 +++++++++++++++++++++++++++------ drivers/staging/ccree/ssi_request_mgr.c | 18 ++------------- 4 files changed, 37 insertions(+), 32 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/Makefile b/drivers/staging/ccree/Makefile index bb47144..c107e25 100644 --- a/drivers/staging/ccree/Makefile +++ b/drivers/staging/ccree/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_CRYPTO_DEV_CCREE) := ccree.o -ccree-y := ssi_driver.o ssi_buffer_mgr.o ssi_request_mgr.o ssi_cipher.o ssi_hash.o ssi_aead.o ssi_ivgen.o ssi_sram_mgr.o ssi_pm.o +ccree-y := ssi_driver.o ssi_buffer_mgr.o ssi_request_mgr.o ssi_cipher.o ssi_hash.o ssi_aead.o ssi_ivgen.o ssi_sram_mgr.o ccree-$(CONFIG_CRYPTO_FIPS) += ssi_fips.o ccree-$(CONFIG_DEBUG_FS) += cc_debugfs.o +ccree-$(CONFIG_PM) += ssi_pm.o diff --git a/drivers/staging/ccree/ssi_pm.c b/drivers/staging/ccree/ssi_pm.c index 4031881..b0ace75 100644 --- a/drivers/staging/ccree/ssi_pm.c +++ b/drivers/staging/ccree/ssi_pm.c @@ -14,8 +14,6 @@ #include "ssi_hash.h" #include "ssi_pm.h" -#if defined(CONFIG_PM) - #define POWER_DOWN_ENABLE 0x01 #define POWER_DOWN_DISABLE 0x00 @@ -103,12 +101,9 @@ int cc_pm_put_suspend(struct device *dev) return rc; } -#endif - int cc_pm_init(struct cc_drvdata *drvdata) { int rc = 0; -#if defined(CONFIG_PM) struct device *dev = drvdata_to_dev(drvdata); /* must be before the enabling to avoid resdundent suspending */ @@ -120,13 +115,11 @@ int cc_pm_init(struct cc_drvdata *drvdata) return rc; /* enable the PM module*/ pm_runtime_enable(dev); -#endif + return rc; } void cc_pm_fini(struct cc_drvdata *drvdata) { -#if defined(CONFIG_PM) pm_runtime_disable(drvdata_to_dev(drvdata)); -#endif } diff --git a/drivers/staging/ccree/ssi_pm.h b/drivers/staging/ccree/ssi_pm.h index 138de71..c28f3aa 100644 --- a/drivers/staging/ccree/ssi_pm.h +++ b/drivers/staging/ccree/ssi_pm.h @@ -11,21 +11,46 @@ #define CC_SUSPEND_TIMEOUT 3000 -int cc_pm_init(struct cc_drvdata *drvdata); - -void cc_pm_fini(struct cc_drvdata *drvdata); - #if defined(CONFIG_PM) extern const struct dev_pm_ops ccree_pm; +int cc_pm_init(struct cc_drvdata *drvdata); +void cc_pm_fini(struct cc_drvdata *drvdata); int cc_pm_suspend(struct device *dev); - int cc_pm_resume(struct device *dev); - int cc_pm_get(struct device *dev); - int cc_pm_put_suspend(struct device *dev); + +#else + +static inline int cc_pm_init(struct cc_drvdata *drvdata) +{ + return 0; +} + +static inline void cc_pm_fini(struct cc_drvdata *drvdata) {} + +static inline int cc_pm_suspend(struct device *dev) +{ + return 0; +} + +static inline int cc_pm_resume(struct device *dev) +{ + return 0; +} + +static inline int cc_pm_get(struct device *dev) +{ + return 0; +} + +static inline int cc_pm_put_suspend(struct device *dev) +{ + return 0; +} + #endif #endif /*__POWER_MGR_H__*/ diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c index e99c148..01f4756 100644 --- a/drivers/staging/ccree/ssi_request_mgr.c +++ b/drivers/staging/ccree/ssi_request_mgr.c @@ -46,9 +46,7 @@ struct cc_req_mgr_handle { #else struct tasklet_struct comptask; #endif -#if defined(CONFIG_PM) bool is_runtime_suspended; -#endif }; struct cc_bl_item { @@ -404,9 +402,7 @@ static void cc_proc_backlog(struct cc_drvdata *drvdata) spin_unlock(&mgr->hw_lock); if (rc != -EINPROGRESS) { -#if defined(CONFIG_PM) cc_pm_put_suspend(dev); -#endif creq->user_cb(dev, req, rc); } @@ -432,13 +428,12 @@ int cc_send_request(struct cc_drvdata *drvdata, struct cc_crypto_req *cc_req, gfp_t flags = cc_gfp_flags(req); struct cc_bl_item *bli; -#if defined(CONFIG_PM) rc = cc_pm_get(dev); if (rc) { dev_err(dev, "ssi_power_mgr_runtime_get returned %x\n", rc); return rc; } -#endif + spin_lock_bh(&mgr->hw_lock); rc = cc_queues_status(drvdata, mgr, total_len); @@ -452,9 +447,7 @@ int cc_send_request(struct cc_drvdata *drvdata, struct cc_crypto_req *cc_req, bli = kmalloc(sizeof(*bli), flags); if (!bli) { -#if defined(CONFIG_PM) cc_pm_put_suspend(dev); -#endif return -ENOMEM; } @@ -486,13 +479,12 @@ int cc_send_sync_request(struct cc_drvdata *drvdata, cc_req->user_cb = request_mgr_complete; cc_req->user_arg = &cc_req->seq_compl; -#if defined(CONFIG_PM) rc = cc_pm_get(dev); if (rc) { dev_err(dev, "ssi_power_mgr_runtime_get returned %x\n", rc); return rc; } -#endif + while (true) { spin_lock_bh(&mgr->hw_lock); rc = cc_queues_status(drvdata, mgr, len + 1); @@ -502,9 +494,7 @@ int cc_send_sync_request(struct cc_drvdata *drvdata, spin_unlock_bh(&mgr->hw_lock); if (rc != -EAGAIN) { -#if defined(CONFIG_PM) cc_pm_put_suspend(dev); -#endif return rc; } wait_for_completion_interruptible(&drvdata->hw_queue_avail); @@ -515,9 +505,7 @@ int cc_send_sync_request(struct cc_drvdata *drvdata, spin_unlock_bh(&mgr->hw_lock); if (rc != -EINPROGRESS) { -#if defined(CONFIG_PM) cc_pm_put_suspend(dev); -#endif return rc; } @@ -621,9 +609,7 @@ static void proc_completions(struct cc_drvdata *drvdata) dev_dbg(dev, "Dequeue request tail=%u\n", *tail); dev_dbg(dev, "Request completed. axi_completed=%d\n", request_mgr_handle->axi_completed); -#if defined(CONFIG_PM) cc_pm_put_suspend(dev); -#endif } } From patchwork Wed Jan 3 13:35:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123314 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10182849qgn; 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[209.132.180.67]) by mx.google.com with ESMTP id f10si733090plm.88.2018.01.03.05.39.07; Wed, 03 Jan 2018 05:39:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753128AbeACNjE (ORCPT + 28 others); Wed, 3 Jan 2018 08:39:04 -0500 Received: from foss.arm.com ([217.140.101.70]:50164 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752124AbeACNjC (ORCPT ); Wed, 3 Jan 2018 08:39:02 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3ED8D1529; Wed, 3 Jan 2018 05:39:02 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B355F3F24A; Wed, 3 Jan 2018 05:39:00 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 16/27] staging: ccree: remove unused field Date: Wed, 3 Jan 2018 13:35:23 +0000 Message-Id: <1514986544-5888-17-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove unused struct field. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_hash.c | 1 - 1 file changed, 1 deletion(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index e05c87d..4e11b5d 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -23,7 +23,6 @@ struct cc_hash_handle { cc_sram_addr_t digest_len_sram_addr; /* const value in SRAM*/ cc_sram_addr_t larval_digest_sram_addr; /* const value in SRAM */ struct list_head hash_list; - struct completion init_comp; }; static const u32 digest_len_init[] = { From patchwork Wed Jan 3 13:35:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123315 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10183074qgn; Wed, 3 Jan 2018 05:39:21 -0800 (PST) X-Google-Smtp-Source: ACJfBosud4RU3vgNEnCVkoNVHsY8FiZLC6R4+dOKpm3aADLdRvqrVsPovZD06zpVGdU5b+p1cevM X-Received: by 10.84.242.76 with SMTP id c12mr1435434pll.445.1514986761233; Wed, 03 Jan 2018 05:39:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986761; cv=none; d=google.com; s=arc-20160816; b=TakjKEt+v6A7yeOoNniHqP4P7lv5HcFRYvaN3j54jkcSrrL9VAgbqo+LLFG1ACT97b eXWxdwB0XyS6jbSSwzleges2Yb/+hRb6z6iot7oW/JNr/y+jc+LLYUteDPEljYMMu7kI OvngMadVFQrhsd8eZmUg+9ocJSF0NzaOmO03pjpOsmUoddcCB/ljwZ5dBgqfkMqrZ63y sDQzkGaflG9gTkAt5dcqgO9cdYisLifRHvf1JLH5J1v8KAFfN1de7ecLjwGsYQwUlgkl sJs2u+F+bmzZBW43WQHQc6thtM9yF5tz54ZwwEMoqJlfmvznBz3eJ9/MWLJy4hpBMy8L omcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=gLEJu5M6Z4A0LkvAjIvt5uta0ZVAn0pvx0d1WyBd8rw=; b=WyuiVR8it1uKqtsQDoRRFa3bDyxgUdy36x5c2Qo6iF3CUomdaOQxAHlC+8pDQWmy05 frLNpyYkMl3KusoEDpFPo6cE4L/oamuA3f+EUSDGn1VN6ctd/TQiBiKPS05UkNA/zIWG vvmJ2NDnlUjblp58YqgPqgBkpnW0p0Q97t5uOuLD3EROEfssGIeS1y7vS4r+qCrHKaML alMOauoYH/hRrhC6VAL5eMdTCiecFFXVdJuOsZqKaqkhkpsaQZ6VrJdrAQBq1flusKt4 qt0cLXh3AWpBl5vODxbXOQE5Ao/FN1MR/NP4fwS1U/naBunkzGV7xXdahvrNV58Dhsrl Xilg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z3si717448pfh.370.2018.01.03.05.39.20; Wed, 03 Jan 2018 05:39:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752785AbeACNjQ (ORCPT + 28 others); Wed, 3 Jan 2018 08:39:16 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:50174 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751502AbeACNjO (ORCPT ); Wed, 3 Jan 2018 08:39:14 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6610E1529; Wed, 3 Jan 2018 05:39:14 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3B0023F24A; Wed, 3 Jan 2018 05:39:12 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 17/27] staging: ccree: use array for double buffer Date: Wed, 3 Jan 2018 13:35:24 +0000 Message-Id: <1514986544-5888-18-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The ccree hash code is using a double buffer to hold data for processing but manages the buffers and their associated data count in two separate fields and uses a predicate to chose which to use. Move to using a proper 2 members array for a much cleaner code. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_buffer_mgr.c | 21 +++++++------------- drivers/staging/ccree/ssi_hash.c | 36 ++++++++++++++++------------------ drivers/staging/ccree/ssi_hash.h | 26 ++++++++++++++++++++---- 3 files changed, 46 insertions(+), 37 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c index 9e3f557..9f67bb7 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.c +++ b/drivers/staging/ccree/ssi_buffer_mgr.c @@ -1391,10 +1391,8 @@ int cc_map_hash_request_final(struct cc_drvdata *drvdata, void *ctx, { struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx; struct device *dev = drvdata_to_dev(drvdata); - u8 *curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 : - areq_ctx->buff0; - u32 *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt : - &areq_ctx->buff0_cnt; + u8 *curr_buff = cc_hash_buf(areq_ctx); + u32 *curr_buff_cnt = cc_hash_buf_cnt(areq_ctx); struct mlli_params *mlli_params = &areq_ctx->mlli_params; struct buffer_array sg_data; struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle; @@ -1472,14 +1470,10 @@ int cc_map_hash_request_update(struct cc_drvdata *drvdata, void *ctx, { struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx; struct device *dev = drvdata_to_dev(drvdata); - u8 *curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 : - areq_ctx->buff0; - u32 *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt : - &areq_ctx->buff0_cnt; - u8 *next_buff = areq_ctx->buff_index ? areq_ctx->buff0 : - areq_ctx->buff1; - u32 *next_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff0_cnt : - &areq_ctx->buff1_cnt; + u8 *curr_buff = cc_hash_buf(areq_ctx); + u32 *curr_buff_cnt = cc_hash_buf_cnt(areq_ctx); + u8 *next_buff = cc_next_buf(areq_ctx); + u32 *next_buff_cnt = cc_next_buf_cnt(areq_ctx); struct mlli_params *mlli_params = &areq_ctx->mlli_params; unsigned int update_data_len; u32 total_in_len = nbytes + *curr_buff_cnt; @@ -1585,8 +1579,7 @@ void cc_unmap_hash_request(struct device *dev, void *ctx, struct scatterlist *src, bool do_revert) { struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx; - u32 *prev_len = areq_ctx->buff_index ? &areq_ctx->buff0_cnt : - &areq_ctx->buff1_cnt; + u32 *prev_len = cc_next_buf_cnt(areq_ctx); /*In case a pool was set, a table was *allocated and should be released diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 4e11b5d..a8ea6a2 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -129,12 +129,12 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, bool is_hmac = ctx->is_hmac; int rc = -ENOMEM; - state->buff0 = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags); - if (!state->buff0) + state->buffers[0] = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags); + if (!state->buffers[0]) goto fail0; - state->buff1 = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags); - if (!state->buff1) + state->buffers[1] = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags); + if (!state->buffers[1]) goto fail_buff0; state->digest_result_buff = kzalloc(CC_MAX_HASH_DIGEST_SIZE, flags); @@ -252,8 +252,8 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, } else { state->opad_digest_dma_addr = 0; } - state->buff0_cnt = 0; - state->buff1_cnt = 0; + state->buf_cnt[0] = 0; + state->buf_cnt[1] = 0; state->buff_index = 0; state->mlli_params.curr_pool = NULL; @@ -281,11 +281,11 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, kfree(state->digest_result_buff); state->digest_result_buff = NULL; fail_buff1: - kfree(state->buff1); - state->buff1 = NULL; + kfree(state->buffers[1]); + state->buffers[1] = NULL; fail_buff0: - kfree(state->buff0); - state->buff0 = NULL; + kfree(state->buffers[0]); + state->buffers[0] = NULL; fail0: return rc; } @@ -319,8 +319,8 @@ static void cc_unmap_req(struct device *dev, struct ahash_req_ctx *state, kfree(state->digest_bytes_len); kfree(state->digest_buff); kfree(state->digest_result_buff); - kfree(state->buff1); - kfree(state->buff0); + kfree(state->buffers[1]); + kfree(state->buffers[0]); } static void cc_unmap_result(struct device *dev, struct ahash_req_ctx *state, @@ -1375,8 +1375,7 @@ static int cc_mac_final(struct ahash_request *req) u32 key_size, key_len; u32 digestsize = crypto_ahash_digestsize(tfm); gfp_t flags = cc_gfp_flags(&req->base); - u32 rem_cnt = state->buff_index ? state->buff1_cnt : - state->buff0_cnt; + u32 rem_cnt = *cc_hash_buf_cnt(state); if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC) { key_size = CC_AES_128_BIT_KEY_SIZE; @@ -1630,9 +1629,8 @@ static int cc_hash_export(struct ahash_request *req, void *out) struct cc_hash_ctx *ctx = crypto_ahash_ctx(ahash); struct device *dev = drvdata_to_dev(ctx->drvdata); struct ahash_req_ctx *state = ahash_request_ctx(req); - u8 *curr_buff = state->buff_index ? state->buff1 : state->buff0; - u32 curr_buff_cnt = state->buff_index ? state->buff1_cnt : - state->buff0_cnt; + u8 *curr_buff = cc_hash_buf(state); + u32 curr_buff_cnt = *cc_hash_buf_cnt(state); const u32 tmp = CC_EXPORT_MAGIC; memcpy(out, &tmp, sizeof(u32)); @@ -1715,8 +1713,8 @@ static int cc_hash_import(struct ahash_request *req, const void *in) } in += sizeof(u32); - state->buff0_cnt = tmp; - memcpy(state->buff0, in, state->buff0_cnt); + state->buf_cnt[0] = tmp; + memcpy(state->buffers[0], in, tmp); out: return rc; diff --git a/drivers/staging/ccree/ssi_hash.h b/drivers/staging/ccree/ssi_hash.h index 484cbb4..78f193b 100644 --- a/drivers/staging/ccree/ssi_hash.h +++ b/drivers/staging/ccree/ssi_hash.h @@ -39,8 +39,7 @@ struct aeshash_state { /* ahash state */ struct ahash_req_ctx { - u8 *buff0; - u8 *buff1; + u8 *buffers[2]; u8 *digest_result_buff; struct async_gen_req_ctx gen_ctx; enum cc_req_dma_buf_type data_dma_buf_type; @@ -51,8 +50,7 @@ struct ahash_req_ctx { dma_addr_t digest_buff_dma_addr; dma_addr_t digest_bytes_len_dma_addr; dma_addr_t digest_result_dma_addr; - u32 buff0_cnt; - u32 buff1_cnt; + u32 buf_cnt[2]; u32 buff_index; u32 xcbc_count; /* count xcbc update operatations */ struct scatterlist buff_sg[2]; @@ -62,6 +60,26 @@ struct ahash_req_ctx { struct mlli_params mlli_params; }; +static inline u32 *cc_hash_buf_cnt(struct ahash_req_ctx *state) +{ + return &state->buf_cnt[state->buff_index]; +} + +static inline u8 *cc_hash_buf(struct ahash_req_ctx *state) +{ + return state->buffers[state->buff_index]; +} + +static inline u32 *cc_next_buf_cnt(struct ahash_req_ctx *state) +{ + return &state->buf_cnt[state->buff_index ^ 1]; +} + +static inline u8 *cc_next_buf(struct ahash_req_ctx *state) +{ + return state->buffers[state->buff_index ^ 1]; +} + int cc_hash_alloc(struct cc_drvdata *drvdata); int cc_init_hash_sram(struct cc_drvdata *drvdata); int cc_hash_free(struct cc_drvdata *drvdata); From patchwork Wed Jan 3 13:35:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123316 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10183261qgn; Wed, 3 Jan 2018 05:39:32 -0800 (PST) X-Google-Smtp-Source: ACJfBotHIuk2IvBH+o3h9XiogFQ//PG79jm+qq9v6IzKq2X7kKo3ZLxBe8L4mq3x4fq0psYd0oaZ X-Received: by 10.99.62.133 with SMTP id l127mr1253990pga.41.1514986771947; Wed, 03 Jan 2018 05:39:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986771; cv=none; d=google.com; s=arc-20160816; b=yflG6yTRejPbtIBUF8E30KdX6x+7H1O73APK2gSeG8o2+YepHC/6DZa/EyLXEuneng qNld7ln4dU2DCMqc0VV2aJ+h31B+qXp+7VNl7J+gyMiQ5BVyVCClPNHHJnVDan9euPi/ VwLAPSLIDoK/yfGI6sYrIAvIIHfQa8I+4+7+6giWRQfk/YACNsYRXyxKS6j0CJQ4DAN8 flug+m0gSYSuwRjIA2KEEHnSit95VtmwjGaPXbDcdv4EBcxH5N+TvY91f9su4ACkP02U oG7xPkS1Solwf1Hsp1j6yaWk19lVAB6wXW8drR/5blPCkOG6DP2bDaqamMWqIebJb4lr r+qQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=P7zDyp5ReXFeCSCRYzwN2HkkCFB64k7ZoSYjEWpmKdY=; b=O0esV7PKhDi/+o27zQaY2RgPquyyQVxvXGhZ1W2yApHu6RzwhUzmBMu9HkydTuJmxc UkUPMLzHejjX1/lboyAQ1TPgSFnSW8NkJ1GN9YC0i8w5Q1XqIshtdTXZvq4ykC34prZG X310qaGW0vtAyObJ3/6fS2AhmWuDE9R8cCxrIz2+m3gxvRIBGfpwvEaJdvMRvnIg/d12 KwtneM6oHJ7ihqm67MQi1fNJCykEld5PmRsOKL/EHWvck3U3mkyT/+dDgAe7etZ5yPqG HKZHQwdf5AOvAqGBzu5FaSPT2YxIsYrsWwFb5UUiwcOrYv0oBfBNU+9wYnulBDNd1ZTN 9qZg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f11si739411plm.77.2018.01.03.05.39.31; Wed, 03 Jan 2018 05:39:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753129AbeACNj1 (ORCPT + 28 others); Wed, 3 Jan 2018 08:39:27 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:50192 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751376AbeACNjZ (ORCPT ); Wed, 3 Jan 2018 08:39:25 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A70B91596; Wed, 3 Jan 2018 05:39:25 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 297943F24A; Wed, 3 Jan 2018 05:39:23 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 18/27] staging: ccree: allocate hash bufs inside req ctx Date: Wed, 3 Jan 2018 13:35:25 +0000 Message-Id: <1514986544-5888-19-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Move to allocating the buffers needed for requests as part of the request structure instead of malloc'ing each one on it's own, making for simpler (and more efficient) code. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_hash.c | 68 ++++------------------------------------ drivers/staging/ccree/ssi_hash.h | 12 +++---- 2 files changed, 12 insertions(+), 68 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index a8ea6a2..69fc2fcf3 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -108,7 +108,7 @@ static int cc_map_result(struct device *dev, struct ahash_req_ctx *state, unsigned int digestsize) { state->digest_result_dma_addr = - dma_map_single(dev, (void *)state->digest_result_buff, + dma_map_single(dev, state->digest_result_buff, digestsize, DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, state->digest_result_dma_addr)) { @@ -129,49 +129,15 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, bool is_hmac = ctx->is_hmac; int rc = -ENOMEM; - state->buffers[0] = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags); - if (!state->buffers[0]) - goto fail0; - - state->buffers[1] = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags); - if (!state->buffers[1]) - goto fail_buff0; - - state->digest_result_buff = kzalloc(CC_MAX_HASH_DIGEST_SIZE, flags); - if (!state->digest_result_buff) - goto fail_buff1; - - state->digest_buff = kzalloc(ctx->inter_digestsize, flags); - if (!state->digest_buff) - goto fail_digest_result_buff; - - dev_dbg(dev, "Allocated digest-buffer in context ctx->digest_buff=@%p\n", - state->digest_buff); - if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) { - state->digest_bytes_len = kzalloc(HASH_LEN_SIZE, flags); - if (!state->digest_bytes_len) - goto fail1; - - dev_dbg(dev, "Allocated digest-bytes-len in context state->>digest_bytes_len=@%p\n", - state->digest_bytes_len); - } else { - state->digest_bytes_len = NULL; - } - - state->opad_digest_buff = kzalloc(ctx->inter_digestsize, flags); - if (!state->opad_digest_buff) - goto fail2; - - dev_dbg(dev, "Allocated opad-digest-buffer in context state->digest_bytes_len=@%p\n", - state->opad_digest_buff); + memset(state, 0, sizeof(*state)); state->digest_buff_dma_addr = - dma_map_single(dev, (void *)state->digest_buff, + dma_map_single(dev, state->digest_buff, ctx->inter_digestsize, DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, state->digest_buff_dma_addr)) { dev_err(dev, "Mapping digest len %d B at va=%pK for DMA failed\n", ctx->inter_digestsize, state->digest_buff); - goto fail3; + goto fail0; } dev_dbg(dev, "Mapped digest %d B at va=%pK to dma=%pad\n", ctx->inter_digestsize, state->digest_buff, @@ -221,7 +187,7 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) { state->digest_bytes_len_dma_addr = - dma_map_single(dev, (void *)state->digest_bytes_len, + dma_map_single(dev, state->digest_bytes_len, HASH_LEN_SIZE, DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, state->digest_bytes_len_dma_addr)) { dev_err(dev, "Mapping digest len %u B at va=%pK for DMA failed\n", @@ -237,7 +203,7 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, if (is_hmac && ctx->hash_mode != DRV_HASH_NULL) { state->opad_digest_dma_addr = - dma_map_single(dev, (void *)state->opad_digest_buff, + dma_map_single(dev, state->opad_digest_buff, ctx->inter_digestsize, DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, state->opad_digest_dma_addr)) { @@ -271,21 +237,6 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, ctx->inter_digestsize, DMA_BIDIRECTIONAL); state->digest_buff_dma_addr = 0; } -fail3: - kfree(state->opad_digest_buff); -fail2: - kfree(state->digest_bytes_len); -fail1: - kfree(state->digest_buff); -fail_digest_result_buff: - kfree(state->digest_result_buff); - state->digest_result_buff = NULL; -fail_buff1: - kfree(state->buffers[1]); - state->buffers[1] = NULL; -fail_buff0: - kfree(state->buffers[0]); - state->buffers[0] = NULL; fail0: return rc; } @@ -314,13 +265,6 @@ static void cc_unmap_req(struct device *dev, struct ahash_req_ctx *state, &state->opad_digest_dma_addr); state->opad_digest_dma_addr = 0; } - - kfree(state->opad_digest_buff); - kfree(state->digest_bytes_len); - kfree(state->digest_buff); - kfree(state->digest_result_buff); - kfree(state->buffers[1]); - kfree(state->buffers[0]); } static void cc_unmap_result(struct device *dev, struct ahash_req_ctx *state, diff --git a/drivers/staging/ccree/ssi_hash.h b/drivers/staging/ccree/ssi_hash.h index 78f193b..3d3c024 100644 --- a/drivers/staging/ccree/ssi_hash.h +++ b/drivers/staging/ccree/ssi_hash.h @@ -39,13 +39,13 @@ struct aeshash_state { /* ahash state */ struct ahash_req_ctx { - u8 *buffers[2]; - u8 *digest_result_buff; - struct async_gen_req_ctx gen_ctx; + u8 buffers[2][CC_MAX_HASH_BLCK_SIZE] ____cacheline_aligned; + u8 digest_result_buff[CC_MAX_HASH_DIGEST_SIZE] ____cacheline_aligned; + u8 digest_buff[CC_MAX_HASH_DIGEST_SIZE] ____cacheline_aligned; + u8 opad_digest_buff[CC_MAX_HASH_DIGEST_SIZE] ____cacheline_aligned; + u8 digest_bytes_len[HASH_LEN_SIZE] ____cacheline_aligned; + struct async_gen_req_ctx gen_ctx ____cacheline_aligned; enum cc_req_dma_buf_type data_dma_buf_type; - u8 *digest_buff; - u8 *opad_digest_buff; - u8 *digest_bytes_len; dma_addr_t opad_digest_dma_addr; dma_addr_t digest_buff_dma_addr; dma_addr_t digest_bytes_len_dma_addr; From patchwork Wed Jan 3 13:35:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123317 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10183482qgn; Wed, 3 Jan 2018 05:39:44 -0800 (PST) X-Google-Smtp-Source: ACJfBov5fEF12btUCBe+3mwjRv2bZF+LWMxx+yZxlupk5UQhN9ngNey4OjUxJb4fuN8ZFrpowLJp X-Received: by 10.99.105.134 with SMTP id e128mr1261840pgc.152.1514986784096; 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[209.132.180.67]) by mx.google.com with ESMTP id q126si735961pfc.106.2018.01.03.05.39.43; Wed, 03 Jan 2018 05:39:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752748AbeACNjj (ORCPT + 28 others); Wed, 3 Jan 2018 08:39:39 -0500 Received: from foss.arm.com ([217.140.101.70]:50208 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751376AbeACNjh (ORCPT ); Wed, 3 Jan 2018 08:39:37 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 917CB1529; Wed, 3 Jan 2018 05:39:37 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 11F6E3F24A; Wed, 3 Jan 2018 05:39:35 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 19/27] staging: ccree: do not map bufs in ahash_init Date: Wed, 3 Jan 2018 13:35:26 +0000 Message-Id: <1514986544-5888-20-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org hash_init was mapping DMA memory that were then being unmap in hash_digest/final/finup callbacks, which is against the Crypto API usage rules (see discussion at https://www.mail-archive.com/linux-crypto@vger.kernel.org/msg30077.html) Fix it by moving all buffer mapping/unmapping or each Crypto API op. This also properly deals with hash_import() not knowing if hash_init was called or not as it now no longer matters. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_hash.c | 192 +++++++++++++++++++++------------------ 1 file changed, 103 insertions(+), 89 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 69fc2fcf3..11d83c2 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -123,34 +123,20 @@ static int cc_map_result(struct device *dev, struct ahash_req_ctx *state, return 0; } -static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, - struct cc_hash_ctx *ctx, gfp_t flags) +static void cc_init_req(struct device *dev, struct ahash_req_ctx *state, + struct cc_hash_ctx *ctx) { bool is_hmac = ctx->is_hmac; - int rc = -ENOMEM; memset(state, 0, sizeof(*state)); - state->digest_buff_dma_addr = - dma_map_single(dev, state->digest_buff, - ctx->inter_digestsize, DMA_BIDIRECTIONAL); - if (dma_mapping_error(dev, state->digest_buff_dma_addr)) { - dev_err(dev, "Mapping digest len %d B at va=%pK for DMA failed\n", - ctx->inter_digestsize, state->digest_buff); - goto fail0; - } - dev_dbg(dev, "Mapped digest %d B at va=%pK to dma=%pad\n", - ctx->inter_digestsize, state->digest_buff, - &state->digest_buff_dma_addr); - if (is_hmac) { - dma_sync_single_for_cpu(dev, ctx->digest_buff_dma_addr, - ctx->inter_digestsize, - DMA_BIDIRECTIONAL); - if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC || - ctx->hw_mode == DRV_CIPHER_CMAC) { - memset(state->digest_buff, 0, ctx->inter_digestsize); - } else { /*sha*/ + if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC && + ctx->hw_mode != DRV_CIPHER_CMAC) { + dma_sync_single_for_cpu(dev, ctx->digest_buff_dma_addr, + ctx->inter_digestsize, + DMA_BIDIRECTIONAL); + memcpy(state->digest_buff, ctx->digest_buff, ctx->inter_digestsize); #if (CC_DEV_SHA_MAX > 256) @@ -181,9 +167,24 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, memcpy(state->digest_buff, larval, ctx->inter_digestsize); } +} - dma_sync_single_for_device(dev, state->digest_buff_dma_addr, - ctx->inter_digestsize, DMA_BIDIRECTIONAL); +static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, + struct cc_hash_ctx *ctx) +{ + bool is_hmac = ctx->is_hmac; + + state->digest_buff_dma_addr = + dma_map_single(dev, state->digest_buff, + ctx->inter_digestsize, DMA_BIDIRECTIONAL); + if (dma_mapping_error(dev, state->digest_buff_dma_addr)) { + dev_err(dev, "Mapping digest len %d B at va=%pK for DMA failed\n", + ctx->inter_digestsize, state->digest_buff); + return -EINVAL; + } + dev_dbg(dev, "Mapped digest %d B at va=%pK to dma=%pad\n", + ctx->inter_digestsize, state->digest_buff, + &state->digest_buff_dma_addr); if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) { state->digest_bytes_len_dma_addr = @@ -192,13 +193,11 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, if (dma_mapping_error(dev, state->digest_bytes_len_dma_addr)) { dev_err(dev, "Mapping digest len %u B at va=%pK for DMA failed\n", HASH_LEN_SIZE, state->digest_bytes_len); - goto fail4; + goto unmap_digest_buf; } dev_dbg(dev, "Mapped digest len %u B at va=%pK to dma=%pad\n", HASH_LEN_SIZE, state->digest_bytes_len, &state->digest_bytes_len_dma_addr); - } else { - state->digest_bytes_len_dma_addr = 0; } if (is_hmac && ctx->hash_mode != DRV_HASH_NULL) { @@ -210,35 +209,29 @@ static int cc_map_req(struct device *dev, struct ahash_req_ctx *state, dev_err(dev, "Mapping opad digest %d B at va=%pK for DMA failed\n", ctx->inter_digestsize, state->opad_digest_buff); - goto fail5; + goto unmap_digest_len; } dev_dbg(dev, "Mapped opad digest %d B at va=%pK to dma=%pad\n", ctx->inter_digestsize, state->opad_digest_buff, &state->opad_digest_dma_addr); - } else { - state->opad_digest_dma_addr = 0; } - state->buf_cnt[0] = 0; - state->buf_cnt[1] = 0; - state->buff_index = 0; - state->mlli_params.curr_pool = NULL; return 0; -fail5: +unmap_digest_len: if (state->digest_bytes_len_dma_addr) { dma_unmap_single(dev, state->digest_bytes_len_dma_addr, HASH_LEN_SIZE, DMA_BIDIRECTIONAL); state->digest_bytes_len_dma_addr = 0; } -fail4: +unmap_digest_buf: if (state->digest_buff_dma_addr) { dma_unmap_single(dev, state->digest_buff_dma_addr, ctx->inter_digestsize, DMA_BIDIRECTIONAL); state->digest_buff_dma_addr = 0; } -fail0: - return rc; + + return -EINVAL; } static void cc_unmap_req(struct device *dev, struct ahash_req_ctx *state, @@ -289,10 +282,13 @@ static void cc_update_complete(struct device *dev, void *cc_req, int err) { struct ahash_request *req = (struct ahash_request *)cc_req; struct ahash_req_ctx *state = ahash_request_ctx(req); + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct cc_hash_ctx *ctx = crypto_ahash_ctx(tfm); dev_dbg(dev, "req=%pK\n", req); cc_unmap_hash_request(dev, state, req->src, false); + cc_unmap_req(dev, state, ctx); req->base.complete(&req->base, err); } @@ -350,19 +346,24 @@ static int cc_hash_digest(struct ahash_request *req) dev_dbg(dev, "===== %s-digest (%d) ====\n", is_hmac ? "hmac" : "hash", nbytes); - if (cc_map_req(dev, state, ctx, flags)) { + cc_init_req(dev, state, ctx); + + if (cc_map_req(dev, state, ctx)) { dev_err(dev, "map_ahash_source() failed\n"); return -ENOMEM; } if (cc_map_result(dev, state, digestsize)) { dev_err(dev, "map_ahash_digest() failed\n"); + cc_unmap_req(dev, state, ctx); return -ENOMEM; } if (cc_map_hash_request_final(ctx->drvdata, state, src, nbytes, 1, flags)) { dev_err(dev, "map_ahash_request_final() failed\n"); + cc_unmap_result(dev, state, digestsize, result); + cc_unmap_req(dev, state, ctx); return -ENOMEM; } @@ -521,6 +522,12 @@ static int cc_hash_update(struct ahash_request *req) return -ENOMEM; } + if (cc_map_req(dev, state, ctx)) { + dev_err(dev, "map_ahash_source() failed\n"); + cc_unmap_hash_request(dev, state, src, true); + return -EINVAL; + } + /* Setup DX request structure */ cc_req.user_cb = cc_update_complete; cc_req.user_arg = req; @@ -567,6 +574,7 @@ static int cc_hash_update(struct ahash_request *req) if (rc != -EINPROGRESS && rc != -EBUSY) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, src, true); + cc_unmap_req(dev, state, ctx); } return rc; } @@ -591,13 +599,21 @@ static int cc_hash_finup(struct ahash_request *req) dev_dbg(dev, "===== %s-finup (%d) ====\n", is_hmac ? "hmac" : "hash", nbytes); + if (cc_map_req(dev, state, ctx)) { + dev_err(dev, "map_ahash_source() failed\n"); + return -EINVAL; + } + if (cc_map_hash_request_final(ctx->drvdata, state, src, nbytes, 1, flags)) { dev_err(dev, "map_ahash_request_final() failed\n"); + cc_unmap_req(dev, state, ctx); return -ENOMEM; } if (cc_map_result(dev, state, digestsize)) { dev_err(dev, "map_ahash_digest() failed\n"); + cc_unmap_hash_request(dev, state, src, true); + cc_unmap_req(dev, state, ctx); return -ENOMEM; } @@ -689,6 +705,7 @@ static int cc_hash_finup(struct ahash_request *req) dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, src, true); cc_unmap_result(dev, state, digestsize, result); + cc_unmap_req(dev, state, ctx); } return rc; } @@ -713,14 +730,22 @@ static int cc_hash_final(struct ahash_request *req) dev_dbg(dev, "===== %s-final (%d) ====\n", is_hmac ? "hmac" : "hash", nbytes); + if (cc_map_req(dev, state, ctx)) { + dev_err(dev, "map_ahash_source() failed\n"); + return -EINVAL; + } + if (cc_map_hash_request_final(ctx->drvdata, state, src, nbytes, 0, flags)) { dev_err(dev, "map_ahash_request_final() failed\n"); + cc_unmap_req(dev, state, ctx); return -ENOMEM; } if (cc_map_result(dev, state, digestsize)) { dev_err(dev, "map_ahash_digest() failed\n"); + cc_unmap_hash_request(dev, state, src, true); + cc_unmap_req(dev, state, ctx); return -ENOMEM; } @@ -821,6 +846,7 @@ static int cc_hash_final(struct ahash_request *req) dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, src, true); cc_unmap_result(dev, state, digestsize, result); + cc_unmap_req(dev, state, ctx); } return rc; } @@ -831,12 +857,10 @@ static int cc_hash_init(struct ahash_request *req) struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); struct cc_hash_ctx *ctx = crypto_ahash_ctx(tfm); struct device *dev = drvdata_to_dev(ctx->drvdata); - gfp_t flags = cc_gfp_flags(&req->base); dev_dbg(dev, "===== init (%d) ====\n", req->nbytes); - state->xcbc_count = 0; - cc_map_req(dev, state, ctx, flags); + cc_init_req(dev, state, ctx); return 0; } @@ -1277,6 +1301,11 @@ static int cc_mac_update(struct ahash_request *req) return -ENOMEM; } + if (cc_map_req(dev, state, ctx)) { + dev_err(dev, "map_ahash_source() failed\n"); + return -EINVAL; + } + if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC) cc_setup_xcbc(req, desc, &idx); else @@ -1302,6 +1331,7 @@ static int cc_mac_update(struct ahash_request *req) if (rc != -EINPROGRESS && rc != -EBUSY) { dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, req->src, true); + cc_unmap_req(dev, state, ctx); } return rc; } @@ -1332,14 +1362,22 @@ static int cc_mac_final(struct ahash_request *req) dev_dbg(dev, "===== final xcbc reminder (%d) ====\n", rem_cnt); + if (cc_map_req(dev, state, ctx)) { + dev_err(dev, "map_ahash_source() failed\n"); + return -EINVAL; + } + if (cc_map_hash_request_final(ctx->drvdata, state, req->src, req->nbytes, 0, flags)) { dev_err(dev, "map_ahash_request_final() failed\n"); + cc_unmap_req(dev, state, ctx); return -ENOMEM; } if (cc_map_result(dev, state, digestsize)) { dev_err(dev, "map_ahash_digest() failed\n"); + cc_unmap_hash_request(dev, state, req->src, true); + cc_unmap_req(dev, state, ctx); return -ENOMEM; } @@ -1415,6 +1453,7 @@ static int cc_mac_final(struct ahash_request *req) dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, req->src, true); cc_unmap_result(dev, state, digestsize, req->result); + cc_unmap_req(dev, state, ctx); } return rc; } @@ -1439,13 +1478,21 @@ static int cc_mac_finup(struct ahash_request *req) return cc_mac_final(req); } + if (cc_map_req(dev, state, ctx)) { + dev_err(dev, "map_ahash_source() failed\n"); + return -EINVAL; + } + if (cc_map_hash_request_final(ctx->drvdata, state, req->src, req->nbytes, 1, flags)) { dev_err(dev, "map_ahash_request_final() failed\n"); + cc_unmap_req(dev, state, ctx); return -ENOMEM; } if (cc_map_result(dev, state, digestsize)) { dev_err(dev, "map_ahash_digest() failed\n"); + cc_unmap_hash_request(dev, state, req->src, true); + cc_unmap_req(dev, state, ctx); return -ENOMEM; } @@ -1488,6 +1535,7 @@ static int cc_mac_finup(struct ahash_request *req) dev_err(dev, "send_request() failed (rc=%d)\n", rc); cc_unmap_hash_request(dev, state, req->src, true); cc_unmap_result(dev, state, digestsize, req->result); + cc_unmap_req(dev, state, ctx); } return rc; } @@ -1508,18 +1556,22 @@ static int cc_mac_digest(struct ahash_request *req) dev_dbg(dev, "===== -digest mac (%d) ====\n", req->nbytes); - if (cc_map_req(dev, state, ctx, flags)) { + cc_init_req(dev, state, ctx); + + if (cc_map_req(dev, state, ctx)) { dev_err(dev, "map_ahash_source() failed\n"); return -ENOMEM; } if (cc_map_result(dev, state, digestsize)) { dev_err(dev, "map_ahash_digest() failed\n"); + cc_unmap_req(dev, state, ctx); return -ENOMEM; } if (cc_map_hash_request_final(ctx->drvdata, state, req->src, req->nbytes, 1, flags)) { dev_err(dev, "map_ahash_request_final() failed\n"); + cc_unmap_req(dev, state, ctx); return -ENOMEM; } @@ -1571,7 +1623,6 @@ static int cc_hash_export(struct ahash_request *req, void *out) { struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); struct cc_hash_ctx *ctx = crypto_ahash_ctx(ahash); - struct device *dev = drvdata_to_dev(ctx->drvdata); struct ahash_req_ctx *state = ahash_request_ctx(req); u8 *curr_buff = cc_hash_buf(state); u32 curr_buff_cnt = *cc_hash_buf_cnt(state); @@ -1580,19 +1631,10 @@ static int cc_hash_export(struct ahash_request *req, void *out) memcpy(out, &tmp, sizeof(u32)); out += sizeof(u32); - dma_sync_single_for_cpu(dev, state->digest_buff_dma_addr, - ctx->inter_digestsize, DMA_BIDIRECTIONAL); memcpy(out, state->digest_buff, ctx->inter_digestsize); out += ctx->inter_digestsize; - if (state->digest_bytes_len_dma_addr) { - dma_sync_single_for_cpu(dev, state->digest_bytes_len_dma_addr, - HASH_LEN_SIZE, DMA_BIDIRECTIONAL); - memcpy(out, state->digest_bytes_len, HASH_LEN_SIZE); - } else { - /* Poison the unused exported digest len field. */ - memset(out, 0x5F, HASH_LEN_SIZE); - } + memcpy(out, state->digest_bytes_len, HASH_LEN_SIZE); out += HASH_LEN_SIZE; memcpy(out, &curr_buff_cnt, sizeof(u32)); @@ -1600,10 +1642,6 @@ static int cc_hash_export(struct ahash_request *req, void *out) memcpy(out, curr_buff, curr_buff_cnt); - /* No sync for device ineeded since we did not change the data, - * we only copy it - */ - return 0; } @@ -1614,54 +1652,30 @@ static int cc_hash_import(struct ahash_request *req, const void *in) struct device *dev = drvdata_to_dev(ctx->drvdata); struct ahash_req_ctx *state = ahash_request_ctx(req); u32 tmp; - int rc; memcpy(&tmp, in, sizeof(u32)); - if (tmp != CC_EXPORT_MAGIC) { - rc = -EINVAL; - goto out; - } + if (tmp != CC_EXPORT_MAGIC) + return -EINVAL; in += sizeof(u32); - rc = cc_hash_init(req); - if (rc) - goto out; + cc_init_req(dev, state, ctx); - dma_sync_single_for_cpu(dev, state->digest_buff_dma_addr, - ctx->inter_digestsize, DMA_BIDIRECTIONAL); memcpy(state->digest_buff, in, ctx->inter_digestsize); in += ctx->inter_digestsize; - if (state->digest_bytes_len_dma_addr) { - dma_sync_single_for_cpu(dev, state->digest_bytes_len_dma_addr, - HASH_LEN_SIZE, DMA_BIDIRECTIONAL); - memcpy(state->digest_bytes_len, in, HASH_LEN_SIZE); - } + memcpy(state->digest_bytes_len, in, HASH_LEN_SIZE); in += HASH_LEN_SIZE; - dma_sync_single_for_device(dev, state->digest_buff_dma_addr, - ctx->inter_digestsize, DMA_BIDIRECTIONAL); - - if (state->digest_bytes_len_dma_addr) - dma_sync_single_for_device(dev, - state->digest_bytes_len_dma_addr, - HASH_LEN_SIZE, DMA_BIDIRECTIONAL); - - state->buff_index = 0; - /* Sanity check the data as much as possible */ memcpy(&tmp, in, sizeof(u32)); - if (tmp > CC_MAX_HASH_BLCK_SIZE) { - rc = -EINVAL; - goto out; - } + if (tmp > CC_MAX_HASH_BLCK_SIZE) + return -EINVAL; in += sizeof(u32); state->buf_cnt[0] = tmp; memcpy(state->buffers[0], in, tmp); -out: - return rc; + return 0; } struct cc_hash_template { From patchwork Wed Jan 3 13:35:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123327 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10185734qgn; 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[209.132.180.67]) by mx.google.com with ESMTP id y20si719775plr.437.2018.01.03.05.41.58; Wed, 03 Jan 2018 05:41:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752388AbeACNlz (ORCPT + 28 others); Wed, 3 Jan 2018 08:41:55 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:50218 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751690AbeACNjv (ORCPT ); Wed, 3 Jan 2018 08:39:51 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7298D1529; Wed, 3 Jan 2018 05:39:51 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 519BC3F24A; Wed, 3 Jan 2018 05:39:49 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 20/27] staging: ccree: fix indentation of func params Date: Wed, 3 Jan 2018 13:35:27 +0000 Message-Id: <1514986544-5888-21-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Fix indentation of some function params in hash code for better readability. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_hash.c | 46 +++++++++++++++++----------------------- 1 file changed, 20 insertions(+), 26 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 11d83c2..6e696ff 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -109,8 +109,7 @@ static int cc_map_result(struct device *dev, struct ahash_req_ctx *state, { state->digest_result_dma_addr = dma_map_single(dev, state->digest_result_buff, - digestsize, - DMA_BIDIRECTIONAL); + digestsize, DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, state->digest_result_dma_addr)) { dev_err(dev, "Mapping digest result buffer %u B for DMA failed\n", digestsize); @@ -264,16 +263,12 @@ static void cc_unmap_result(struct device *dev, struct ahash_req_ctx *state, unsigned int digestsize, u8 *result) { if (state->digest_result_dma_addr) { - dma_unmap_single(dev, - state->digest_result_dma_addr, - digestsize, - DMA_BIDIRECTIONAL); + dma_unmap_single(dev, state->digest_result_dma_addr, digestsize, + DMA_BIDIRECTIONAL); dev_dbg(dev, "unmpa digest result buffer va (%pK) pa (%pad) len %u\n", state->digest_result_buff, &state->digest_result_dma_addr, digestsize); - memcpy(result, - state->digest_result_buff, - digestsize); + memcpy(result, state->digest_result_buff, digestsize); } state->digest_result_dma_addr = 0; } @@ -1100,25 +1095,25 @@ static int cc_xcbc_setkey(struct crypto_ahash *ahash, hw_desc_init(&desc[idx]); set_din_const(&desc[idx], 0x01010101, CC_AES_128_BIT_KEY_SIZE); set_flow_mode(&desc[idx], DIN_AES_DOUT); - set_dout_dlli(&desc[idx], (ctx->opad_tmp_keys_dma_addr + - XCBC_MAC_K1_OFFSET), - CC_AES_128_BIT_KEY_SIZE, NS_BIT, 0); + set_dout_dlli(&desc[idx], + (ctx->opad_tmp_keys_dma_addr + XCBC_MAC_K1_OFFSET), + CC_AES_128_BIT_KEY_SIZE, NS_BIT, 0); idx++; hw_desc_init(&desc[idx]); set_din_const(&desc[idx], 0x02020202, CC_AES_128_BIT_KEY_SIZE); set_flow_mode(&desc[idx], DIN_AES_DOUT); - set_dout_dlli(&desc[idx], (ctx->opad_tmp_keys_dma_addr + - XCBC_MAC_K2_OFFSET), - CC_AES_128_BIT_KEY_SIZE, NS_BIT, 0); + set_dout_dlli(&desc[idx], + (ctx->opad_tmp_keys_dma_addr + XCBC_MAC_K2_OFFSET), + CC_AES_128_BIT_KEY_SIZE, NS_BIT, 0); idx++; hw_desc_init(&desc[idx]); set_din_const(&desc[idx], 0x03030303, CC_AES_128_BIT_KEY_SIZE); set_flow_mode(&desc[idx], DIN_AES_DOUT); - set_dout_dlli(&desc[idx], (ctx->opad_tmp_keys_dma_addr + - XCBC_MAC_K3_OFFSET), - CC_AES_128_BIT_KEY_SIZE, NS_BIT, 0); + set_dout_dlli(&desc[idx], + (ctx->opad_tmp_keys_dma_addr + XCBC_MAC_K3_OFFSET), + CC_AES_128_BIT_KEY_SIZE, NS_BIT, 0); idx++; rc = cc_send_sync_request(ctx->drvdata, &cc_req, desc, idx); @@ -1245,8 +1240,7 @@ static int cc_cra_init(struct crypto_tfm *tfm) struct ahash_alg *ahash_alg = container_of(hash_alg_common, struct ahash_alg, halg); struct cc_hash_alg *cc_alg = - container_of(ahash_alg, struct cc_hash_alg, - ahash_alg); + container_of(ahash_alg, struct cc_hash_alg, ahash_alg); crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), sizeof(struct ahash_req_ctx)); @@ -1391,8 +1385,8 @@ static int cc_mac_final(struct ahash_request *req) set_cipher_mode(&desc[idx], DRV_CIPHER_ECB); set_cipher_config0(&desc[idx], DRV_CRYPTO_DIRECTION_DECRYPT); set_din_type(&desc[idx], DMA_DLLI, - (ctx->opad_tmp_keys_dma_addr + - XCBC_MAC_K1_OFFSET), key_size, NS_BIT); + (ctx->opad_tmp_keys_dma_addr + XCBC_MAC_K1_OFFSET), + key_size, NS_BIT); set_key_size_aes(&desc[idx], key_len); set_flow_mode(&desc[idx], S_DIN_to_AES); set_setup_mode(&desc[idx], SETUP_LOAD_KEY0); @@ -2197,8 +2191,8 @@ static void cc_setup_xcbc(struct ahash_request *areq, struct cc_hw_desc desc[], /* Setup XCBC MAC K2 */ hw_desc_init(&desc[idx]); - set_din_type(&desc[idx], DMA_DLLI, (ctx->opad_tmp_keys_dma_addr + - XCBC_MAC_K2_OFFSET), + set_din_type(&desc[idx], DMA_DLLI, + (ctx->opad_tmp_keys_dma_addr + XCBC_MAC_K2_OFFSET), CC_AES_128_BIT_KEY_SIZE, NS_BIT); set_setup_mode(&desc[idx], SETUP_LOAD_STATE1); set_cipher_mode(&desc[idx], DRV_CIPHER_XCBC_MAC); @@ -2209,8 +2203,8 @@ static void cc_setup_xcbc(struct ahash_request *areq, struct cc_hw_desc desc[], /* Setup XCBC MAC K3 */ hw_desc_init(&desc[idx]); - set_din_type(&desc[idx], DMA_DLLI, (ctx->opad_tmp_keys_dma_addr + - XCBC_MAC_K3_OFFSET), + set_din_type(&desc[idx], DMA_DLLI, + (ctx->opad_tmp_keys_dma_addr + XCBC_MAC_K3_OFFSET), CC_AES_128_BIT_KEY_SIZE, NS_BIT); set_setup_mode(&desc[idx], SETUP_LOAD_STATE2); set_cipher_mode(&desc[idx], DRV_CIPHER_XCBC_MAC); From patchwork Wed Jan 3 13:35:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123318 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10183837qgn; Wed, 3 Jan 2018 05:40:07 -0800 (PST) X-Google-Smtp-Source: ACJfBovzjM1bvYj+ptImRX5Pv/cnXI9PJxTtoQi6dKYmwJ/kuv9xOi38Rk9012Inyznot+Lpq9Ie X-Received: by 10.84.164.104 with SMTP id m37mr1424444plg.29.1514986807696; Wed, 03 Jan 2018 05:40:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986807; cv=none; d=google.com; s=arc-20160816; b=Hmb/c8GVrtdrVih9xtwypNn2smYf0fU0yP6j9C5bTEbrfc5uFQKRfrrODHcJKCQRg0 x1WXa4VV/ckLx2WSKhmMvPCYyw+RH7pyoj40l/7MjoxqIgivwRRhWq5bkOMVGY3dJc0m ibwc/7yps5dR7CL6kB/M7WqN/bDLY6ADhkGNtcfF5YqmDV3gVq/VoZ3naw8JhC0fKS4V e5bXlZsjv6NEKRVVgDdmlRxMHKKsbLn8tDtu7B/HhoWhp70VfdskPYSGHaxO7Zq/2R/w 3twVKku9saDiFktVSTAfSJH61kCs58bWt/X26sYcm0dSmgy8OOxJ05w0XuSMisCuv3oq o2sw== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id f9si641869pgt.544.2018.01.03.05.40.07; Wed, 03 Jan 2018 05:40:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752882AbeACNkE (ORCPT + 28 others); Wed, 3 Jan 2018 08:40:04 -0500 Received: from foss.arm.com ([217.140.101.70]:50228 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752541AbeACNkC (ORCPT ); Wed, 3 Jan 2018 08:40:02 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 49A9D1529; Wed, 3 Jan 2018 05:40:02 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 88C763F24A; Wed, 3 Jan 2018 05:40:00 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 21/27] staging: ccree: fold common code into service func Date: Wed, 3 Jan 2018 13:35:28 +0000 Message-Id: <1514986544-5888-22-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Fold common code in hash call into service functions. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_hash.c | 339 ++++++++++++++------------------------- 1 file changed, 116 insertions(+), 223 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 6e696ff..731c0d6 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -319,6 +319,84 @@ static void cc_hash_complete(struct device *dev, void *cc_req, int err) req->base.complete(&req->base, err); } +static int cc_fin_result(struct cc_hw_desc *desc, struct ahash_request *req, + int idx) +{ + struct ahash_req_ctx *state = ahash_request_ctx(req); + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct cc_hash_ctx *ctx = crypto_ahash_ctx(tfm); + u32 digestsize = crypto_ahash_digestsize(tfm); + + /* Get final MAC result */ + hw_desc_init(&desc[idx]); + set_cipher_mode(&desc[idx], ctx->hw_mode); + /* TODO */ + set_dout_dlli(&desc[idx], state->digest_result_dma_addr, digestsize, + NS_BIT, 1); + set_queue_last_ind(&desc[idx]); + set_flow_mode(&desc[idx], S_HASH_to_DOUT); + set_setup_mode(&desc[idx], SETUP_WRITE_STATE0); + set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED); + cc_set_endianity(ctx->hash_mode, &desc[idx]); + idx++; + + return idx; +} + +static int cc_fin_hmac(struct cc_hw_desc *desc, struct ahash_request *req, + int idx) +{ + struct ahash_req_ctx *state = ahash_request_ctx(req); + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct cc_hash_ctx *ctx = crypto_ahash_ctx(tfm); + u32 digestsize = crypto_ahash_digestsize(tfm); + + /* store the hash digest result in the context */ + hw_desc_init(&desc[idx]); + set_cipher_mode(&desc[idx], ctx->hw_mode); + set_dout_dlli(&desc[idx], state->digest_buff_dma_addr, digestsize, + NS_BIT, 0); + set_flow_mode(&desc[idx], S_HASH_to_DOUT); + cc_set_endianity(ctx->hash_mode, &desc[idx]); + set_setup_mode(&desc[idx], SETUP_WRITE_STATE0); + idx++; + + /* Loading hash opad xor key state */ + hw_desc_init(&desc[idx]); + set_cipher_mode(&desc[idx], ctx->hw_mode); + set_din_type(&desc[idx], DMA_DLLI, state->opad_digest_dma_addr, + ctx->inter_digestsize, NS_BIT); + set_flow_mode(&desc[idx], S_DIN_to_HASH); + set_setup_mode(&desc[idx], SETUP_LOAD_STATE0); + idx++; + + /* Load the hash current length */ + hw_desc_init(&desc[idx]); + set_cipher_mode(&desc[idx], ctx->hw_mode); + set_din_sram(&desc[idx], + cc_digest_len_addr(ctx->drvdata, ctx->hash_mode), + HASH_LEN_SIZE); + set_cipher_config1(&desc[idx], HASH_PADDING_ENABLED); + set_flow_mode(&desc[idx], S_DIN_to_HASH); + set_setup_mode(&desc[idx], SETUP_LOAD_KEY0); + idx++; + + /* Memory Barrier: wait for IPAD/OPAD axi write to complete */ + hw_desc_init(&desc[idx]); + set_din_no_dma(&desc[idx], 0, 0xfffff0); + set_dout_no_dma(&desc[idx], 0, 0, 1); + idx++; + + /* Perform HASH update */ + hw_desc_init(&desc[idx]); + set_din_type(&desc[idx], DMA_DLLI, state->digest_buff_dma_addr, + digestsize, NS_BIT); + set_flow_mode(&desc[idx], DIN_HASH); + idx++; + + return idx; +} + static int cc_hash_digest(struct ahash_request *req) { struct ahash_req_ctx *state = ahash_request_ctx(req); @@ -414,62 +492,10 @@ static int cc_hash_digest(struct ahash_request *req) set_cipher_do(&desc[idx], DO_PAD); idx++; - /* store the hash digest result in the context */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - set_dout_dlli(&desc[idx], state->digest_buff_dma_addr, - digestsize, NS_BIT, 0); - set_flow_mode(&desc[idx], S_HASH_to_DOUT); - cc_set_endianity(ctx->hash_mode, &desc[idx]); - set_setup_mode(&desc[idx], SETUP_WRITE_STATE0); - idx++; - - /* Loading hash opad xor key state */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - set_din_type(&desc[idx], DMA_DLLI, state->opad_digest_dma_addr, - ctx->inter_digestsize, NS_BIT); - set_flow_mode(&desc[idx], S_DIN_to_HASH); - set_setup_mode(&desc[idx], SETUP_LOAD_STATE0); - idx++; - - /* Load the hash current length */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - set_din_sram(&desc[idx], - cc_digest_len_addr(ctx->drvdata, ctx->hash_mode), - HASH_LEN_SIZE); - set_cipher_config1(&desc[idx], HASH_PADDING_ENABLED); - set_flow_mode(&desc[idx], S_DIN_to_HASH); - set_setup_mode(&desc[idx], SETUP_LOAD_KEY0); - idx++; - - /* Memory Barrier: wait for IPAD/OPAD axi write to complete */ - hw_desc_init(&desc[idx]); - set_din_no_dma(&desc[idx], 0, 0xfffff0); - set_dout_no_dma(&desc[idx], 0, 0, 1); - idx++; - - /* Perform HASH update */ - hw_desc_init(&desc[idx]); - set_din_type(&desc[idx], DMA_DLLI, state->digest_buff_dma_addr, - digestsize, NS_BIT); - set_flow_mode(&desc[idx], DIN_HASH); - idx++; + idx = cc_fin_hmac(desc, req, idx); } - /* Get final MAC result */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - /* TODO */ - set_dout_dlli(&desc[idx], state->digest_result_dma_addr, digestsize, - NS_BIT, 1); - set_queue_last_ind(&desc[idx]); - set_flow_mode(&desc[idx], S_HASH_to_DOUT); - set_setup_mode(&desc[idx], SETUP_WRITE_STATE0); - set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED); - cc_set_endianity(ctx->hash_mode, &desc[idx]); - idx++; + idx = cc_fin_result(desc, req, idx); rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); if (rc != -EINPROGRESS && rc != -EBUSY) { @@ -481,6 +507,33 @@ static int cc_hash_digest(struct ahash_request *req) return rc; } +static int cc_restore_hash(struct cc_hw_desc *desc, struct cc_hash_ctx *ctx, + struct ahash_req_ctx *state, int idx) +{ + /* Restore hash digest */ + hw_desc_init(&desc[idx]); + set_cipher_mode(&desc[idx], ctx->hw_mode); + set_din_type(&desc[idx], DMA_DLLI, state->digest_buff_dma_addr, + ctx->inter_digestsize, NS_BIT); + set_flow_mode(&desc[idx], S_DIN_to_HASH); + set_setup_mode(&desc[idx], SETUP_LOAD_STATE0); + idx++; + + /* Restore hash current length */ + hw_desc_init(&desc[idx]); + set_cipher_mode(&desc[idx], ctx->hw_mode); + set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED); + set_din_type(&desc[idx], DMA_DLLI, state->digest_bytes_len_dma_addr, + HASH_LEN_SIZE, NS_BIT); + set_flow_mode(&desc[idx], S_DIN_to_HASH); + set_setup_mode(&desc[idx], SETUP_LOAD_KEY0); + idx++; + + cc_set_desc(state, ctx, DIN_HASH, desc, false, &idx); + + return idx; +} + static int cc_hash_update(struct ahash_request *req) { struct ahash_req_ctx *state = ahash_request_ctx(req); @@ -527,24 +580,7 @@ static int cc_hash_update(struct ahash_request *req) cc_req.user_cb = cc_update_complete; cc_req.user_arg = req; - /* Restore hash digest */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - set_din_type(&desc[idx], DMA_DLLI, state->digest_buff_dma_addr, - ctx->inter_digestsize, NS_BIT); - set_flow_mode(&desc[idx], S_DIN_to_HASH); - set_setup_mode(&desc[idx], SETUP_LOAD_STATE0); - idx++; - /* Restore hash current length */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - set_din_type(&desc[idx], DMA_DLLI, state->digest_bytes_len_dma_addr, - HASH_LEN_SIZE, NS_BIT); - set_flow_mode(&desc[idx], S_DIN_to_HASH); - set_setup_mode(&desc[idx], SETUP_LOAD_KEY0); - idx++; - - cc_set_desc(state, ctx, DIN_HASH, desc, false, &idx); + idx = cc_restore_hash(desc, ctx, state, idx); /* store the hash digest result in context */ hw_desc_init(&desc[idx]); @@ -616,84 +652,12 @@ static int cc_hash_finup(struct ahash_request *req) cc_req.user_cb = cc_hash_complete; cc_req.user_arg = req; - /* Restore hash digest */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - set_din_type(&desc[idx], DMA_DLLI, state->digest_buff_dma_addr, - ctx->inter_digestsize, NS_BIT); - set_flow_mode(&desc[idx], S_DIN_to_HASH); - set_setup_mode(&desc[idx], SETUP_LOAD_STATE0); - idx++; - - /* Restore hash current length */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - set_cipher_config1(&desc[idx], HASH_PADDING_ENABLED); - set_din_type(&desc[idx], DMA_DLLI, state->digest_bytes_len_dma_addr, - HASH_LEN_SIZE, NS_BIT); - set_flow_mode(&desc[idx], S_DIN_to_HASH); - set_setup_mode(&desc[idx], SETUP_LOAD_KEY0); - idx++; + idx = cc_restore_hash(desc, ctx, state, idx); - cc_set_desc(state, ctx, DIN_HASH, desc, false, &idx); + if (is_hmac) + idx = cc_fin_hmac(desc, req, idx); - if (is_hmac) { - /* Store the hash digest result in the context */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - set_dout_dlli(&desc[idx], state->digest_buff_dma_addr, - digestsize, NS_BIT, 0); - cc_set_endianity(ctx->hash_mode, &desc[idx]); - set_flow_mode(&desc[idx], S_HASH_to_DOUT); - set_setup_mode(&desc[idx], SETUP_WRITE_STATE0); - idx++; - - /* Loading hash OPAD xor key state */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - set_din_type(&desc[idx], DMA_DLLI, state->opad_digest_dma_addr, - ctx->inter_digestsize, NS_BIT); - set_flow_mode(&desc[idx], S_DIN_to_HASH); - set_setup_mode(&desc[idx], SETUP_LOAD_STATE0); - idx++; - - /* Load the hash current length */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - set_din_sram(&desc[idx], - cc_digest_len_addr(ctx->drvdata, ctx->hash_mode), - HASH_LEN_SIZE); - set_cipher_config1(&desc[idx], HASH_PADDING_ENABLED); - set_flow_mode(&desc[idx], S_DIN_to_HASH); - set_setup_mode(&desc[idx], SETUP_LOAD_KEY0); - idx++; - - /* Memory Barrier: wait for IPAD/OPAD axi write to complete */ - hw_desc_init(&desc[idx]); - set_din_no_dma(&desc[idx], 0, 0xfffff0); - set_dout_no_dma(&desc[idx], 0, 0, 1); - idx++; - - /* Perform HASH update on last digest */ - hw_desc_init(&desc[idx]); - set_din_type(&desc[idx], DMA_DLLI, state->digest_buff_dma_addr, - digestsize, NS_BIT); - set_flow_mode(&desc[idx], DIN_HASH); - idx++; - } - - /* Get final MAC result */ - hw_desc_init(&desc[idx]); - /* TODO */ - set_dout_dlli(&desc[idx], state->digest_result_dma_addr, digestsize, - NS_BIT, 1); - set_queue_last_ind(&desc[idx]); - set_flow_mode(&desc[idx], S_HASH_to_DOUT); - set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED); - set_setup_mode(&desc[idx], SETUP_WRITE_STATE0); - cc_set_endianity(ctx->hash_mode, &desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - idx++; + idx = cc_fin_result(desc, req, idx); rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); if (rc != -EINPROGRESS && rc != -EBUSY) { @@ -748,26 +712,7 @@ static int cc_hash_final(struct ahash_request *req) cc_req.user_cb = cc_hash_complete; cc_req.user_arg = req; - /* Restore hash digest */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - set_din_type(&desc[idx], DMA_DLLI, state->digest_buff_dma_addr, - ctx->inter_digestsize, NS_BIT); - set_flow_mode(&desc[idx], S_DIN_to_HASH); - set_setup_mode(&desc[idx], SETUP_LOAD_STATE0); - idx++; - - /* Restore hash current length */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED); - set_din_type(&desc[idx], DMA_DLLI, state->digest_bytes_len_dma_addr, - HASH_LEN_SIZE, NS_BIT); - set_flow_mode(&desc[idx], S_DIN_to_HASH); - set_setup_mode(&desc[idx], SETUP_LOAD_KEY0); - idx++; - - cc_set_desc(state, ctx, DIN_HASH, desc, false, &idx); + idx = cc_restore_hash(desc, ctx, state, idx); /* "DO-PAD" must be enabled only when writing current length to HW */ hw_desc_init(&desc[idx]); @@ -779,62 +724,10 @@ static int cc_hash_final(struct ahash_request *req) set_flow_mode(&desc[idx], S_HASH_to_DOUT); idx++; - if (is_hmac) { - /* Store the hash digest result in the context */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - set_dout_dlli(&desc[idx], state->digest_buff_dma_addr, - digestsize, NS_BIT, 0); - cc_set_endianity(ctx->hash_mode, &desc[idx]); - set_flow_mode(&desc[idx], S_HASH_to_DOUT); - set_setup_mode(&desc[idx], SETUP_WRITE_STATE0); - idx++; - - /* Loading hash OPAD xor key state */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - set_din_type(&desc[idx], DMA_DLLI, state->opad_digest_dma_addr, - ctx->inter_digestsize, NS_BIT); - set_flow_mode(&desc[idx], S_DIN_to_HASH); - set_setup_mode(&desc[idx], SETUP_LOAD_STATE0); - idx++; - - /* Load the hash current length */ - hw_desc_init(&desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - set_din_sram(&desc[idx], - cc_digest_len_addr(ctx->drvdata, ctx->hash_mode), - HASH_LEN_SIZE); - set_cipher_config1(&desc[idx], HASH_PADDING_ENABLED); - set_flow_mode(&desc[idx], S_DIN_to_HASH); - set_setup_mode(&desc[idx], SETUP_LOAD_KEY0); - idx++; - - /* Memory Barrier: wait for IPAD/OPAD axi write to complete */ - hw_desc_init(&desc[idx]); - set_din_no_dma(&desc[idx], 0, 0xfffff0); - set_dout_no_dma(&desc[idx], 0, 0, 1); - idx++; + if (is_hmac) + idx = cc_fin_hmac(desc, req, idx); - /* Perform HASH update on last digest */ - hw_desc_init(&desc[idx]); - set_din_type(&desc[idx], DMA_DLLI, state->digest_buff_dma_addr, - digestsize, NS_BIT); - set_flow_mode(&desc[idx], DIN_HASH); - idx++; - } - - /* Get final MAC result */ - hw_desc_init(&desc[idx]); - set_dout_dlli(&desc[idx], state->digest_result_dma_addr, digestsize, - NS_BIT, 1); - set_queue_last_ind(&desc[idx]); - set_flow_mode(&desc[idx], S_HASH_to_DOUT); - set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED); - set_setup_mode(&desc[idx], SETUP_WRITE_STATE0); - cc_set_endianity(ctx->hash_mode, &desc[idx]); - set_cipher_mode(&desc[idx], ctx->hw_mode); - idx++; + idx = cc_fin_result(desc, req, idx); rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base); if (rc != -EINPROGRESS && rc != -EBUSY) { From patchwork Wed Jan 3 13:35:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123320 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10184201qgn; Wed, 3 Jan 2018 05:40:28 -0800 (PST) X-Google-Smtp-Source: ACJfBotVBAyH12OVBX+Js/NCj2uqDF2H4te34ydOzoxd6sPtevKhn+rL2893H8CaZmcMQaU0y8CP X-Received: by 10.101.97.145 with SMTP id c17mr1316748pgv.105.1514986828833; Wed, 03 Jan 2018 05:40:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986828; cv=none; d=google.com; s=arc-20160816; b=QAu2SIVcv0/WYth9FvzZ8A9wRM6P2AEPE2EoR0IYLWvFqpSNt6YnruEqr+amFqFBM2 ufnc2353Lehlb1oND2EWBpXPTYM2+AYp7D1PwkpDgMsrE074n3piWq6eIG6AYcEdHANz GvVMFRFY5qsZTT/GB9N093MTEW6Bw/4nYC/5SptzMiId6ZYh6dACj8eG9vmHK8DDgAW8 bC48wcFA5JJ8ZPmxO/o0abIEkJmi99QYhzpZCZY2SHatC/AeUfDliomAYCUqJoFQHkho /6B7KjpDponl4OM6Hk1LJcA3SXmvxd9SxrsKbU1H5xJXyIMQQhir3ve5QIMKUxBcPIcs y6QA== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id d2si707306plh.536.2018.01.03.05.40.28; Wed, 03 Jan 2018 05:40:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752687AbeACNk1 (ORCPT + 28 others); Wed, 3 Jan 2018 08:40:27 -0500 Received: from foss.arm.com ([217.140.101.70]:50250 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751463AbeACNkY (ORCPT ); Wed, 3 Jan 2018 08:40:24 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 14EBC1529; Wed, 3 Jan 2018 05:40:24 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5789E3F24A; Wed, 3 Jan 2018 05:40:22 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , stable@vger.kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 23/27] stating: ccree: fix allocation of void sized buf Date: Wed, 3 Jan 2018 13:35:30 +0000 Message-Id: <1514986544-5888-24-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We were allocating buffers using sizeof(*struct->field) where field was type void. Fix it by having a local variable with the real type. Cc: stable@vger.kernel.org Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_ivgen.c | 9 ++++----- drivers/staging/ccree/ssi_sram_mgr.c | 9 ++++++--- 2 files changed, 10 insertions(+), 8 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/ssi_ivgen.c b/drivers/staging/ccree/ssi_ivgen.c index 94a0502..9d8d307 100644 --- a/drivers/staging/ccree/ssi_ivgen.c +++ b/drivers/staging/ccree/ssi_ivgen.c @@ -175,13 +175,10 @@ int cc_ivgen_init(struct cc_drvdata *drvdata) int rc; /* Allocate "this" context */ - drvdata->ivgen_handle = kzalloc(sizeof(*drvdata->ivgen_handle), - GFP_KERNEL); - if (!drvdata->ivgen_handle) + ivgen_ctx = kzalloc(sizeof(*ivgen_ctx), GFP_KERNEL); + if (!ivgen_ctx) return -ENOMEM; - ivgen_ctx = drvdata->ivgen_handle; - /* Allocate pool's header for initial enc. key/IV */ ivgen_ctx->pool_meta = dma_alloc_coherent(device, CC_IVPOOL_META_SIZE, &ivgen_ctx->pool_meta_dma, @@ -200,6 +197,8 @@ int cc_ivgen_init(struct cc_drvdata *drvdata) goto out; } + drvdata->ivgen_handle = ivgen_ctx; + return cc_init_iv_sram(drvdata); out: diff --git a/drivers/staging/ccree/ssi_sram_mgr.c b/drivers/staging/ccree/ssi_sram_mgr.c index e178385..3a93299 100644 --- a/drivers/staging/ccree/ssi_sram_mgr.c +++ b/drivers/staging/ccree/ssi_sram_mgr.c @@ -32,13 +32,16 @@ void cc_sram_mgr_fini(struct cc_drvdata *drvdata) */ int cc_sram_mgr_init(struct cc_drvdata *drvdata) { + struct cc_sram_ctx *ctx; + /* Allocate "this" context */ - drvdata->sram_mgr_handle = kzalloc(sizeof(*drvdata->sram_mgr_handle), - GFP_KERNEL); + ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); - if (!drvdata->sram_mgr_handle) + if (!ctx) return -ENOMEM; + drvdata->sram_mgr_handle = ctx; + return 0; } From patchwork Wed Jan 3 13:35:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123324 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10184883qgn; Wed, 3 Jan 2018 05:41:07 -0800 (PST) X-Google-Smtp-Source: ACJfBouV+DDW5lOhFrJpMp9ED2wIs05nfXUhIfSKVl/YHv+/veoWj4vIJXJV7ITYcoyoEi0WmiPl X-Received: by 10.84.142.1 with SMTP id 1mr1430990plw.254.1514986867292; Wed, 03 Jan 2018 05:41:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986867; cv=none; d=google.com; s=arc-20160816; b=jdr2wTWV/9tYooYKkyMV/a0h6GGLuxL4cHS0Gnh+V+qkqjhjnw9iAlsUGHfwJFXKR+ 4m2DMcM1d6+9oeP4F7O65doKeaMCoupxgQLvx7tfCOyDZs5/ZSo9Hg24ShlfbnybQ9wN lKVO1DZvS3d1k/P/C0W/A7mwO0m7zQsG+xFoJjDCGyhJjPCuMSsiTajXuTbVYgGDouNJ urWlhjzFw/OCUm9GHvLZyIgavIzYyeFXQOwer+htbp0OoUb6mMPg+og+qli3HxB+jPel PXuw8mPYVmm8/EFvjxTAmXDRjioeejVJSnPc4SsxiXEpaHgQvN/zjSuNaQhGRzxN4S/0 lbfw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=h3kryki5Fxkk1PZFNZjGkCtdILVLgjYs5jHLkchTruM=; b=0/9PojCJsscxtdN4aTEYZDsBFSLMpzLmvrTXRgjmQhK+B0w0WPJoL9c+lYpXhqC7Rq HYoZ2J3dKNQlfjryGwUbQz0mra18aZfMdJDD9zey0MsL4DwX/ZTGwibstKV7jV7RhQr4 ZGFCeCTZxeGcshtnAnhyZQIxGtnUN84te24J//fynQP8iAy7UjLaPWb7+3dRXx7/GUD8 Srv9sLVoejgUrsdxU0YGYxXr/2s1diheVigN0qe0hhhH4/9FdjSSBzZos+N9yyh990Ex 7tgV/bmNu4Z1WFWnC2/3y/Qc5OYduxjpcVu0AR/982vGb1HFw71NIzG7axTXTgjzDROI e3gw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z2si720695plk.106.2018.01.03.05.41.07; Wed, 03 Jan 2018 05:41:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752665AbeACNlD (ORCPT + 28 others); Wed, 3 Jan 2018 08:41:03 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:50282 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751707AbeACNky (ORCPT ); Wed, 3 Jan 2018 08:40:54 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 576C21529; Wed, 3 Jan 2018 05:40:52 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C718E3F24A; Wed, 3 Jan 2018 05:40:50 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 25/27] staging: ccree: remove unneeded includes Date: Wed, 3 Jan 2018 13:35:32 +0000 Message-Id: <1514986544-5888-26-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove include files not needed for compilation. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/cc_aead.c | 7 ------- drivers/staging/ccree/cc_buffer_mgr.c | 6 ------ drivers/staging/ccree/cc_cipher.c | 4 ---- drivers/staging/ccree/cc_driver.c | 31 ------------------------------- drivers/staging/ccree/cc_hash.c | 2 -- drivers/staging/ccree/cc_ivgen.c | 1 - drivers/staging/ccree/cc_pm.c | 2 -- drivers/staging/ccree/cc_request_mgr.c | 5 ----- 8 files changed, 58 deletions(-) -- 2.7.4 diff --git a/drivers/staging/ccree/cc_aead.c b/drivers/staging/ccree/cc_aead.c index 0560cc9..494f973 100644 --- a/drivers/staging/ccree/cc_aead.c +++ b/drivers/staging/ccree/cc_aead.c @@ -3,18 +3,11 @@ #include #include -#include #include -#include -#include #include -#include -#include #include -#include #include #include -#include #include "cc_driver.h" #include "cc_buffer_mgr.h" #include "cc_aead.h" diff --git a/drivers/staging/ccree/cc_buffer_mgr.c b/drivers/staging/ccree/cc_buffer_mgr.c index 13275eb..85408ca 100644 --- a/drivers/staging/ccree/cc_buffer_mgr.c +++ b/drivers/staging/ccree/cc_buffer_mgr.c @@ -1,17 +1,11 @@ // SPDX-License-Identifier: GPL-2.0-only /* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ -#include -#include -#include #include -#include #include #include #include #include -#include -#include #include "cc_buffer_mgr.h" #include "cc_lli_defs.h" diff --git a/drivers/staging/ccree/cc_cipher.c b/drivers/staging/ccree/cc_cipher.c index 37635aa..a768710 100644 --- a/drivers/staging/ccree/cc_cipher.c +++ b/drivers/staging/ccree/cc_cipher.c @@ -3,12 +3,8 @@ #include #include -#include -#include #include #include -#include -#include #include #include #include diff --git a/drivers/staging/ccree/cc_driver.c b/drivers/staging/ccree/cc_driver.c index ddf0cb8..0197aa2 100644 --- a/drivers/staging/ccree/cc_driver.c +++ b/drivers/staging/ccree/cc_driver.c @@ -5,43 +5,12 @@ #include #include -#include -#include -#include -#include -#include -#include -#include - -#include #include #include -#include -#include #include -#include -#include -#include -#include -#include -#include -#include #include -#include -#include -#include -#include -#include #include #include -#include - -/* cache.h required for L1_CACHE_ALIGN() and cache_line_size() */ -#include -#include -#include -#include -#include #include #include #include diff --git a/drivers/staging/ccree/cc_hash.c b/drivers/staging/ccree/cc_hash.c index c47084b..de49314 100644 --- a/drivers/staging/ccree/cc_hash.c +++ b/drivers/staging/ccree/cc_hash.c @@ -3,10 +3,8 @@ #include #include -#include #include #include -#include #include #include diff --git a/drivers/staging/ccree/cc_ivgen.c b/drivers/staging/ccree/cc_ivgen.c index 892cd78..5defe1f 100644 --- a/drivers/staging/ccree/cc_ivgen.c +++ b/drivers/staging/ccree/cc_ivgen.c @@ -1,7 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ -#include #include #include "cc_driver.h" #include "cc_ivgen.h" diff --git a/drivers/staging/ccree/cc_pm.c b/drivers/staging/ccree/cc_pm.c index 8a28cfd..273216d 100644 --- a/drivers/staging/ccree/cc_pm.c +++ b/drivers/staging/ccree/cc_pm.c @@ -2,9 +2,7 @@ /* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #include -#include #include -#include #include #include "cc_driver.h" #include "cc_buffer_mgr.h" diff --git a/drivers/staging/ccree/cc_request_mgr.c b/drivers/staging/ccree/cc_request_mgr.c index eacf944..fe62dd8 100644 --- a/drivers/staging/ccree/cc_request_mgr.c +++ b/drivers/staging/ccree/cc_request_mgr.c @@ -2,11 +2,6 @@ /* Copyright (C) 2012-2018 ARM Limited or its affiliates. */ #include -#include -#include -#include -#include -#include #include "cc_driver.h" #include "cc_buffer_mgr.h" #include "cc_request_mgr.h" From patchwork Wed Jan 3 13:35:33 2018 Content-Type: text/plain; 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[209.132.180.67]) by mx.google.com with ESMTP id g9si725616plk.170.2018.01.03.05.41.11; Wed, 03 Jan 2018 05:41:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752788AbeACNlH (ORCPT + 28 others); Wed, 3 Jan 2018 08:41:07 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:50298 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752657AbeACNlD (ORCPT ); Wed, 3 Jan 2018 08:41:03 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2CA701529; Wed, 3 Jan 2018 05:41:03 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A33253F24A; Wed, 3 Jan 2018 05:41:01 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 26/27] staging: ccree: update TODO Date: Wed, 3 Jan 2018 13:35:33 +0000 Message-Id: <1514986544-5888-27-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Update TODO to reflect work done Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/TODO | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/staging/ccree/TODO b/drivers/staging/ccree/TODO index 6d8702b..b8e163d 100644 --- a/drivers/staging/ccree/TODO +++ b/drivers/staging/ccree/TODO @@ -6,5 +6,5 @@ * * ************************************************************************* -1. Handle HW FIFO fullness more cleanly. +1. ??? From patchwork Wed Jan 3 13:35:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 123326 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10185138qgn; Wed, 3 Jan 2018 05:41:22 -0800 (PST) X-Google-Smtp-Source: ACJfBouzPqO3N1TmRM7FEJ3mQxaDMkkSJPI0HvcTkDw3vq+sHWVePBSO+FoS9cxDASpo68ZdEz2a X-Received: by 10.98.15.212 with SMTP id 81mr1506344pfp.106.1514986882044; Wed, 03 Jan 2018 05:41:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514986882; cv=none; d=google.com; s=arc-20160816; b=ZhOoIL8o8K9V3VIDM72ITe0gQYW2UJWfUl1XiX44OZf/di1Vjfc2aoq4Vlj3qKZT2+ 5gNa79xHVO2nASxVYrmMIiijanJuWs5VGaWCdXeSV9t98VUlPQUBqVxRn5+9LcUVaHO7 6bmPrQuezUp1Lwl4TqAOaRl5xL0d1wFmX90zi/AAztObSTLQLVAjGENFm2RGbisEwT7A gTRnOswyIQAJpvklm5jnAwmATtxn9yQxDVYJyHKtOKceMkzw+Xr66WPADksUtCk9QTsv 7KjkVR6IvJjcNsd/iOlBKYNPjPF+j9SuWtZkHe6fJaP75aXObNqhLuuc0mmiewS9FrWL mSCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=EFaaW0EZGe3P0Rz9paOEJ/0Q9PSmrTgck2/oAJo43ro=; b=fNVArxTyeLycf6kpqh4e0riFKiQAg6bd10d2PQJ+u1MYrFJxC6Mr0dz+dDaxeDXw89 0ps8h4ysBfN+W6pDwNOUDb0si2mMQ60m50yJPuFBFXX/BQqejS5cXIb8XVlb8CSM/fV6 5HaM+vAeko0tLJldqhvrOzwIAkXG/8qHpseHBMpeY6paAIAcRhCQOgzameEE0HG8hSPm +BQjNrHq8PXuUgUoUBzJzgyw1sZgBJo2f/1LZqslcSnjmchPThs7Vcg/Ze9IOQJRtX6r jwspjJUfSytAQbPR1XaHmQO9Wpkoy4dodE0WTX3WxLD+uZkduSEn8UGp1jQ8zlfHF1lj Ru+A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j16si642810pga.622.2018.01.03.05.41.21; Wed, 03 Jan 2018 05:41:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752642AbeACNlR (ORCPT + 28 others); Wed, 3 Jan 2018 08:41:17 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:50310 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751735AbeACNlO (ORCPT ); Wed, 3 Jan 2018 08:41:14 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4B83C1529; Wed, 3 Jan 2018 05:41:14 -0800 (PST) Received: from sugar.kfn.arm.com (unknown [10.45.48.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BCDEF3F24A; Wed, 3 Jan 2018 05:41:12 -0800 (PST) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v2 27/27] staging: ccree: add missing include Date: Wed, 3 Jan 2018 13:35:34 +0000 Message-Id: <1514986544-5888-28-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514986544-5888-1-git-send-email-gilad@benyossef.com> References: <1514986544-5888-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the missing include of include file with function declarations. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/cc_debugfs.c | 1 + 1 file changed, 1 insertion(+) -- 2.7.4 diff --git a/drivers/staging/ccree/cc_debugfs.c b/drivers/staging/ccree/cc_debugfs.c index 363a0ef..e07cbb1 100644 --- a/drivers/staging/ccree/cc_debugfs.c +++ b/drivers/staging/ccree/cc_debugfs.c @@ -6,6 +6,7 @@ #include #include "cc_driver.h" #include "cc_crypto_ctx.h" +#include "cc_debugfs.h" struct cc_debugfs_ctx { struct dentry *dir;