From patchwork Fri Mar 17 15:02:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 95431 Delivered-To: patch@linaro.org Received: by 10.140.89.134 with SMTP id v6csp349538qgd; Fri, 17 Mar 2017 08:11:25 -0700 (PDT) X-Received: by 10.99.142.67 with SMTP id k64mr10546982pge.31.1489763485138; Fri, 17 Mar 2017 08:11:25 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u126si6337051pfu.306.2017.03.17.08.11.24; Fri, 17 Mar 2017 08:11:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751100AbdCQPLY (ORCPT + 7 others); Fri, 17 Mar 2017 11:11:24 -0400 Received: from mail-pg0-f44.google.com ([74.125.83.44]:32828 "EHLO mail-pg0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751065AbdCQPLY (ORCPT ); Fri, 17 Mar 2017 11:11:24 -0400 Received: by mail-pg0-f44.google.com with SMTP id n190so43245897pga.0 for ; Fri, 17 Mar 2017 08:11:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references; bh=nglOBlz7W4/TmQLwDdWEou+rI7p/vSj3Pq/bxWPR4LM=; b=dkYrqiWiNOqH4knMm6z0xULUyGfIAeeA9O79ajZnPCADaCOYzG6rOObMZfSTFzGE9w DtE4Oa9RiDM5oCr6WnGJb2lqkZ/tcvQspmeShmwB+CZDNIVq0CDmcD1myKMVhjNgIvmR jFM4qkcuVogKvf9d/MKxEyz8D82EmySr27AwE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=nglOBlz7W4/TmQLwDdWEou+rI7p/vSj3Pq/bxWPR4LM=; b=G5VfRdGqr1un07tVtBaP8vRPMCmsLnOSJB0GLid7kKrnRcJ/kz0IQ+gaiO+2xR6XEa YH1P7Gu1/zq+m+QEFj6GAkvugMZUMeNUdv6mX43sro/BKKIv3kGrhTQH12FTgnAt42c6 XUWOuWUtpYiHSwzHxYsC/GJwewQDLjmyef67rZvINjb44fGnnIopafNR5HaP6+ustIo1 QYwTP6j+rWRKmel7aWXdWlcRtOAKPDLjnMBU3muYdjFRQ+Cy/oslo0zT6XtwYRXH1Tf7 EeSV3KxbnEOi3QrCZ+yqdESXAPBAAjnvtneSLqyyI+iyAluExg6jCRFJjpnRnM/IaiPu XEXQ== X-Gm-Message-State: AFeK/H1yjFBs2oHLwXzzlQdbuFPKl+pu8KEzVBqCERQofINQjeVR8zGAiQA2PW8uFUNszcfe X-Received: by 10.99.113.82 with SMTP id b18mr16438164pgn.180.1489763080093; Fri, 17 Mar 2017 08:04:40 -0700 (PDT) Received: from localhost.localdomain ([103.230.219.215]) by smtp.gmail.com with ESMTPSA id f125sm17482582pfc.4.2017.03.17.08.04.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 17 Mar 2017 08:04:38 -0700 (PDT) From: Leo Yan To: Rob Herring , Mark Rutland , Wei Xu , Catalin Marinas , Will Deacon , Andy Gross , David Brown , Michael Turquette , Stephen Boyd , Mathieu Poirier , Leo Yan , Guodong Xu , John Stultz , Greg Kroah-Hartman , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, mike.leach@linaro.org, Suzuki.Poulose@arm.com, sudeep.holla@arm.com Subject: [PATCH v4 5/7] clk: hi6220: add debug APB clock Date: Fri, 17 Mar 2017 23:02:21 +0800 Message-Id: <1489762943-25849-6-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1489762943-25849-1-git-send-email-leo.yan@linaro.org> References: <1489762943-25849-1-git-send-email-leo.yan@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The debug APB clock is absent in hi6220 driver, so this patch is to add support for it. Signed-off-by: Leo Yan --- drivers/clk/hisilicon/clk-hi6220.c | 1 + include/dt-bindings/clock/hi6220-clock.h | 5 ++++- 2 files changed, 5 insertions(+), 1 deletion(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clk/hisilicon/clk-hi6220.c b/drivers/clk/hisilicon/clk-hi6220.c index c0e8e1f..2ae151c 100644 --- a/drivers/clk/hisilicon/clk-hi6220.c +++ b/drivers/clk/hisilicon/clk-hi6220.c @@ -134,6 +134,7 @@ static struct hisi_gate_clock hi6220_separated_gate_clks_sys[] __initdata = { { HI6220_UART4_PCLK, "uart4_pclk", "uart4_src", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x230, 8, 0, }, { HI6220_SPI_CLK, "spi_clk", "clk_150m", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x230, 9, 0, }, { HI6220_TSENSOR_CLK, "tsensor_clk", "clk_bus", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x230, 12, 0, }, + { HI6220_DAPB_CLK, "dapb_clk", "cs_dapb", CLK_SET_RATE_PARENT|CLK_IS_CRITICAL, 0x230, 18, 0, }, { HI6220_MMU_CLK, "mmu_clk", "ddrc_axi1", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x240, 11, 0, }, { HI6220_HIFI_SEL, "hifi_sel", "hifi_src", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x270, 0, 0, }, { HI6220_MMC0_SYSPLL, "mmc0_syspll", "syspll", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x270, 1, 0, }, diff --git a/include/dt-bindings/clock/hi6220-clock.h b/include/dt-bindings/clock/hi6220-clock.h index 6b03c84..b8ba665 100644 --- a/include/dt-bindings/clock/hi6220-clock.h +++ b/include/dt-bindings/clock/hi6220-clock.h @@ -124,7 +124,10 @@ #define HI6220_CS_DAPB 57 #define HI6220_CS_ATB_DIV 58 -#define HI6220_SYS_NR_CLKS 59 +/* gate clock */ +#define HI6220_DAPB_CLK 59 + +#define HI6220_SYS_NR_CLKS 60 /* clk in Hi6220 media controller */ /* gate clocks */ From patchwork Fri Mar 17 15:02:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 95432 Delivered-To: patch@linaro.org Received: by 10.140.89.134 with SMTP id v6csp350509qgd; Fri, 17 Mar 2017 08:13:34 -0700 (PDT) X-Received: by 10.99.157.143 with SMTP id i137mr16596228pgd.132.1489763614228; Fri, 17 Mar 2017 08:13:34 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l70si8477681pge.75.2017.03.17.08.13.33; Fri, 17 Mar 2017 08:13:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751231AbdCQPNb (ORCPT + 7 others); Fri, 17 Mar 2017 11:13:31 -0400 Received: from mail-pg0-f46.google.com ([74.125.83.46]:35170 "EHLO mail-pg0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751110AbdCQPNa (ORCPT ); Fri, 17 Mar 2017 11:13:30 -0400 Received: by mail-pg0-f46.google.com with SMTP id b129so43170397pgc.2 for ; Fri, 17 Mar 2017 08:12:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references; bh=Tbswh5cFBfrAzQTlCt870+M3haV74uJPnmvSQMqsJQI=; b=cCuz+FqTsTHPXRbfuP0XPF1Mdv100bEUlt1j9TNYX0zlbs7nlLF2IY30e48RgL2Rgt U98EjelQKfq+OM+628NRjeq8QwzsX5X/TLW53RBK1AXN5YQ7zsm75g5qmmZUIGPoNo5x pGmxceP4XxpzK3q5bkZFPJ9WadE566SMKAjLU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=Tbswh5cFBfrAzQTlCt870+M3haV74uJPnmvSQMqsJQI=; b=KuiwySTVciwUd/bkNray5M1gmSz+8cZgs+wM+Y6iqZBTCzAPRQmrsUHGVSP4uH1GGO RVPtslVT2sIbdboomroDqNgxa/NXXw9ydbrOyY9NaDGihuN97dt/0GdOpUbbIzcZ2f6B aqu5RDrSqc/ZZPkQc7nhtJo7dBv4M34hHhMG+IVjlX+kouQlrfmAxqErrW5Af+DgDOiB kNpJ0PngwusNNcB1ZWPR9bKhK/Erh5gYgcgeAj4YvnPF6qAPjrqgvhSzWI/zyJ1CYxlY EC1M1CQyCA6y4oSLjPGX4V/FeYJyi8esJeF9UGOZWfZfclRW2n/mSU/CpaXCAxTVe0rQ +ZLA== X-Gm-Message-State: AFeK/H3Oustz2rAkANWpLxG8A2/720wMrjtO42CdtqNbOP1zwovjnaObBBADSWZvx6GFz5U9 X-Received: by 10.98.89.70 with SMTP id n67mr17071866pfb.224.1489763092612; Fri, 17 Mar 2017 08:04:52 -0700 (PDT) Received: from localhost.localdomain ([103.230.219.215]) by smtp.gmail.com with ESMTPSA id f125sm17482582pfc.4.2017.03.17.08.04.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 17 Mar 2017 08:04:51 -0700 (PDT) From: Leo Yan To: Rob Herring , Mark Rutland , Wei Xu , Catalin Marinas , Will Deacon , Andy Gross , David Brown , Michael Turquette , Stephen Boyd , Mathieu Poirier , Leo Yan , Guodong Xu , John Stultz , Greg Kroah-Hartman , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, mike.leach@linaro.org, Suzuki.Poulose@arm.com, sudeep.holla@arm.com Subject: [PATCH v4 6/7] arm64: dts: hi6220: register debug module Date: Fri, 17 Mar 2017 23:02:22 +0800 Message-Id: <1489762943-25849-7-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1489762943-25849-1-git-send-email-leo.yan@linaro.org> References: <1489762943-25849-1-git-send-email-leo.yan@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Bind debug module driver for Hi6220. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 64 +++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 470461d..467aa15 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -913,5 +913,69 @@ }; }; }; + + debug@f6590000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf6590000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu0>; + }; + + debug@f6592000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf6592000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu1>; + }; + + debug@f6594000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf6594000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu2>; + }; + + debug@f6596000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf6596000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu3>; + }; + + debug@f65d0000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf65d0000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu4>; + }; + + debug@f65d2000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf65d2000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu5>; + }; + + debug@f65d4000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf65d4000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu6>; + }; + + debug@f65d6000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf65d6000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu7>; + }; }; };