From patchwork Fri Jan 5 17:09:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 123555 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp1059918qgn; Fri, 5 Jan 2018 09:11:59 -0800 (PST) X-Google-Smtp-Source: ACJfBouT8BT4V0IA9X0EN8pbVrjKDcTT+I3yQ3W5rzoFAOETVH7Cnq6ZzK7liBdiwL6SVBdHn/C7 X-Received: by 10.159.204.129 with SMTP id t1mr3675729plo.2.1515172319835; Fri, 05 Jan 2018 09:11:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515172319; cv=none; d=google.com; s=arc-20160816; b=aqZXmY/l+uLRZ2CBfRoI/rfuptQ8AXqcD8spRYAZtYsqhDdD0ABfRuwLalHQ6GLNqB 1F31CClsMb7sKg1SQ+GBpvaZye2ox5UMXMAxEOQIIQyJSVbGC9vYQA4P0qMoQLETOn35 wVpeOY5zgyhCbLq1T+xdlBxQ43h2bvBG+4M9ycc+m0UjOl7YrbFf2Vpw3xy2H1P3dKls E1fNJ0SwW+PAqKSCLWCuSVYzcOvJwvoYZpc0vzamnugjTZuEIH7pmawxAMml35wK1Z22 Haqhw6G3ClomzAZ9eY0U0hyD9XZ2VJjEr2JgoN3UMucfGHuOVj9MqXI4idGvDSaGi7pw WzdQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=3N8JT1SwGn68wR6NmiyAwGdx6SRhLnG6jQh9AJydHGg=; b=pXQWAimAlJJreoVXX4QoooPEklUQuciBjVaf8d+bk1CWjP8dAOOpzaQzUd4mH2SJZy Iv0iVUHDA6r2dnb+obbIolvjipqStPmHauy15kkz6a5ECxXOYGxiUESfX2RKQvehwk+g XHAC6iLDM0sNPJKf3NRONOonOM4lpNCxI9bdh2DOT13f2Mw7mmSaLnQm3HddaXC81WoA Z9ukgqtcTeWroIILHpg286FP5NfCn2YmSFzSeMqIC3nK6B6EIDHXonlZvKyJdxahi3+1 +s+aPw145kPBEYZdbL6Pt+BV69KFvv63WZZ2xpy9UnltORRcJtCWOxBGcrMEuoMEyK/P CvCA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=TtN2eKPz; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Fri, 05 Jan 2018 09:10:04 -0800 (PST) Received: from boomer.baylibre.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id g17sm3263661wra.6.2018.01.05.09.10.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 05 Jan 2018 09:10:03 -0800 (PST) From: Jerome Brunet To: Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org Cc: Jerome Brunet , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Vladimir Zapolskiy , Sylvain Lemieux , Andy Gross , David Brown Subject: [PATCH 1/5] clk: divider: read-only divider can propagate rate change Date: Fri, 5 Jan 2018 18:09:55 +0100 Message-Id: <20180105170959.17266-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180105170959.17266-1-jbrunet@baylibre.com> References: <20180105170959.17266-1-jbrunet@baylibre.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org When a divider clock has CLK_DIVIDER_READ_ONLY set, it means that the register shall be left un-touched, but it does not mean the clock should stop rate propagation if CLK_SET_RATE_PARENT is set This is properly handled in qcom clk-regmap-divider but it was not in the generic divider Fixes: e6d5e7d90be9 ("clk-divider: Fix READ_ONLY when divider > 1") Signed-off-by: Jerome Brunet --- drivers/clk/clk-divider.c | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.14.3 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Tested-by: David Lechner diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index b49942b9fe50..a851d3e04c7f 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -348,6 +348,7 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) { struct clk_divider *divider = to_clk_divider(hw); + struct clk_hw *hw_parent = clk_hw_get_parent(hw); int bestdiv; /* if read only, just return current value */ @@ -356,6 +357,15 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, bestdiv &= div_mask(divider->width); bestdiv = _get_div(divider->table, bestdiv, divider->flags, divider->width); + + /* Even a read-only clock can propagate a rate change */ + if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) { + if (!hw_parent) + return -EINVAL; + + *prate = clk_hw_round_rate(hw_parent, rate * bestdiv); + } + return DIV_ROUND_UP_ULL((u64)*prate, bestdiv); } From patchwork Fri Jan 5 17:09:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 123551 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp1057922qgn; Fri, 5 Jan 2018 09:10:11 -0800 (PST) X-Google-Smtp-Source: ACJfBotiOrB8CF/Kq4SsFGKENoUHc05NAv7NdpkDVGVa30IBSitv4Gsl+VeFN7arJx8SQfiIBD3I X-Received: by 10.98.12.131 with SMTP id 3mr3625547pfm.189.1515172211699; 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Fri, 05 Jan 2018 09:10:05 -0800 (PST) Received: from boomer.baylibre.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id g17sm3263661wra.6.2018.01.05.09.10.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 05 Jan 2018 09:10:04 -0800 (PST) From: Jerome Brunet To: Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org Cc: Jerome Brunet , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Vladimir Zapolskiy , Sylvain Lemieux , Andy Gross , David Brown Subject: [PATCH 2/5] clk: lpc32xx: read-only divider can propagate rate change Date: Fri, 5 Jan 2018 18:09:56 +0100 Message-Id: <20180105170959.17266-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180105170959.17266-1-jbrunet@baylibre.com> References: <20180105170959.17266-1-jbrunet@baylibre.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org When a divider clock has CLK_DIVIDER_READ_ONLY set, it means that the register shall be left un-touched, but it does not mean the clock should stop rate propagation if CLK_SET_RATE_PARENT is set This properly handled in qcom clk-regmap-divider but it was not in the lpc32xx divider Fixes: f7c82a60ba26 ("clk: lpc32xx: add common clock framework driver") Signed-off-by: Jerome Brunet --- drivers/clk/nxp/clk-lpc32xx.c | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.14.3 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clk/nxp/clk-lpc32xx.c b/drivers/clk/nxp/clk-lpc32xx.c index f5d815f577e0..729333766f97 100644 --- a/drivers/clk/nxp/clk-lpc32xx.c +++ b/drivers/clk/nxp/clk-lpc32xx.c @@ -963,6 +963,7 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) { struct lpc32xx_clk_div *divider = to_lpc32xx_div(hw); + struct clk_hw *hw_parent = clk_hw_get_parent(hw); unsigned int bestdiv; /* if read only, just return current value */ @@ -972,6 +973,15 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, bestdiv &= div_mask(divider->width); bestdiv = _get_div(divider->table, bestdiv, divider->flags, divider->width); + + /* Even a read-only clock can propagate a rate change */ + if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) { + if (!hw_parent) + return -EINVAL; + + *prate = clk_hw_round_rate(hw_parent, rate * bestdiv); + } + return DIV_ROUND_UP(*prate, bestdiv); } From patchwork Fri Jan 5 17:09:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 123553 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp1058256qgn; Fri, 5 Jan 2018 09:10:29 -0800 (PST) X-Google-Smtp-Source: ACJfBosBWWALUC0HuCxg1GWwLNAQNqFeu+JJRzrj9ktNao3SbXIS5BE6m6eoCYfn0w3HHrm5kqmc X-Received: by 10.159.214.136 with SMTP id n8mr3707144plp.177.1515172229325; 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We can factor this code so let's provide an helper function for this Signed-off-by: Jerome Brunet --- drivers/clk/clk-divider.c | 43 ++++++++++++++++++++++++++++--------------- include/linux/clk-provider.h | 15 +++++++++++++++ 2 files changed, 43 insertions(+), 15 deletions(-) -- 2.14.3 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index a851d3e04c7f..3eb2b27f3513 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -344,29 +344,42 @@ long divider_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, } EXPORT_SYMBOL_GPL(divider_round_rate_parent); +long divider_ro_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, + unsigned long rate, unsigned long *prate, + const struct clk_div_table *table, u8 width, + unsigned long flags, unsigned int val) +{ + int div; + + div = _get_div(table, val, flags, width); + + /* Even a read-only clock can propagate a rate change */ + if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) { + if (!parent) + return -EINVAL; + + *prate = clk_hw_round_rate(parent, rate * div); + } + + return DIV_ROUND_UP_ULL((u64)*prate, div); +} +EXPORT_SYMBOL_GPL(divider_ro_round_rate_parent); + + static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) { struct clk_divider *divider = to_clk_divider(hw); - struct clk_hw *hw_parent = clk_hw_get_parent(hw); - int bestdiv; + u32 val; /* if read only, just return current value */ if (divider->flags & CLK_DIVIDER_READ_ONLY) { - bestdiv = clk_readl(divider->reg) >> divider->shift; - bestdiv &= div_mask(divider->width); - bestdiv = _get_div(divider->table, bestdiv, divider->flags, - divider->width); - - /* Even a read-only clock can propagate a rate change */ - if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) { - if (!hw_parent) - return -EINVAL; - - *prate = clk_hw_round_rate(hw_parent, rate * bestdiv); - } + val = clk_readl(divider->reg) >> divider->shift; + val &= div_mask(divider->width); - return DIV_ROUND_UP_ULL((u64)*prate, bestdiv); + return divider_ro_round_rate(hw, rate, prate, divider->table, + divider->width, divider->flags, + val); } return divider_round_rate(hw, rate, prate, divider->table, diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 175a62a15619..eb2c3a035e98 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -417,6 +417,10 @@ long divider_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, unsigned long rate, unsigned long *prate, const struct clk_div_table *table, u8 width, unsigned long flags); +long divider_ro_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, + unsigned long rate, unsigned long *prate, + const struct clk_div_table *table, u8 width, + unsigned long flags, unsigned int val); int divider_get_val(unsigned long rate, unsigned long parent_rate, const struct clk_div_table *table, u8 width, unsigned long flags); @@ -772,6 +776,17 @@ static inline long divider_round_rate(struct clk_hw *hw, unsigned long rate, rate, prate, table, width, flags); } +static inline long divider_ro_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *prate, + const struct clk_div_table *table, + u8 width, unsigned long flags, + unsigned int val) +{ + return divider_ro_round_rate_parent(hw, clk_hw_get_parent(hw), + rate, prate, table, width, flags, + val); +} + /* * FIXME clock api without lock protection */ From patchwork Fri Jan 5 17:09:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 123552 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp1058243qgn; Fri, 5 Jan 2018 09:10:28 -0800 (PST) X-Google-Smtp-Source: ACJfBoslWCXewYwjkLh8yF1sDmC4zWGAsDBy0Nzmp1R1+0vQq+4unW2DvAVOYtDR1XHM6hOnJZlm X-Received: by 10.84.131.162 with SMTP id d31mr3731575pld.193.1515172228482; Fri, 05 Jan 2018 09:10:28 -0800 (PST) ARC-Seal: i=1; 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Let's use it Signed-off-by: Jerome Brunet --- drivers/clk/qcom/clk-regmap-divider.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) -- 2.14.3 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clk/qcom/clk-regmap-divider.c b/drivers/clk/qcom/clk-regmap-divider.c index 4e9b8c2c8980..114e36b97255 100644 --- a/drivers/clk/qcom/clk-regmap-divider.c +++ b/drivers/clk/qcom/clk-regmap-divider.c @@ -28,22 +28,15 @@ static long div_round_ro_rate(struct clk_hw *hw, unsigned long rate, { struct clk_regmap_div *divider = to_clk_regmap_div(hw); struct clk_regmap *clkr = ÷r->clkr; - u32 div; + u32 val; struct clk_hw *hw_parent = clk_hw_get_parent(hw); - regmap_read(clkr->regmap, divider->reg, &div); - div >>= divider->shift; - div &= BIT(divider->width) - 1; - div += 1; - - if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) { - if (!hw_parent) - return -EINVAL; - - *prate = clk_hw_round_rate(hw_parent, rate * div); - } + regmap_read(clkr->regmap, divider->reg, &val); + val >>= divider->shift; + val &= BIT(divider->width) - 1; - return DIV_ROUND_UP_ULL((u64)*prate, div); + return divider_ro_round_rate(hw, rate, prate, NULL, divider->width, + CLK_DIVIDER_ROUND_CLOSEST, val); } static long div_round_rate(struct clk_hw *hw, unsigned long rate,