From patchwork Sat Jan 6 13:59:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 123625 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp596801qgn; Sat, 6 Jan 2018 06:01:31 -0800 (PST) X-Google-Smtp-Source: ACJfBos8K7hPtDX90RBnkeAePQcD95T7y3L9PhOsK6iTzDKA25WSaRw6gYDaQZ/g0pnycdkesCKR X-Received: by 10.80.169.48 with SMTP id l45mr8816200edc.128.1515247291746; Sat, 06 Jan 2018 06:01:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515247291; cv=none; d=google.com; s=arc-20160816; b=usJy+5Q/RaLzjfTIPBSVDRz3XbHLAmdsqMVRyPoNKiU26U9vj4Hpdtjt7NwiYftxLF nrLIiI/9Kp29uRwmAbP8X0Kf642LVY81PWNsanEPCD1YO9URU7Q9rPMgrQvymPh1WM2E 1AXZo2domMeNSJl01OyZF5TT9MNaq9KiiY2tfK++Hc1K1RYHXOhKaeDlV0+aSKjbXgJI +3t3QJlIR4peNzaymI8aiuArbxGH5lJ05dNrHV6BXhZ90Ht38jEz2QVgKUaM9SqZpXkS QPaoHZ85zrY4z/Y1denphG8Ed9QNG6GHoHTxuhryDAp64iu6pXbKgEvTrikOtCJeVCLl TB2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:dkim-filter:arc-authentication-results; bh=zRY/v7BA6MbDlgJCbd3fHINxSpqcI5yUJSqnVqqrPGY=; b=uTd+n+p1MPSaWaVvpmOaN4NdYFuBUtb9Kx/35Mkg5SHUKE8ewh3m2IqSl5yTBOqq7L OZjfCSimOLqyFVXPPCYEVxIuoRiE9jA9XOmeUUUwksQirMCnQv6i0VaqXLnG82uxk7v+ /jZcngZ8jBsM6jgXNLV1owbbvgkqABO+OZjJdnQrlscs/DEvH23s7Pqqp5XR2ZRyxf4E CC06HJ98FtP5DBg3JVqwIb0in8SFV+B3jPF30tsToiuDP1i4e5Svip3Bgkb6dqawleMF YKQ/yjdc2iXg1c93bgl3NPwtq28dIpuEHnQNmt5gG0t+6St8jeGGkL36VAu5AD3Dcjxw vK9A== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=WpfRZMyF; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id 93si2820006edl.231.2018.01.06.06.01.31; Sat, 06 Jan 2018 06:01:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=WpfRZMyF; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 289E8C21EBD; Sat, 6 Jan 2018 14:00:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 6769EC21ED6; Sat, 6 Jan 2018 14:00:03 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 63139C21E2F; Sat, 6 Jan 2018 14:00:00 +0000 (UTC) Received: from conuserg-12.nifty.com (conuserg-12.nifty.com [210.131.2.79]) by lists.denx.de (Postfix) with ESMTPS id 6B467C21E48 for ; Sat, 6 Jan 2018 13:59:59 +0000 (UTC) Received: from grover.sesame (FL1-125-199-20-195.osk.mesh.ad.jp [125.199.20.195]) (authenticated) by conuserg-12.nifty.com with ESMTP id w06DxX3P028034; Sat, 6 Jan 2018 22:59:34 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com w06DxX3P028034 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1515247174; bh=J3jpy0tAiUmCqO8+zcE0xg2GCGcymlaSFSdCOGK/Sgk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WpfRZMyFJ6vhW2SztY9/IeZ2rvr/tPaPrxuCgjTCHr5UygjZpUPCgg419sdd/buKC nocQoTmYcRUFMKGGQqp3CuHUONMrpbZLn35d2EsseXf92xG5EfrhWOHOrtKnmeO1OT Htk2gPdEbGq7HjyMjupJRFLK6efkjkOlBWoHQIrdT0viAbgEOK9CEwzRUL6bgCv37f D5BT2/wooogp7akeoPVuVfm7R0qoNxj3guZKoE78fYEQ7nWcy5V7vfHZHT+worTVnz bZfxSalnX1wx9mpkDtI10jmjbrykCr/opiHI61G+K6DUYyNsccz6ypPCRuh43IqEZS gjEpUkmbHgYVA== X-Nifty-SrcIP: [125.199.20.195] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 6 Jan 2018 22:59:24 +0900 Message-Id: <1515247166-20516-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515247166-20516-1-git-send-email-yamada.masahiro@socionext.com> References: <1515247166-20516-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 1/3] ARM: uniphier: do not use RAM that exceeds 32 bit address range X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" LD20 / PXs3 boards are equipped with a large amount of memory beyond the 32 bit address range. U-Boot relocates itself to the end of the available RAM. This is a problem for DMA engines that only support 32 bit physical address, like the SDMA of SDHCI controllers. In fact, U-Boot does not need to run at the very end of RAM. It is rather troublesome for drivers with DMA engines because U-Boot does not have API like dma_set_mask(), so DMA silently fails, making the driver debugging difficult. Hide the memory region that exceeds the 32 bit address range. It can be done by simply carving out gd->ram_size. It would also possible to override get_effective_memsize() or to define CONFIG_MAX_MEM_MAPPED, but dram_init() is a good enough place to do this job. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/dram_init.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index e9672d2..cb35dab 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -205,6 +205,7 @@ int dram_init(void) return ret; for (i = 0; i < ARRAY_SIZE(dram_map); i++) { + unsigned long max_size; if (!dram_map[i].size) break; @@ -218,6 +219,22 @@ int dram_init(void) dram_map[i].base) break; + /* + * Do not use memory that exceeds 32bit address range. U-Boot + * relocates itself to the end of the effectively available RAM. + * This could be a problem for DMA engines that do not support + * 64bit address (SDMA of SDHCI, UniPhier AV-ether, etc.) + */ + if (dram_map[i].base >= 1ULL << 32) + break; + + max_size = (1ULL << 32) - dram_map[i].base; + + if (dram_map[i].size > max_size) { + gd->ram_size += max_size; + break; + } + gd->ram_size += dram_map[i].size; } From patchwork Sat Jan 6 13:59:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 123623 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp595025qgn; Sat, 6 Jan 2018 06:00:05 -0800 (PST) X-Google-Smtp-Source: ACJfBouJgWjBjfkHLn4VBQ6uHM3CU1VJYKeSLPrxbqTEuTHXxfmZIY2tvVss23pWMP3B/af70iuv X-Received: by 10.80.146.207 with SMTP id l15mr8849365eda.3.1515247205231; Sat, 06 Jan 2018 06:00:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515247205; cv=none; d=google.com; s=arc-20160816; b=H6f9aUWMcdDq9fQOWZktKsov1k8ZpwSS1gWCX98nKT6J0BJjmranaQ8zXJSlsOzAYn UJj/+eVi7HkDpTAOLfwjPY9U9Awfw8UaQFmC9pav4GP0xOLKidCo8H9eOK1DZoI34aAv UuTF+4knsAEvXN5Q4rpAe4zoRBUAfnHDQqQewOGJc2w2d4z47l9a8KHsF7+86nRVgyj1 oHnR6HO2lv5L3Vau5Hdw8y6DfklbG9pl8B/ssTFAFdrus21R9YjqtuUysFFxIC1bU1DG OIrI/CzU1JMYGXdZcX9d7LW8dOP+k0WjwWx8MtlYaWdPNbC/RNWtPXzSXb1bkpZuklzx rBPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:dkim-filter:arc-authentication-results; bh=WhWnfGxv/9B3jpv7nKYVTUgRtexA6Sx2t+S7T0rafeA=; b=eMGNTyyp1AmRPY6RAmsmhHQuLhuEibh6nPcXKtT3vnwI25nbqitrX/z3JC0q8SNO22 n9D1k9acLg5Q7ignBvyilnH2wQl1t8Cf50ndiWNuB1CJqnH6Z7gGyKx/j1Q5dVRKCFCK ba3ZUl+pVRyXEW9dYgbjVMP+e6ESoYieICMZydiZBnqV5CFQ7lJ3MLNTIJh4NvMnZX5r KVkw0c/YEU1ZyqxcyH6ZzoAWm+GSL2h9QSxuJ8fnshbC9owm8ZOHMCWqHWajYcOOvT1F 2SRfjzS6wVfjAi4HQ0Vx4wDmY5XgLogxXtYIIHGlGfzpqPE1pj5LVaslMKNd6qAaRiT0 rMKg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=WkkJP5E9; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id j1si414175edb.53.2018.01.06.06.00.04; Sat, 06 Jan 2018 06:00:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=WkkJP5E9; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 2B759C21EB4; Sat, 6 Jan 2018 14:00:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A3795C21E2F; Sat, 6 Jan 2018 14:00:01 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 36552C21E57; Sat, 6 Jan 2018 14:00:00 +0000 (UTC) Received: from conuserg-12.nifty.com (conuserg-12.nifty.com [210.131.2.79]) by lists.denx.de (Postfix) with ESMTPS id 3A3D7C21C41 for ; Sat, 6 Jan 2018 13:59:58 +0000 (UTC) Received: from grover.sesame (FL1-125-199-20-195.osk.mesh.ad.jp [125.199.20.195]) (authenticated) by conuserg-12.nifty.com with ESMTP id w06DxX3Q028034; Sat, 6 Jan 2018 22:59:34 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com w06DxX3Q028034 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1515247175; bh=wOP0xyxfkqZKNZm2xVpwhMG6Lmr5l5JdBU9IAtj5nc4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WkkJP5E9UkJyzw/QGxotKtwWhrLgMUhnwr969nx2whfLm9OT7UpxyJ3D1MqanTh/Y kTfcAoaABU9lhw1/7dphxpD0mcQM6FB8bP0iD74/gxYsOkyownyvIs0FUvkxYdGWEt 6nP21Lf7IsKomZpa1fHeXcsWKcYLvhccAJxEYqhhl3AecxZJWAyHm4oydwIk8hsQ2B qmgi3bhXVFI+D7rWbRvtaIBpd+MmJLn80tBrsN0T91BI51tE2IAY8la1wb60yafxrI GI64IsWrHYy66MVpRVXHZSLMPWzIYEOKLuvAISNODuhOlIxpbSfhkR90wcBbG4Xpdj +TrjC15DrALIA== X-Nifty-SrcIP: [125.199.20.195] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 6 Jan 2018 22:59:25 +0900 Message-Id: <1515247166-20516-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515247166-20516-1-git-send-email-yamada.masahiro@socionext.com> References: <1515247166-20516-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 2/3] ARM: uniphier: enable CONFIG_MMC_SDHCI_SDMA for ARMv8 SoCs X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" I did not enable SDMA when I added sdhci-cadence support because LD20 boards are equipped with a large amount memory beyond 32 bit address range, but SDMA does not support the 64bit address. U-Boot relocates itself to the end of effectively available RAM. This would make the MMC enumeration fail because the buffer for EXT_CSD allocated in the stack would go too high, then SDMA would fail to transfer data. Recent SDHCI-compatible controllers support ADMA, but unfortunately U-Boot does not support ADMA. In the previous commit, I hided the DRAM area that exceeds the 32 bit address range. Now, I can enable CONFIG_MMC_SDHCI_SDMA. Signed-off-by: Masahiro Yamada --- configs/uniphier_v8_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index bbcf3b0..2edc3a9 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_MMC_UNIPHIER=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_MMC_SDHCI_SDMA=y CONFIG_NAND=y CONFIG_NAND_DENALI_DT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 From patchwork Sat Jan 6 13:59:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 123624 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp595529qgn; Sat, 6 Jan 2018 06:00:31 -0800 (PST) X-Google-Smtp-Source: ACJfBouJbilYD2FQ/XWmWC3zN57axbpmzQpB9hxoBHITAr6gL6zlR7GxMOLC3bn35BYqwDCmwvLB X-Received: by 10.80.163.153 with SMTP id s25mr8856971edb.7.1515247231290; Sat, 06 Jan 2018 06:00:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515247231; cv=none; d=google.com; s=arc-20160816; b=Ea0w0uuj8UV3UBEckWKEGO/cZ0xq+dBTDrq/pak5eBjSKM0Ml9pm7z/fkhtM2D+6+v O5zPIyFB8d8i7cuAt98B4v8N5YaQ0cYhrk35dJYy0BwCauSdBfDFxuhx/+eRMFVe2Y8i olDgiRC30kOE5DsaV1ojCdpg42bECqUL9e+UBiIJWCZWMhGel4a49S5troyRHc6Ce/He Z8sv6UZ75EMCW0f36pmnyZlBf0v66fLlO0YN/1IYfjm4UR4tSsxOl5n5aHm44hU0XgG1 DpKJevCj+GyfLMMHnfR0VQNhRjmu/1tLvS5Bg6PgXlG+wwPb2XsOnN8uHnMXnIEYdOT/ ICSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:dkim-filter:arc-authentication-results; bh=QjI1B56SpASzY1gCAG0T5FmCsJJaq3itY0fLCZwvgDI=; b=y4xG5+8a59636GShHVLswruTbzdqkaR6eUxHkY4/6GzZ3z97aSu2GbfhjgnwN7qb5G BQIagi781hSxnh2nYBx2lscevEBDCNU/D0d5o3h9cJQS6g3mExEWjJK6NxDB1G/cFUH1 kMFgemNGbIoIF0txkYKIE2F9t5KlzcS4ZvgUY7KoN8i+n2SfyHQ2Lu1EidKito/C6R2/ fQkdrecWhgLxwyd8KBFWCFA9UCW8K5NJMqIGJVw3h6YuwOxOuua48wqvnvK1nw6dzlnk Y4j/LcYxK5flfsXToWkMzIndkWWV6Td+UP9+6RKkDVEnN+i++wCBkOBHnwH6C0YXLjyg qbyw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=0yUj7PEk; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id r49si5360294eda.331.2018.01.06.06.00.30; Sat, 06 Jan 2018 06:00:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=0yUj7PEk; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id A192EC21EB1; Sat, 6 Jan 2018 14:00:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 8F11AC21EBC; Sat, 6 Jan 2018 14:00:02 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 46256C21C41; Sat, 6 Jan 2018 14:00:00 +0000 (UTC) Received: from conuserg-12.nifty.com (conuserg-12.nifty.com [210.131.2.79]) by lists.denx.de (Postfix) with ESMTPS id 49720C21E2F for ; Sat, 6 Jan 2018 13:59:59 +0000 (UTC) Received: from grover.sesame (FL1-125-199-20-195.osk.mesh.ad.jp [125.199.20.195]) (authenticated) by conuserg-12.nifty.com with ESMTP id w06DxX3R028034; Sat, 6 Jan 2018 22:59:35 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com w06DxX3R028034 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1515247175; bh=9/vQycBYajU2mhSm+VXdTFBcyPRc6WlLIYegqbxnVr0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=0yUj7PEkk/WQDkws/tNW+TZvWa7Lp9edHsEvwjI7s1rsOSB7kWKV82dKWiXIz3Y8p HSxfwSlgTd20PIZNKCC7T5F+44+Er7hCba6CmQshrwzVn9IK9TW0ZueU+TzklYUFJg wY4E67TzHn3yV6hsRIBp5PfQdcGFwektqHtmoDWt4g0+qlb7B58sZGukZKuO24aY9z YAsMCrw40JSI3kBUmt6gDWvI5+zKDHTulOtZyqALIeatHWnn58n/y8ME3GPlkj5Emk 9AJYNsXhT8Akb5bOdw48V+6vXLmXhkgtM95snaCrV1tYozafLx2A2fvPbjLXFmKm/B m6pVOCeM+YzMQ== X-Nifty-SrcIP: [125.199.20.195] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 6 Jan 2018 22:59:26 +0900 Message-Id: <1515247166-20516-4-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515247166-20516-1-git-send-email-yamada.masahiro@socionext.com> References: <1515247166-20516-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 3/3] ARM: uniphier: hide memory top by platform hook instead of CONFIG X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" I do not see a good reason to do this by a CONFIG option that affects all SoCs. The ram_size can be adjusted by dram_init() at run-time. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/dram_init.c | 7 +++++++ include/configs/uniphier.h | 2 -- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index cb35dab..f678114 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -238,6 +238,13 @@ int dram_init(void) gd->ram_size += dram_map[i].size; } + /* + * LD20 uses the last 64 byte for each channel for dynamic + * DDR PHY training + */ + if (uniphier_get_soc_id() == UNIPHIER_LD20_ID) + gd->ram_size -= 64; + return 0; } diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 12cbe9b..5ab06f6 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -215,8 +215,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_NR_DRAM_BANKS 3 -/* for LD20; the last 64 byte is used for dynamic DDR PHY training */ -#define CONFIG_SYS_MEM_TOP_HIDE 64 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE)