From patchwork Fri Jan 12 07:48:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 124330 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp2025233qgn; Fri, 12 Jan 2018 04:54:02 -0800 (PST) X-Google-Smtp-Source: ACJfBosAgbV6xi3Tye6cm/JX/1IO0UV/+mf8Ku5sx40bplTd0hEj8E9hOGAKaysQtRv/E6MZVQ6q X-Received: by 10.84.212.150 with SMTP id e22mr26026159pli.447.1515761642248; Fri, 12 Jan 2018 04:54:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515761642; cv=none; d=google.com; s=arc-20160816; b=UONjsUjXOTd7zA9FEB5GfV9+ji8YUhFEA1oLFh8ifZLFk2Ehdcmx9CwECRjv1TIYFq 6kV3K4IgxOWeZboOx7IO27Gm3pDExyAj3cZzGGUYgFR//LJMht4N/tHQ3INI7GZAIcUn xuIYzRcVGi8UtkzN3Uxt0XMAuOy/Tuf6/ziw+JgJ6iMGpL76oroZySe28DtBIRT7i/L0 j9hxZUDyYNT9GEoOUHDac2eYYAq/6xTUcm4RAibejmz9MR6dUAmNrRNqfZAcM6Urddf2 i8RDCTsf25dqVNm7+reraTKv7WM5c3bLpU/o2impDPxNW1TsbfGml/pWJt1y5JkZRY0e +J+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:delivered-to :arc-authentication-results; bh=bs3fmxF1+K7S1CxaKTZamQxmU1bEjDJuNThkqgQ9UTI=; b=FlY06Zbt9zikg4Ijy3Ja5ym4eBdRlWKo9ZzJH3iCyFLF8stsUMG8+EkWGNNT+BgAFW y20n1wzbDDS1ggqAwjWiNoMWL+nZGEn6Owr1Siuwlra0DWGuOKuejfy67WyxubFxleHm hnP4ndpbs0In0taqdd1huQLT6CspZFuOe2OBH7RFAD94zI3LMyCeulS6j3r2JcA27wYd xEMpIosz73qoWaroBmfYVZ9QuSosDFUKcsXGm4bHo892cIBE/AQhVfRguUfPtwOfe+5b XEYEPJB+uA4gToHYf6YuFrOL1FV1sIx1BfPIXk5JM4ltUB4HMtgxrRHHIT3MWe2ZhXxC bKBw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=PW+WbsQp; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id v8si15887464plg.491.2018.01.12.04.54.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 12 Jan 2018 04:54:02 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=PW+WbsQp; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 30A536E7AC; Fri, 12 Jan 2018 12:53:31 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x241.google.com (mail-lf0-x241.google.com [IPv6:2a00:1450:4010:c07::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7A6FE6E7AC for ; Fri, 12 Jan 2018 12:53:30 +0000 (UTC) Received: by mail-lf0-x241.google.com with SMTP id j143so5851003lfg.0 for ; Fri, 12 Jan 2018 04:53:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EZDGuseldOtALoU7pz1JLreUdN5+JMrai8rtPUfPvQc=; b=PW+WbsQpHccIiYtGnEBqDgIb4LGsYEv4zYLevMz2ki6aBmSTcpQyEaZnlKk1VhVz3K 4Hep8qb7WIzzkK1fii+5NSKFmozWilLQLfDk1oP9Nc3gfHmrO5i5K1c08/LtDiH2LiqY u4MGKCKbsRBQxNHh4ldA+tJXpwzax6En0ud8c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=EZDGuseldOtALoU7pz1JLreUdN5+JMrai8rtPUfPvQc=; b=FjGIS+S4d2nYfP3xK6pufjkbpRxcPuTlkMvPUXxvZBiVet5W/nY0yXHC5n4k1bWgm+ B2cNvZDv+dcK/hQ8fA7YUdGpsvZfb95Kn+rGesSmjeCtXENHYNDqXKXX5fUrFPlvWH+4 Uicl2h9KL1sdL4S/+zea86WVSmBNhg7J6XSQO+7JTEPePJp82ZZc9elFapg3WxIPCg6Y qRV7Npiud/HbyoTy4Rn5EmWk+cY2+B3XghFFqmgxgPjfMTxFLjvQMzsFGiMPetTkX4Ds gVvfjzZgJUai1mJsPv+ihWQCEVykw/0mfJRM5D3TTaMDgYvKfzIEAnejI7XoM4jJbx1b yuLA== X-Gm-Message-State: AKwxytcccjX7u7ized7zSUOZYRAMSdA4wpfX53nB/crm7rsTxRuI3pJv cSLroFY4K2avEsJzdApUO4dnMrZjuXc= X-Received: by 10.25.121.6 with SMTP id u6mr11858033lfc.34.1515743605638; Thu, 11 Jan 2018 23:53:25 -0800 (PST) Received: from localhost.localdomain (c-cb7471d5.014-348-6c756e10.cust.bredbandsbolaget.se. [213.113.116.203]) by smtp.gmail.com with ESMTPSA id a69sm4115039ljf.54.2018.01.11.23.53.24 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 11 Jan 2018 23:53:24 -0800 (PST) From: Linus Walleij To: Archit Taneja , Andrzej Hajda , Laurent Pinchart Subject: [PATCH 2/4 v7] drm/bridge: Provide a way to embed timing info in bridges Date: Fri, 12 Jan 2018 08:48:52 +0100 Message-Id: <20180112074854.9560-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180112074854.9560-1-linus.walleij@linaro.org> References: <20180112074854.9560-1-linus.walleij@linaro.org> Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" After some discussion and failed patch sets trying to convey the right timing information between the display engine and a bridge using the connector, I try instead to use an optional timing information container in the bridge itself, so that display engines can retrieve it from any bridge and use it to determine how to drive outputs. Signed-off-by: Linus Walleij Reviewed-by: Laurent Pinchart --- ChangeLog v6->v7: - Fix the comment style to use the new inline type of kerneldoc for struct members. - Need an explicit ACK/review by someone on this patch to continue with the series... ChangeLog v5->v6: - Sort forward struct declarations alphabetically - Switch to using DRM_BUS_FLAG_PIXDATA_[POS|NEG]EDGE to indicate positive or negatice clock samling edge ChangeLog ->v5: - New patch --- include/drm/drm_bridge.h | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/include/drm/drm_bridge.h b/include/drm/drm_bridge.h index 682d01ba920c..d3c2eea0bb63 100644 --- a/include/drm/drm_bridge.h +++ b/include/drm/drm_bridge.h @@ -29,6 +29,7 @@ #include struct drm_bridge; +struct drm_bridge_timings; struct drm_panel; /** @@ -222,6 +223,35 @@ struct drm_bridge_funcs { void (*enable)(struct drm_bridge *bridge); }; +/** + * struct drm_bridge_timings - timing information for the bridge + */ +struct drm_bridge_timings { + /** + * @sampling_edge: + * + * Tells whether the bridge samples the digital input signal + * from the display engine on the positive or negative edge of the clock, + * this should reuse the DRM_BUS_FLAG_PIXDATA_[POS|NEG]EDGE bitwise + * flags from the DRM connector (bit 2 and 3 valid). + */ + u32 sampling_edge; + /** + * @setup_time_ps: + * + * Defines the time in picoseconds the input data lines must be + * stable before the clock edge. + */ + u32 setup_time_ps; + /** + * @hold_time_ps: + * + * Defines the time in picoseconds taken for the bridge to sample the + * input signal after the clock edge. + */ + u32 hold_time_ps; +}; + /** * struct drm_bridge - central DRM bridge control structure * @dev: DRM device this bridge belongs to @@ -229,6 +259,8 @@ struct drm_bridge_funcs { * @next: the next bridge in the encoder chain * @of_node: device node pointer to the bridge * @list: to keep track of all added bridges + * @timings: the timing specification for the bridge, if any (may + * be NULL) * @funcs: control functions * @driver_private: pointer to the bridge driver's internal context */ @@ -240,6 +272,7 @@ struct drm_bridge { struct device_node *of_node; #endif struct list_head list; + const struct drm_bridge_timings *timings; const struct drm_bridge_funcs *funcs; void *driver_private; From patchwork Fri Jan 12 07:48:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 124338 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp2041608qgn; Fri, 12 Jan 2018 05:08:43 -0800 (PST) X-Google-Smtp-Source: ACJfBovo6xoifi+/0lJaW7I/Zt9lbA4YGaIPkKuRNRmthTX+jUUDXKbOUiliLFUbKyKrO09cK6fG X-Received: by 10.84.236.13 with SMTP id q13mr14937965plk.445.1515762523176; Fri, 12 Jan 2018 05:08:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515762523; cv=none; d=google.com; s=arc-20160816; b=iKzTeOLEPrdVc2v0lLCDcVsSYbhirLGvN9Rbuhydg9EmgumpvTdK61glDVGa41Cs0b Uf1VSuPVFweqYeGS4WIDXYtjNcjfHx2ZVMEos42UHa0RT4FpqRIB5cl6S9lmReTcX/5T YxJHg2uNnkw8/uojprNKOw/0bVprjtPOfUQMK4y8wuw6oG8K9ZaZ4iyogGagy/wWqUbv mrKAhpoGwe2eRjoWzilFdxtV/tCKvKcUqlmPJ/TdeqzExTyoGRn69OGCZakzGIi8BzE+ MO3vpvi/hWYkqAjxqZUJr1QEL4QaTeiPKXi6SbH7FP2QFvnqrVRyQRahyqxgGcZHTE8F efAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:delivered-to :arc-authentication-results; bh=VxN3C+koALL1AxJmbGZcuwLfROrqoDVyV9QvZEyhC4o=; b=srL1044scDLz/c5HJTNevOdTdVQBXksVFXrRP8lK3NJQdbu3HshpYozGW6Nm4tSuRQ f1ueIuY2aVcHq4yxB3iQqJmFbK6073Sl+6noDxlIhJvT1FoGaQxPBvUzBXWl+XjIFt13 06rfhJr5YeEmCvTpfEeF8ljlz7OmdT5POQ6jB1ctg71tSk1FrSn+Obyt2Xx11QDl3LVl XyrkTZD6p0mGMkl5xcGp5LuU3I9bb3RsNYIUuM+JgwuAc3qPZ/yybCSsuUTxw/Tog1yZ 3QdBoA+QHmN0dT9Cytzm/U+zlY894JKYWsCZnO0vyYjE5LrXyBqTLNmwgFpXtZjLOW4t NnGg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=SAxUja+m; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. 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[213.113.116.203]) by smtp.gmail.com with ESMTPSA id a69sm4115039ljf.54.2018.01.11.23.53.27 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 11 Jan 2018 23:53:27 -0800 (PST) From: Linus Walleij To: Archit Taneja , Andrzej Hajda , Laurent Pinchart Subject: [PATCH 3/4 v7] drm/bridge: Add timing support to dumb VGA DAC Date: Fri, 12 Jan 2018 08:48:53 +0100 Message-Id: <20180112074854.9560-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180112074854.9560-1-linus.walleij@linaro.org> References: <20180112074854.9560-1-linus.walleij@linaro.org> Cc: Bartosz Golaszewski , dri-devel@lists.freedesktop.org, Maxime Ripard , linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This extends the dumb VGA DAC bridge to handle the THS8134A and THS8134B VGA DACs in addition to those already handled. We assign the proper timing data to the pointer inside the bridge struct so display controllers that need to align their timings to the bridge can pick it up and work from there. Cc: Bartosz Golaszewski Cc: Maxime Ripard Reviewed-by: Laurent Pinchart Signed-off-by: Linus Walleij --- ChangeLog v5->v6: - Use DRM_BUS_FLAG_PIXDATA_[POS|NEG]EDGE to indicate the sampling edge of the clock signal. - Skip intermediate variable for timings. - Leave timings as NULL for really dumb VGA DACs. - Collect Laurent's Review tag. ChangeLog v4->v5: - Rewrite the support using the new concept of defining fine-granular sampling (setup+hold) timing definitions stored in the bridge timings struct. ChangeLog v3->v4: - Actually have the code syntactically correct and compiling :( (Kconfig mistake.) (...) AS usr/initramfs_data.o AR usr/built-in.o CC drivers/gpu/drm/bridge/dumb-vga-dac.o AR drivers/gpu/drm/bridge/built-in.o AR drivers/gpu/drm/built-in.o AR drivers/gpu/built-in.o AR drivers/built-in.o (...) ChangeLog v2->v3: - Move const specifier. - Cut one line of code assigning bus flags. - Preserve the "ti,ths8135" compatible for elder device trees. ChangeLog v1->v2: - Alphabetize includes - Use a u32 with the bus polarity flags and just encode the polarity using the DRM define directly. - Rename vendor_data to vendor_info. - Simplify assignment of the flag as it is just a simple u32 now. - Probe all TI variants on the "ti,ths813x" wildcard for now, we only need to know that the device is in this family to set the clock edge flag right. --- drivers/gpu/drm/bridge/dumb-vga-dac.c | 59 +++++++++++++++++++++++++++++++++-- 1 file changed, 56 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/dumb-vga-dac.c b/drivers/gpu/drm/bridge/dumb-vga-dac.c index de5e7dee7ad6..498d5948d1a8 100644 --- a/drivers/gpu/drm/bridge/dumb-vga-dac.c +++ b/drivers/gpu/drm/bridge/dumb-vga-dac.c @@ -11,6 +11,7 @@ */ #include +#include #include #include @@ -204,6 +205,7 @@ static int dumb_vga_probe(struct platform_device *pdev) vga->bridge.funcs = &dumb_vga_bridge_funcs; vga->bridge.of_node = pdev->dev.of_node; + vga->bridge.timings = of_device_get_match_data(&pdev->dev); drm_bridge_add(&vga->bridge); @@ -222,10 +224,61 @@ static int dumb_vga_remove(struct platform_device *pdev) return 0; } +/* + * We assume the ADV7123 DAC is the "default" for historical reasons + * Information taken from the ADV7123 datasheet, revision D. + * NOTE: the ADV7123EP seems to have other timings and need a new timings + * set if used. + */ +static const struct drm_bridge_timings default_dac_timings = { + /* Timing specifications, datasheet page 7 */ + .sampling_edge = DRM_BUS_FLAG_PIXDATA_POSEDGE, + .setup_time_ps = 500, + .hold_time_ps = 1500, +}; + +/* + * Information taken from the THS8134, THS8134A, THS8134B datasheet named + * "SLVS205D", dated May 1990, revised March 2000. + */ +static const struct drm_bridge_timings ti_ths8134_dac_timings = { + /* From timing diagram, datasheet page 9 */ + .sampling_edge = DRM_BUS_FLAG_PIXDATA_POSEDGE, + /* From datasheet, page 12 */ + .setup_time_ps = 3000, + /* I guess this means latched input */ + .hold_time_ps = 0, +}; + +/* + * Information taken from the THS8135 datasheet named "SLAS343B", dated + * May 2001, revised April 2013. + */ +static const struct drm_bridge_timings ti_ths8135_dac_timings = { + /* From timing diagram, datasheet page 14 */ + .sampling_edge = DRM_BUS_FLAG_PIXDATA_POSEDGE, + /* From datasheet, page 16 */ + .setup_time_ps = 2000, + .hold_time_ps = 500, +}; + static const struct of_device_id dumb_vga_match[] = { - { .compatible = "dumb-vga-dac" }, - { .compatible = "adi,adv7123" }, - { .compatible = "ti,ths8135" }, + { + .compatible = "dumb-vga-dac", + .data = NULL, + }, + { + .compatible = "adi,adv7123", + .data = &default_dac_timings, + }, + { + .compatible = "ti,ths8135", + .data = &ti_ths8135_dac_timings, + }, + { + .compatible = "ti,ths8134", + .data = &ti_ths8134_dac_timings, + }, {}, }; MODULE_DEVICE_TABLE(of, dumb_vga_match); From patchwork Fri Jan 12 07:48:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 124348 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp2070974qgn; Fri, 12 Jan 2018 05:37:29 -0800 (PST) X-Google-Smtp-Source: ACJfBotD7xthvZ8A9tzTmDJpcgyf6uAn9CLUUqOIbaP2Ln0ACM1cGZbkS4lsrCnmWeYQOc2xCCdm X-Received: by 10.159.246.139 with SMTP id c11mr13883456pls.446.1515764249248; Fri, 12 Jan 2018 05:37:29 -0800 (PST) ARC-Seal: i=1; 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[213.113.116.203]) by smtp.gmail.com with ESMTPSA id a69sm4115039ljf.54.2018.01.11.23.53.29 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 11 Jan 2018 23:53:29 -0800 (PST) From: Linus Walleij To: Archit Taneja , Andrzej Hajda , Laurent Pinchart Subject: [PATCH 4/4 v7] drm/pl111: Support handling bridge timings Date: Fri, 12 Jan 2018 08:48:54 +0100 Message-Id: <20180112074854.9560-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180112074854.9560-1-linus.walleij@linaro.org> References: <20180112074854.9560-1-linus.walleij@linaro.org> Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" If the bridge has a too strict setup time for the incoming signals, we may not be fast enough and then we need to compensate by outputting the signal on the inverse clock edge so it is for sure stable when the bridge samples it. Since bridges in difference to panels does not expose their connectors, make the connector optional in the display setup code. Acked-by: Laurent Pinchart Reviewed-by: Eric Anholt Signed-off-by: Linus Walleij --- ChangeLog v6->v7: - Collect Eric's ACK. ChangeLog v5->v6: - Collect Laurent's ACK. ChangeLog v4->v5: - Use the new bridge timings setup method. --- drivers/gpu/drm/pl111/Kconfig | 1 + drivers/gpu/drm/pl111/pl111_display.c | 35 +++++++++++++++++++++++++++++++---- drivers/gpu/drm/pl111/pl111_drv.c | 20 +++++++++++--------- 3 files changed, 43 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/pl111/Kconfig b/drivers/gpu/drm/pl111/Kconfig index e5e2abd66491..82cb3e60ddc8 100644 --- a/drivers/gpu/drm/pl111/Kconfig +++ b/drivers/gpu/drm/pl111/Kconfig @@ -8,6 +8,7 @@ config DRM_PL111 select DRM_GEM_CMA_HELPER select DRM_BRIDGE select DRM_PANEL_BRIDGE + select DRM_DUMB_VGA_DAC select VT_HW_CONSOLE_BINDING if FRAMEBUFFER_CONSOLE help Choose this option for DRM support for the PL111 CLCD controller. diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index 06c4bf756b69..7fe4040aea46 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -94,6 +94,7 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, const struct drm_display_mode *mode = &cstate->mode; struct drm_framebuffer *fb = plane->state->fb; struct drm_connector *connector = priv->connector; + struct drm_bridge *bridge = priv->bridge; u32 cntl; u32 ppl, hsw, hfp, hbp; u32 lpp, vsw, vfp, vbp; @@ -143,11 +144,37 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, if (mode->flags & DRM_MODE_FLAG_NVSYNC) tim2 |= TIM2_IVS; - if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW) - tim2 |= TIM2_IOE; + if (connector) { + if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW) + tim2 |= TIM2_IOE; - if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_NEGEDGE) - tim2 |= TIM2_IPC; + if (connector->display_info.bus_flags & + DRM_BUS_FLAG_PIXDATA_NEGEDGE) + tim2 |= TIM2_IPC; + } + + if (bridge) { + const struct drm_bridge_timings *btimings = bridge->timings; + + /* + * Here is when things get really fun. Sometimes the bridge + * timings are such that the signal out from PL11x is not + * stable before the receiving bridge (such as a dumb VGA DAC + * or similar) samples it. If that happens, we compensate by + * the only method we have: output the data on the opposite + * edge of the clock so it is for sure stable when it gets + * sampled. + * + * The PL111 manual does not contain proper timining diagrams + * or data for these details, but we know from experiments + * that the setup time is more than 3000 picoseconds (3 ns). + * If we have a bridge that requires the signal to be stable + * earlier than 3000 ps before the clock pulse, we have to + * output the data on the opposite edge to avoid flicker. + */ + if (btimings && btimings->setup_time_ps >= 3000) + tim2 ^= TIM2_IPC; + } tim2 |= cpl << 16; writel(tim2, priv->regs + CLCD_TIM2); diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index 201d57d5cb54..101a9c7db6ff 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -107,11 +107,17 @@ static int pl111_modeset_init(struct drm_device *dev) ret = PTR_ERR(bridge); goto out_config; } - /* - * TODO: when we are using a different bridge than a panel - * (such as a dumb VGA connector) we need to devise a different - * method to get the connector out of the bridge. - */ + } else if (bridge) { + dev_info(dev->dev, "Using non-panel bridge\n"); + } else { + dev_err(dev->dev, "No bridge, exiting\n"); + return -ENODEV; + } + + priv->bridge = bridge; + if (panel) { + priv->panel = panel; + priv->connector = panel->connector; } ret = pl111_display_init(dev); @@ -125,10 +131,6 @@ static int pl111_modeset_init(struct drm_device *dev) if (ret) return ret; - priv->bridge = bridge; - priv->panel = panel; - priv->connector = panel->connector; - ret = drm_vblank_init(dev, 1); if (ret != 0) { dev_err(dev->dev, "Failed to init vblank\n");