From patchwork Sat Jan 13 00:59:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 124393 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp71583qgn; Fri, 12 Jan 2018 17:00:43 -0800 (PST) X-Google-Smtp-Source: ACJfBoucr0ZFTbbwBlTHUcezRf/D/oMkQi+ZQslvR2BidaL/Dg1ftaXeZ0r23IKyRF7Ka3OC+yGG X-Received: by 10.84.130.101 with SMTP id 92mr27923115plc.82.1515805243148; Fri, 12 Jan 2018 17:00:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515805243; cv=none; d=google.com; s=arc-20160816; b=DJ+Y4LNIJWOnNhXEeSWHy1zaotA220+ZW+AJ33YdCwwyb25aYmY2D9UnMUzqauXrqC t9yk5Fp2uQ4YH0bedmeJMLWqbHfuVF6BCC2ar4O6RN5U2U09JxCQTSeAmHfSv+64nrQI jrCLrqZ51QOvfAeQ/J2Y3e0yiiPbXTFAj32gLsul7YqPqvhECkvMK0eKBpJ0SZJJq351 gHOsSwwhjtF6jPzwGs1gE9f+NqYfHfKKx9IUG8mPB+pVCvEcUugsvWqMjEFb1BWG0DA6 PDkigo6ksW7sz73fCtbVb/UbZvQs0m3y/9JpzT92HxIWl5O+h+5qNbE6ZaNzpuKWnmZu /Psw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=huzKoy4QMT/zdVlO798S9yqColhSf3wKhYceU5eoVGw=; b=0CnqNm4q8WOYHZnaG8lSO58nvhJUCbBD2DfwJshbEQU7a1E1C4KS1QYNyPQJuIDsw2 YalT5o5GoVs2ew6q8hukgYiWZEb+Qu00RrBTpmRmyZkUhezxQAK8wshn09RS3QChpMNV 2fU9B66wVrsLFITibYgHb9+VYV+L99CeiJp42NfkAhEyHlNkj0oQqD5PK/vN3FMxI8YJ elawGtWOvf+OcP6836EhMirHpxYUuRX4UYOQb5qCo2xTa3VSCO6UKoNNFDRMv7ZpYOgt Ilay1hPzkeCiphMiiC9LTVWTJ/QuowaI6i5GfaLTSzx3NSEsApq0pQPz3bCuIOaB12uR MG0g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d13si7410495pgu.579.2018.01.12.17.00.42; Fri, 12 Jan 2018 17:00:43 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965441AbeAMBAl (ORCPT + 28 others); Fri, 12 Jan 2018 20:00:41 -0500 Received: from foss.arm.com ([217.140.101.70]:53754 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965260AbeAMBAi (ORCPT ); Fri, 12 Jan 2018 20:00:38 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A8F8715A2; Fri, 12 Jan 2018 17:00:37 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id AE8A33F487; Fri, 12 Jan 2018 17:00:36 -0800 (PST) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, sudeep.holla@arm.com, hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com, gregkh@linuxfoundation.org, viresh.kumar@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, jhugo@codeaurora.org, wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com, ahs3@redhat.com, Jayachandran.Nair@cavium.com, austinwc@codeaurora.org, lenb@kernel.org, vkilari@codeaurora.org, morten.rasmussen@arm.com, Jeremy Linton Subject: [PATCH v6 01/12] drivers: base: cacheinfo: move cache_setup_of_node() Date: Fri, 12 Jan 2018 18:59:09 -0600 Message-Id: <20180113005920.28658-2-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20180113005920.28658-1-jeremy.linton@arm.com> References: <20180113005920.28658-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In preparation for the next patch, and to aid in review of that patch, lets move cache_setup_of_node farther down in the module without any changes. Signed-off-by: Jeremy Linton --- drivers/base/cacheinfo.c | 80 ++++++++++++++++++++++++------------------------ 1 file changed, 40 insertions(+), 40 deletions(-) -- 2.13.5 diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index 07532d83be0b..a883a213fcd5 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -43,46 +43,6 @@ struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu) } #ifdef CONFIG_OF -static int cache_setup_of_node(unsigned int cpu) -{ - struct device_node *np; - struct cacheinfo *this_leaf; - struct device *cpu_dev = get_cpu_device(cpu); - struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); - unsigned int index = 0; - - /* skip if of_node is already populated */ - if (this_cpu_ci->info_list->of_node) - return 0; - - if (!cpu_dev) { - pr_err("No cpu device for CPU %d\n", cpu); - return -ENODEV; - } - np = cpu_dev->of_node; - if (!np) { - pr_err("Failed to find cpu%d device node\n", cpu); - return -ENOENT; - } - - while (index < cache_leaves(cpu)) { - this_leaf = this_cpu_ci->info_list + index; - if (this_leaf->level != 1) - np = of_find_next_cache_node(np); - else - np = of_node_get(np);/* cpu node itself */ - if (!np) - break; - this_leaf->of_node = np; - index++; - } - - if (index != cache_leaves(cpu)) /* not all OF nodes populated */ - return -ENOENT; - - return 0; -} - static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf, struct cacheinfo *sib_leaf) { @@ -213,6 +173,46 @@ static void cache_of_override_properties(unsigned int cpu) cache_associativity(this_leaf); } } + +static int cache_setup_of_node(unsigned int cpu) +{ + struct device_node *np; + struct cacheinfo *this_leaf; + struct device *cpu_dev = get_cpu_device(cpu); + struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); + unsigned int index = 0; + + /* skip if of_node is already populated */ + if (this_cpu_ci->info_list->of_node) + return 0; + + if (!cpu_dev) { + pr_err("No cpu device for CPU %d\n", cpu); + return -ENODEV; + } + np = cpu_dev->of_node; + if (!np) { + pr_err("Failed to find cpu%d device node\n", cpu); + return -ENOENT; + } + + while (index < cache_leaves(cpu)) { + this_leaf = this_cpu_ci->info_list + index; + if (this_leaf->level != 1) + np = of_find_next_cache_node(np); + else + np = of_node_get(np);/* cpu node itself */ + if (!np) + break; + this_leaf->of_node = np; + index++; + } + + if (index != cache_leaves(cpu)) /* not all OF nodes populated */ + return -ENOENT; + + return 0; +} #else static void cache_of_override_properties(unsigned int cpu) { } static inline int cache_setup_of_node(unsigned int cpu) { return 0; } From patchwork Sat Jan 13 00:59:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 124394 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp71700qgn; Fri, 12 Jan 2018 17:00:50 -0800 (PST) X-Google-Smtp-Source: ACJfBovsd6QPhP89HUn4AqTRh17R9ZI8JrVBC+kLC8cWw0jmeOFZSAY6/FtZx6j+pQahy/WS9clo X-Received: by 10.98.224.3 with SMTP id f3mr16340964pfh.205.1515805250831; Fri, 12 Jan 2018 17:00:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515805250; cv=none; d=google.com; s=arc-20160816; b=yfhayk2Td0k/bCJSRKi8LsOX6uLX+mnENQfk0rJWUQolMiCwMIwMULS5fVy4/RHjX9 KZYo14z/M1YgrRiRxY3F0hg3JH6fksNRdMvezWIWKCxt5d+/OfukMwCFKo2oQP1i9J4W YlfAqOpJywgSIHIHWV0FM8H9iCrcdeTeTCUpm3nnsSosHRB55H2eZWvQMjCzz8As6oAl cHeXzno/XInLMDllNJ2oKGaSJlcYybhhDam/sc8yM/QAnDXWCJM1OltVcibDfD9wqfPn eBW3uwntwq/6CyMYZAoa1iB6Rzeh9Z1J/YWNlnri7Fc6rczLjP1SHCN4FPie1CUE/Urb hUxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=PL8Hw288Jn/LxMcrqZY6xveTWiuTqNZtl68fg7km5WU=; b=gkbt85JRm6RQjNdE21pdtk+TqAoyf5EoqHB4aDbad93z1rLGXDP+xbDOQMJLei/a0m ObQ7hu2Jef5jk9t9zAwFVOmQetaDhpE0Rh2UywFT7jffW25WFFkiwecMz2dUg3kYmCen G164u9HmPJ1/P8JQChtuKMFPdi742aYmSDb+x8iq3rveAPnlE1lEvWPncaaVjnXPoPn5 jwqdcAkVH3pxgb/NsOH6caHKMaD47QAbYqQpH6C/wgJYzHurtDTq6pGlREB5qSURJU4R 9jzRkQpOM0uct3OE9WiK11lplT0fMk5zUmjA0YaHkkaql34eOGSEqWsWDs+0sdISrq4B e5pw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o3si16380564pld.695.2018.01.12.17.00.50; Fri, 12 Jan 2018 17:00:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965473AbeAMBAp (ORCPT + 28 others); Fri, 12 Jan 2018 20:00:45 -0500 Received: from foss.arm.com ([217.140.101.70]:53776 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965443AbeAMBAl (ORCPT ); Fri, 12 Jan 2018 20:00:41 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2979C15AD; Fri, 12 Jan 2018 17:00:41 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 208743F487; Fri, 12 Jan 2018 17:00:40 -0800 (PST) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, sudeep.holla@arm.com, hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com, gregkh@linuxfoundation.org, viresh.kumar@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, jhugo@codeaurora.org, wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com, ahs3@redhat.com, Jayachandran.Nair@cavium.com, austinwc@codeaurora.org, lenb@kernel.org, vkilari@codeaurora.org, morten.rasmussen@arm.com, Jeremy Linton , Palmer Dabbelt , Albert Ou Subject: [PATCH v6 02/12] drivers: base: cacheinfo: setup DT cache properties early Date: Fri, 12 Jan 2018 18:59:10 -0600 Message-Id: <20180113005920.28658-3-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20180113005920.28658-1-jeremy.linton@arm.com> References: <20180113005920.28658-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The original intent in cacheinfo was that an architecture specific populate_cache_leaves() would probe the hardware and then cache_shared_cpu_map_setup() and cache_override_properties() would provide firmware help to extend/expand upon what was probed. Arm64 was really the only architecture that was working this way, and with the removal of most of the hardware probing logic it became clear that it was possible to simplify the logic a bit. This patch combines the walk of the DT nodes with the code updating the cache size/line_size and nr_sets. cache_override_properties() (which was DT specific) is then removed. The result is that cacheinfo.of_node is no longer used as a temporary place to hold DT references for future calls that update cache properties. That change helps to clarify its one remaining use (matching cacheinfo nodes that represent shared caches) which will be used by the ACPI/PPTT code in the following patches. Cc: Palmer Dabbelt Cc: Albert Ou Signed-off-by: Jeremy Linton --- arch/riscv/kernel/cacheinfo.c | 1 + drivers/base/cacheinfo.c | 65 +++++++++++++++++++------------------------ include/linux/cacheinfo.h | 1 + 3 files changed, 31 insertions(+), 36 deletions(-) -- 2.13.5 diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c index 10ed2749e246..6f4500233cf8 100644 --- a/arch/riscv/kernel/cacheinfo.c +++ b/arch/riscv/kernel/cacheinfo.c @@ -30,6 +30,7 @@ static void ci_leaf_init(struct cacheinfo *this_leaf, CACHE_WRITE_BACK | CACHE_READ_ALLOCATE | CACHE_WRITE_ALLOCATE; + cache_of_set_props(this_leaf, node); } static int __init_cache_level(unsigned int cpu) diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index a883a213fcd5..fc0d42bbd9eb 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -43,6 +43,7 @@ struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu) } #ifdef CONFIG_OF + static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf, struct cacheinfo *sib_leaf) { @@ -82,7 +83,7 @@ static inline int get_cacheinfo_idx(enum cache_type type) return type; } -static void cache_size(struct cacheinfo *this_leaf) +static void cache_size(struct cacheinfo *this_leaf, struct device_node *np) { const char *propname; const __be32 *cache_size; @@ -91,13 +92,14 @@ static void cache_size(struct cacheinfo *this_leaf) ct_idx = get_cacheinfo_idx(this_leaf->type); propname = cache_type_info[ct_idx].size_prop; - cache_size = of_get_property(this_leaf->of_node, propname, NULL); + cache_size = of_get_property(np, propname, NULL); if (cache_size) this_leaf->size = of_read_number(cache_size, 1); } /* not cache_line_size() because that's a macro in include/linux/cache.h */ -static void cache_get_line_size(struct cacheinfo *this_leaf) +static void cache_get_line_size(struct cacheinfo *this_leaf, + struct device_node *np) { const __be32 *line_size; int i, lim, ct_idx; @@ -109,7 +111,7 @@ static void cache_get_line_size(struct cacheinfo *this_leaf) const char *propname; propname = cache_type_info[ct_idx].line_size_props[i]; - line_size = of_get_property(this_leaf->of_node, propname, NULL); + line_size = of_get_property(np, propname, NULL); if (line_size) break; } @@ -118,7 +120,7 @@ static void cache_get_line_size(struct cacheinfo *this_leaf) this_leaf->coherency_line_size = of_read_number(line_size, 1); } -static void cache_nr_sets(struct cacheinfo *this_leaf) +static void cache_nr_sets(struct cacheinfo *this_leaf, struct device_node *np) { const char *propname; const __be32 *nr_sets; @@ -127,7 +129,7 @@ static void cache_nr_sets(struct cacheinfo *this_leaf) ct_idx = get_cacheinfo_idx(this_leaf->type); propname = cache_type_info[ct_idx].nr_sets_prop; - nr_sets = of_get_property(this_leaf->of_node, propname, NULL); + nr_sets = of_get_property(np, propname, NULL); if (nr_sets) this_leaf->number_of_sets = of_read_number(nr_sets, 1); } @@ -146,32 +148,26 @@ static void cache_associativity(struct cacheinfo *this_leaf) this_leaf->ways_of_associativity = (size / nr_sets) / line_size; } -static bool cache_node_is_unified(struct cacheinfo *this_leaf) +static bool cache_node_is_unified(struct cacheinfo *this_leaf, + struct device_node *np) { - return of_property_read_bool(this_leaf->of_node, "cache-unified"); + return of_property_read_bool(np, "cache-unified"); } -static void cache_of_override_properties(unsigned int cpu) +void cache_of_set_props(struct cacheinfo *this_leaf, struct device_node *np) { - int index; - struct cacheinfo *this_leaf; - struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); - - for (index = 0; index < cache_leaves(cpu); index++) { - this_leaf = this_cpu_ci->info_list + index; - /* - * init_cache_level must setup the cache level correctly - * overriding the architecturally specified levels, so - * if type is NONE at this stage, it should be unified - */ - if (this_leaf->type == CACHE_TYPE_NOCACHE && - cache_node_is_unified(this_leaf)) - this_leaf->type = CACHE_TYPE_UNIFIED; - cache_size(this_leaf); - cache_get_line_size(this_leaf); - cache_nr_sets(this_leaf); - cache_associativity(this_leaf); - } + /* + * init_cache_level must setup the cache level correctly + * overriding the architecturally specified levels, so + * if type is NONE at this stage, it should be unified + */ + if (this_leaf->type == CACHE_TYPE_NOCACHE && + cache_node_is_unified(this_leaf, np)) + this_leaf->type = CACHE_TYPE_UNIFIED; + cache_size(this_leaf, np); + cache_get_line_size(this_leaf, np); + cache_nr_sets(this_leaf, np); + cache_associativity(this_leaf); } static int cache_setup_of_node(unsigned int cpu) @@ -204,6 +200,7 @@ static int cache_setup_of_node(unsigned int cpu) np = of_node_get(np);/* cpu node itself */ if (!np) break; + cache_of_set_props(this_leaf, np); this_leaf->of_node = np; index++; } @@ -214,7 +211,6 @@ static int cache_setup_of_node(unsigned int cpu) return 0; } #else -static void cache_of_override_properties(unsigned int cpu) { } static inline int cache_setup_of_node(unsigned int cpu) { return 0; } static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf, struct cacheinfo *sib_leaf) @@ -297,12 +293,6 @@ static void cache_shared_cpu_map_remove(unsigned int cpu) } } -static void cache_override_properties(unsigned int cpu) -{ - if (of_have_populated_dt()) - return cache_of_override_properties(cpu); -} - static void free_cache_attributes(unsigned int cpu) { if (!per_cpu_cacheinfo(cpu)) @@ -336,6 +326,10 @@ static int detect_cache_attributes(unsigned int cpu) if (per_cpu_cacheinfo(cpu) == NULL) return -ENOMEM; + /* + * populate_cache_leaves() may completely setup the cache leaves and + * shared_cpu_map or it may leave it partially setup. + */ ret = populate_cache_leaves(cpu); if (ret) goto free_ci; @@ -349,7 +343,6 @@ static int detect_cache_attributes(unsigned int cpu) goto free_ci; } - cache_override_properties(cpu); return 0; free_ci: diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h index 3d9805297cda..d35299a590a4 100644 --- a/include/linux/cacheinfo.h +++ b/include/linux/cacheinfo.h @@ -99,6 +99,7 @@ int func(unsigned int cpu) \ struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu); int init_cache_level(unsigned int cpu); int populate_cache_leaves(unsigned int cpu); +void cache_of_set_props(struct cacheinfo *this_leaf, struct device_node *np); const struct attribute_group *cache_get_priv_group(struct cacheinfo *this_leaf); From patchwork Sat Jan 13 00:59:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 124404 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp73852qgn; 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[209.132.180.67]) by mx.google.com with ESMTP id q4si16543388plb.249.2018.01.12.17.03.28; Fri, 12 Jan 2018 17:03:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965658AbeAMBD1 (ORCPT + 28 others); Fri, 12 Jan 2018 20:03:27 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:53798 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965450AbeAMBAo (ORCPT ); Fri, 12 Jan 2018 20:00:44 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AB49E1610; Fri, 12 Jan 2018 17:00:43 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A21863F487; Fri, 12 Jan 2018 17:00:42 -0800 (PST) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, sudeep.holla@arm.com, hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com, gregkh@linuxfoundation.org, viresh.kumar@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, jhugo@codeaurora.org, wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com, ahs3@redhat.com, Jayachandran.Nair@cavium.com, austinwc@codeaurora.org, lenb@kernel.org, vkilari@codeaurora.org, morten.rasmussen@arm.com, Jeremy Linton , Palmer Dabbelt , Albert Ou Subject: [PATCH v6 03/12] cacheinfo: rename of_node to fw_unique Date: Fri, 12 Jan 2018 18:59:11 -0600 Message-Id: <20180113005920.28658-4-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20180113005920.28658-1-jeremy.linton@arm.com> References: <20180113005920.28658-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rename and change the type of of_node to indicate it is a generic pointer which is generally only used for comparison purposes. In a later patch we will apply an ACPI/PPTT "token" pointer in fw_unique so that the code which builds the shared cpu masks can be reused. Cc: Palmer Dabbelt Cc: Albert Ou Signed-off-by: Jeremy Linton --- arch/riscv/kernel/cacheinfo.c | 2 +- drivers/base/cacheinfo.c | 16 +++++++++------- include/linux/cacheinfo.h | 8 +++----- 3 files changed, 13 insertions(+), 13 deletions(-) -- 2.13.5 Acked-by: Sudeep Holla diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c index 6f4500233cf8..6b0219af88d4 100644 --- a/arch/riscv/kernel/cacheinfo.c +++ b/arch/riscv/kernel/cacheinfo.c @@ -20,7 +20,7 @@ static void ci_leaf_init(struct cacheinfo *this_leaf, struct device_node *node, enum cache_type type, unsigned int level) { - this_leaf->of_node = node; + this_leaf->fw_unique = node; this_leaf->level = level; this_leaf->type = type; /* not a sector cache */ diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index fc0d42bbd9eb..217aa90fb036 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -47,7 +47,7 @@ struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu) static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf, struct cacheinfo *sib_leaf) { - return sib_leaf->of_node == this_leaf->of_node; + return sib_leaf->fw_unique == this_leaf->fw_unique; } /* OF properties to query for a given cache type */ @@ -178,9 +178,10 @@ static int cache_setup_of_node(unsigned int cpu) struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); unsigned int index = 0; - /* skip if of_node is already populated */ - if (this_cpu_ci->info_list->of_node) + /* skip if fw_unique is already populated */ + if (this_cpu_ci->info_list->fw_unique) { return 0; + } if (!cpu_dev) { pr_err("No cpu device for CPU %d\n", cpu); @@ -201,7 +202,7 @@ static int cache_setup_of_node(unsigned int cpu) if (!np) break; cache_of_set_props(this_leaf, np); - this_leaf->of_node = np; + this_leaf->fw_unique = np; index++; } @@ -289,7 +290,7 @@ static void cache_shared_cpu_map_remove(unsigned int cpu) cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map); cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map); } - of_node_put(this_leaf->of_node); + of_node_put(this_leaf->fw_unique); } } @@ -334,8 +335,9 @@ static int detect_cache_attributes(unsigned int cpu) if (ret) goto free_ci; /* - * For systems using DT for cache hierarchy, of_node and shared_cpu_map - * will be set up here only if they are not populated already + * For systems using DT for cache hierarchy, fw_unique + * and shared_cpu_map will be set up here only if they are + * not populated already */ ret = cache_shared_cpu_map_setup(cpu); if (ret) { diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h index d35299a590a4..6f2e6c87b64c 100644 --- a/include/linux/cacheinfo.h +++ b/include/linux/cacheinfo.h @@ -34,9 +34,8 @@ enum cache_type { * @shared_cpu_map: logical cpumask representing all the cpus sharing * this cache node * @attributes: bitfield representing various cache attributes - * @of_node: if devicetree is used, this represents either the cpu node in - * case there's no explicit cache node or the cache node itself in the - * device tree + * @fw_unique: Unique value used to determine if different cacheinfo + * structures represent a single hardware cache instance. * @disable_sysfs: indicates whether this node is visible to the user via * sysfs or not * @priv: pointer to any private data structure specific to particular @@ -65,8 +64,7 @@ struct cacheinfo { #define CACHE_ALLOCATE_POLICY_MASK \ (CACHE_READ_ALLOCATE | CACHE_WRITE_ALLOCATE) #define CACHE_ID BIT(4) - - struct device_node *of_node; + void *fw_unique; bool disable_sysfs; void *priv; }; From patchwork Sat Jan 13 00:59:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 124395 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp71757qgn; Fri, 12 Jan 2018 17:00:54 -0800 (PST) X-Google-Smtp-Source: ACJfBovaqRpBqGha7cNaqmW/zkLotvRcGuXw6ARtv5y1yD8VRZWXDL1zJXKiI5KVHf85GEtTTAjm X-Received: by 10.101.82.68 with SMTP id q4mr7937539pgp.385.1515805254038; Fri, 12 Jan 2018 17:00:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515805254; cv=none; d=google.com; s=arc-20160816; b=wII7U4TUQbdyUQ5SIcT32sQATUN5shI62JHz41jcCEwD+gZ7t5kYBNSl8PQWIrnq9z htEjXLMUrDUKn0+WdPvhzHV+2U2LPh5JActTytFhlYD0N06bVRrPOcmEvPdgPSQifkK0 a9+yCo29fQh+R2BqKMGTnPsclRIHQxxUPqyIYsiQuqv+Uo3QprHFaZsvruYWsftG9oSm uYsrNRTiKOZqyo83iLvE9hEu8JwbxCz5o8zqfuZOt5ojL1zZ2JUffW6CXWC/UMMWr81u Cz8KRsK7UDm9Jm+T1UwqTqK6Ho/Z6QVDpjTgVMpv+bLZbVRlJc/njHi0jdU5/puIG5+F Bd2A== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id o3si16380564pld.695.2018.01.12.17.00.53; Fri, 12 Jan 2018 17:00:54 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965503AbeAMBAu (ORCPT + 28 others); Fri, 12 Jan 2018 20:00:50 -0500 Received: from foss.arm.com ([217.140.101.70]:53824 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965443AbeAMBAq (ORCPT ); Fri, 12 Jan 2018 20:00:46 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 88726164F; Fri, 12 Jan 2018 17:00:45 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8852B3F487; Fri, 12 Jan 2018 17:00:44 -0800 (PST) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, sudeep.holla@arm.com, hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com, gregkh@linuxfoundation.org, viresh.kumar@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, jhugo@codeaurora.org, wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com, ahs3@redhat.com, Jayachandran.Nair@cavium.com, austinwc@codeaurora.org, lenb@kernel.org, vkilari@codeaurora.org, morten.rasmussen@arm.com, Jeremy Linton Subject: [PATCH v6 04/12] arm64/acpi: Create arch specific cpu to acpi id helper Date: Fri, 12 Jan 2018 18:59:12 -0600 Message-Id: <20180113005920.28658-5-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20180113005920.28658-1-jeremy.linton@arm.com> References: <20180113005920.28658-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Its helpful to be able to lookup the acpi_processor_id associated with a logical cpu. Provide an arm64 helper to do this. Signed-off-by: Jeremy Linton --- arch/arm64/include/asm/acpi.h | 4 ++++ 1 file changed, 4 insertions(+) -- 2.13.5 diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index 32f465a80e4e..0db62a4cbce2 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -86,6 +86,10 @@ static inline bool acpi_has_cpu_in_madt(void) } struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu); +static inline u32 get_acpi_id_for_cpu(unsigned int cpu) +{ + return acpi_cpu_get_madt_gicc(cpu)->uid; +} static inline void arch_fix_phys_package_id(int num, u32 slot) { } void __init acpi_init_cpus(void); From patchwork Sat Jan 13 00:59:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 124403 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp73551qgn; Fri, 12 Jan 2018 17:03:06 -0800 (PST) X-Google-Smtp-Source: ACJfBounIeuEDFujf9tGOIo3GVfldF9kOAuGMS4sKQlaK+9r2ZJszy5y+hRUj7KSYOAGjOQ/MqTy X-Received: by 10.159.202.143 with SMTP id p15mr18966556plo.397.1515805386076; Fri, 12 Jan 2018 17:03:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515805386; cv=none; d=google.com; s=arc-20160816; b=lT/Y0bODdC1T3xBIocQhfeWlccx/dftFIazgi5tJxi5gODSGqIqrmyXfre/aUi4ZIf lxJ4geniT5+id38PdKcbWvYXdTyDyex0MzmC3HwRS1Ixvnc+Czoa4P6eDItkhMunGZyt /wsHaZq4vc9XnAdsdhrEeMJS0jsxScaSw/GQBznULCLG41VDLopiszqSPkP3+R1QRutQ gE7NFzHcbJRGOoutPlRKZFmtvs1dx5iZpNyWAwD9CV1NlcVsz1eo/J1SkyGlUf1crT6o D/mTCXgMG8WDTvYG/2ZocuHzRT3LKmLBBq09qZiJx306GcAbfwGUsYFXqZJrDTimBF4S J7dA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=TDKALAgqmuZ8aNZOYaaXDfKFY+bjEaFjxWc3/htGizk=; b=BLFgVWSAYxDr1+80VpydYZzu05jpoPZv9TD8K4dCaNVEK8mHUXX5Bwyw8njjwzvR15 jSPT57GrhlnQdQQ2ZdIvmZVsmLXaUu4Gm8QsLt0LuQx36lApevdUi93C77BHt6C2hC/G YTTCdRibCvyLhyMbL7ykZP2dMqD4RYSP310wie3zIBECcOEDvIHrPqXQ4CrKfkvHIQi/ Y9/OoYGLyhNmkVttPrAw+AMKyqWZHOZUmqX2+P1KGeOwKYO84oxDESNyFDP76f7/G4zf MUeWBFtR0TfAmiF2UIR/3moj9A7TJ44iQENU6779E9fpd43R2MMiMSRD1DAsNciCkFQI mtvA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q5si16362079pll.488.2018.01.12.17.03.05; Fri, 12 Jan 2018 17:03:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965654AbeAMBDC (ORCPT + 28 others); Fri, 12 Jan 2018 20:03:02 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:53836 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965474AbeAMBAr (ORCPT ); Fri, 12 Jan 2018 20:00:47 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4A47D1650; Fri, 12 Jan 2018 17:00:47 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 534DA3F487; Fri, 12 Jan 2018 17:00:46 -0800 (PST) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, sudeep.holla@arm.com, hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com, gregkh@linuxfoundation.org, viresh.kumar@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, jhugo@codeaurora.org, wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com, ahs3@redhat.com, Jayachandran.Nair@cavium.com, austinwc@codeaurora.org, lenb@kernel.org, vkilari@codeaurora.org, morten.rasmussen@arm.com, Jeremy Linton Subject: [PATCH v6 05/12] ACPI/PPTT: Add Processor Properties Topology Table parsing Date: Fri, 12 Jan 2018 18:59:13 -0600 Message-Id: <20180113005920.28658-6-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20180113005920.28658-1-jeremy.linton@arm.com> References: <20180113005920.28658-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ACPI 6.2 adds a new table, which describes how processing units are related to each other in tree like fashion. Caches are also sprinkled throughout the tree and describe the properties of the caches in relation to other caches and processing units. Add the code to parse the cache hierarchy and report the total number of levels of cache for a given core using acpi_find_last_cache_level() as well as fill out the individual cores cache information with cache_setup_acpi() once the cpu_cacheinfo structure has been populated by the arch specific code. An additional patch later in the set adds the ability to report peers in the topology using find_acpi_cpu_topology() to report a unique ID for each processing unit at a given level in the tree. These unique id's can then be used to match related processing units which exist as threads, COD (clusters on die), within a given package, etc. Signed-off-by: Jeremy Linton --- drivers/acpi/pptt.c | 476 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 476 insertions(+) create mode 100644 drivers/acpi/pptt.c -- 2.13.5 diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c new file mode 100644 index 000000000000..2c4b3ed862a8 --- /dev/null +++ b/drivers/acpi/pptt.c @@ -0,0 +1,476 @@ +/* + * Copyright (C) 2018, ARM + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * This file implements parsing of Processor Properties Topology Table (PPTT) + * which is optionally used to describe the processor and cache topology. + * Due to the relative pointers used throughout the table, this doesn't + * leverage the existing subtable parsing in the kernel. + * + * The PPTT structure is an inverted tree, with each node potentially + * holding one or two inverted tree data structures describing + * the caches available at that level. Each cache structure optionally + * contains properties describing the cache at a given level which can be + * used to override hardware probed values. + */ +#define pr_fmt(fmt) "ACPI PPTT: " fmt + +#include +#include +#include + +/* total number of attributes checked by the properties code */ +#define PPTT_CHECKED_ATTRIBUTES 6 + +/* + * Given the PPTT table, find and verify that the subtable entry + * is located within the table + */ +static struct acpi_subtable_header *fetch_pptt_subtable( + struct acpi_table_header *table_hdr, u32 pptt_ref) +{ + struct acpi_subtable_header *entry; + + /* there isn't a subtable at reference 0 */ + if (pptt_ref < sizeof(struct acpi_subtable_header)) + return NULL; + + if (pptt_ref + sizeof(struct acpi_subtable_header) > table_hdr->length) + return NULL; + + entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr, pptt_ref); + + if (pptt_ref + entry->length > table_hdr->length) + return NULL; + + return entry; +} + +static struct acpi_pptt_processor *fetch_pptt_node( + struct acpi_table_header *table_hdr, u32 pptt_ref) +{ + return (struct acpi_pptt_processor *)fetch_pptt_subtable(table_hdr, + pptt_ref); +} + +static struct acpi_pptt_cache *fetch_pptt_cache( + struct acpi_table_header *table_hdr, u32 pptt_ref) +{ + return (struct acpi_pptt_cache *)fetch_pptt_subtable(table_hdr, + pptt_ref); +} + +static struct acpi_subtable_header *acpi_get_pptt_resource( + struct acpi_table_header *table_hdr, + struct acpi_pptt_processor *node, int resource) +{ + u32 *ref; + + if (resource >= node->number_of_priv_resources) + return NULL; + + ref = ACPI_ADD_PTR(u32, node, sizeof(struct acpi_pptt_processor)); + ref += resource; + + return fetch_pptt_subtable(table_hdr, *ref); +} + +/* + * Attempt to find a given cache level, while counting the max number + * of cache levels for the cache node. + * + * Given a pptt resource, verify that it is a cache node, then walk + * down each level of caches, counting how many levels are found + * as well as checking the cache type (icache, dcache, unified). If a + * level & type match, then we set found, and continue the search. + * Once the entire cache branch has been walked return its max + * depth. + */ +static int acpi_pptt_walk_cache(struct acpi_table_header *table_hdr, + int local_level, + struct acpi_subtable_header *res, + struct acpi_pptt_cache **found, + int level, int type) +{ + struct acpi_pptt_cache *cache; + + if (res->type != ACPI_PPTT_TYPE_CACHE) + return 0; + + cache = (struct acpi_pptt_cache *) res; + while (cache) { + local_level++; + + if ((local_level == level) && + (cache->flags & ACPI_PPTT_CACHE_TYPE_VALID) && + ((cache->attributes & ACPI_PPTT_MASK_CACHE_TYPE) == type)) { + if ((*found != NULL) && (cache != *found)) + pr_err("Found duplicate cache level/type unable to determine uniqueness\n"); + + pr_debug("Found cache @ level %d\n", level); + *found = cache; + /* + * continue looking at this node's resource list + * to verify that we don't find a duplicate + * cache node. + */ + } + cache = fetch_pptt_cache(table_hdr, cache->next_level_of_cache); + } + return local_level; +} + +/* + * Given a CPU node look for cache levels that exist at this level, and then + * for each cache node, count how many levels exist below (logically above) it. + * If a level and type are specified, and we find that level/type, abort + * processing and return the acpi_pptt_cache structure. + */ +static struct acpi_pptt_cache *acpi_find_cache_level( + struct acpi_table_header *table_hdr, + struct acpi_pptt_processor *cpu_node, + int *starting_level, int level, int type) +{ + struct acpi_subtable_header *res; + int number_of_levels = *starting_level; + int resource = 0; + struct acpi_pptt_cache *ret = NULL; + int local_level; + + /* walk down from processor node */ + while ((res = acpi_get_pptt_resource(table_hdr, cpu_node, resource))) { + resource++; + + local_level = acpi_pptt_walk_cache(table_hdr, *starting_level, + res, &ret, level, type); + /* + * we are looking for the max depth. Since its potentially + * possible for a given node to have resources with differing + * depths verify that the depth we have found is the largest. + */ + if (number_of_levels < local_level) + number_of_levels = local_level; + } + if (number_of_levels > *starting_level) + *starting_level = number_of_levels; + + return ret; +} + +/* + * Given a processor node containing a processing unit, walk into it and count + * how many levels exist solely for it, and then walk up each level until we hit + * the root node (ignore the package level because it may be possible to have + * caches that exist across packages). Count the number of cache levels that + * exist at each level on the way up. + */ +static int acpi_process_node(struct acpi_table_header *table_hdr, + struct acpi_pptt_processor *cpu_node) +{ + int total_levels = 0; + + do { + acpi_find_cache_level(table_hdr, cpu_node, &total_levels, 0, 0); + cpu_node = fetch_pptt_node(table_hdr, cpu_node->parent); + } while (cpu_node); + + return total_levels; +} + +/* + * Determine if the *node parameter is a leaf node by iterating the + * PPTT table, looking for nodes which reference it. + * Return 0 if we find a node referencing the passed node, + * or 1 if we don't. + */ +static int acpi_pptt_leaf_node(struct acpi_table_header *table_hdr, + struct acpi_pptt_processor *node) +{ + struct acpi_subtable_header *entry; + unsigned long table_end; + u32 node_entry; + struct acpi_pptt_processor *cpu_node; + + table_end = (unsigned long)table_hdr + table_hdr->length; + node_entry = ACPI_PTR_DIFF(node, table_hdr); + entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr, + sizeof(struct acpi_table_pptt)); + + while ((unsigned long)(entry + 1) < table_end) { + cpu_node = (struct acpi_pptt_processor *)entry; + if ((entry->type == ACPI_PPTT_TYPE_PROCESSOR) && + (cpu_node->parent == node_entry)) + return 0; + entry = ACPI_ADD_PTR(struct acpi_subtable_header, entry, + entry->length); + } + return 1; +} + +/* + * Find the subtable entry describing the provided processor. + * This is done by iterating the PPTT table looking for processor nodes + * which have an acpi_processor_id that matches the acpi_cpu_id parameter + * passed into the function. If we find a node that matches this criteria + * we verify that its a leaf node in the topology rather than depending + * on the valid flag, which doesn't need to be set for leaf nodes. + */ +static struct acpi_pptt_processor *acpi_find_processor_node( + struct acpi_table_header *table_hdr, + u32 acpi_cpu_id) +{ + struct acpi_subtable_header *entry; + unsigned long table_end; + struct acpi_pptt_processor *cpu_node; + + table_end = (unsigned long)table_hdr + table_hdr->length; + entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr, + sizeof(struct acpi_table_pptt)); + + /* find the processor structure associated with this cpuid */ + while ((unsigned long)(entry + 1) < table_end) { + cpu_node = (struct acpi_pptt_processor *)entry; + + if (entry->length == 0) { + pr_err("Invalid zero length subtable\n"); + break; + } + if ((entry->type == ACPI_PPTT_TYPE_PROCESSOR) && + (acpi_cpu_id == cpu_node->acpi_processor_id) && + acpi_pptt_leaf_node(table_hdr, cpu_node)) { + return (struct acpi_pptt_processor *)entry; + } + + entry = ACPI_ADD_PTR(struct acpi_subtable_header, entry, + entry->length); + } + + return NULL; +} + +static int acpi_find_cache_levels(struct acpi_table_header *table_hdr, + u32 acpi_cpu_id) +{ + int number_of_levels = 0; + struct acpi_pptt_processor *cpu; + + cpu = acpi_find_processor_node(table_hdr, acpi_cpu_id); + if (cpu) + number_of_levels = acpi_process_node(table_hdr, cpu); + + return number_of_levels; +} + +/* Convert the linux cache_type to a ACPI PPTT cache type value */ +static u8 acpi_cache_type(enum cache_type type) +{ + switch (type) { + case CACHE_TYPE_DATA: + pr_debug("Looking for data cache\n"); + return ACPI_PPTT_CACHE_TYPE_DATA; + case CACHE_TYPE_INST: + pr_debug("Looking for instruction cache\n"); + return ACPI_PPTT_CACHE_TYPE_INSTR; + default: + case CACHE_TYPE_UNIFIED: + pr_debug("Looking for unified cache\n"); + /* + * It is important that ACPI_PPTT_CACHE_TYPE_UNIFIED + * contains the bit pattern that will match both + * ACPI unified bit patterns because we use it later + * to match both cases. + */ + return ACPI_PPTT_CACHE_TYPE_UNIFIED; + } +} + +/* find the ACPI node describing the cache type/level for the given CPU */ +static struct acpi_pptt_cache *acpi_find_cache_node( + struct acpi_table_header *table_hdr, u32 acpi_cpu_id, + enum cache_type type, unsigned int level, + struct acpi_pptt_processor **node) +{ + int total_levels = 0; + struct acpi_pptt_cache *found = NULL; + struct acpi_pptt_processor *cpu_node; + u8 acpi_type = acpi_cache_type(type); + + pr_debug("Looking for CPU %d's level %d cache type %d\n", + acpi_cpu_id, level, acpi_type); + + cpu_node = acpi_find_processor_node(table_hdr, acpi_cpu_id); + + while ((cpu_node) && (!found)) { + found = acpi_find_cache_level(table_hdr, cpu_node, + &total_levels, level, acpi_type); + *node = cpu_node; + cpu_node = fetch_pptt_node(table_hdr, cpu_node->parent); + } + + return found; +} + +/* + * The ACPI spec implies that the fields in the cache structures are used to + * extend and correct the information probed from the hardware. In the case + * of arm64 the CCSIDR probing has been removed because it might be incorrect. + */ +static void update_cache_properties(struct cacheinfo *this_leaf, + struct acpi_pptt_cache *found_cache, + struct acpi_pptt_processor *cpu_node) +{ + int valid_flags = 0; + + if (found_cache->flags & ACPI_PPTT_SIZE_PROPERTY_VALID) { + this_leaf->size = found_cache->size; + valid_flags++; + } + if (found_cache->flags & ACPI_PPTT_LINE_SIZE_VALID) { + this_leaf->coherency_line_size = found_cache->line_size; + valid_flags++; + } + if (found_cache->flags & ACPI_PPTT_NUMBER_OF_SETS_VALID) { + this_leaf->number_of_sets = found_cache->number_of_sets; + valid_flags++; + } + if (found_cache->flags & ACPI_PPTT_ASSOCIATIVITY_VALID) { + this_leaf->ways_of_associativity = found_cache->associativity; + valid_flags++; + } + if (found_cache->flags & ACPI_PPTT_WRITE_POLICY_VALID) { + switch (found_cache->attributes & ACPI_PPTT_MASK_WRITE_POLICY) { + case ACPI_PPTT_CACHE_POLICY_WT: + this_leaf->attributes = CACHE_WRITE_THROUGH; + break; + case ACPI_PPTT_CACHE_POLICY_WB: + this_leaf->attributes = CACHE_WRITE_BACK; + break; + } + valid_flags++; + } + if (found_cache->flags & ACPI_PPTT_ALLOCATION_TYPE_VALID) { + switch (found_cache->attributes & ACPI_PPTT_MASK_ALLOCATION_TYPE) { + case ACPI_PPTT_CACHE_READ_ALLOCATE: + this_leaf->attributes |= CACHE_READ_ALLOCATE; + break; + case ACPI_PPTT_CACHE_WRITE_ALLOCATE: + this_leaf->attributes |= CACHE_WRITE_ALLOCATE; + break; + case ACPI_PPTT_CACHE_RW_ALLOCATE: + case ACPI_PPTT_CACHE_RW_ALLOCATE_ALT: + this_leaf->attributes |= + CACHE_READ_ALLOCATE | CACHE_WRITE_ALLOCATE; + break; + } + valid_flags++; + } + /* + * If all the above flags are valid, and the cache type is NOCACHE + * update the cache type as well. + */ + if ((this_leaf->type == CACHE_TYPE_NOCACHE) && + (valid_flags == PPTT_CHECKED_ATTRIBUTES)) + this_leaf->type = CACHE_TYPE_UNIFIED; +} + +/* + * Update the kernel cache information for each level of cache + * associated with the given acpi cpu. + */ +static void cache_setup_acpi_cpu(struct acpi_table_header *table, + unsigned int cpu) +{ + struct acpi_pptt_cache *found_cache; + struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); + u32 acpi_cpu_id = get_acpi_id_for_cpu(cpu); + struct cacheinfo *this_leaf; + unsigned int index = 0; + struct acpi_pptt_processor *cpu_node = NULL; + + while (index < get_cpu_cacheinfo(cpu)->num_leaves) { + this_leaf = this_cpu_ci->info_list + index; + found_cache = acpi_find_cache_node(table, acpi_cpu_id, + this_leaf->type, + this_leaf->level, + &cpu_node); + pr_debug("found = %p %p\n", found_cache, cpu_node); + if (found_cache) + update_cache_properties(this_leaf, + found_cache, + cpu_node); + + index++; + } +} + +/** + * acpi_find_last_cache_level() - Determines the number of cache levels for a PE + * @cpu: Kernel logical cpu number + * + * Given a logical cpu number, returns the number of levels of cache represented + * in the PPTT. Errors caused by lack of a PPTT table, or otherwise, return 0 + * indicating we didn't find any cache levels. + * + * Return: Cache levels visible to this core. + */ +int acpi_find_last_cache_level(unsigned int cpu) +{ + u32 acpi_cpu_id; + struct acpi_table_header *table; + int number_of_levels = 0; + acpi_status status; + + pr_debug("Cache Setup find last level cpu=%d\n", cpu); + + acpi_cpu_id = get_acpi_id_for_cpu(cpu); + status = acpi_get_table(ACPI_SIG_PPTT, 0, &table); + if (ACPI_FAILURE(status)) { + pr_err_once("No PPTT table found, cache topology may be inaccurate\n"); + } else { + number_of_levels = acpi_find_cache_levels(table, acpi_cpu_id); + acpi_put_table(table); + } + pr_debug("Cache Setup find last level level=%d\n", number_of_levels); + + return number_of_levels; +} + +/** + * cache_setup_acpi() - Override CPU cache topology with data from the PPTT + * @cpu: Kernel logical cpu number + * + * Updates the global cache info provided by cpu_get_cacheinfo() + * when there are valid properties in the acpi_pptt_cache nodes. A + * successful parse may not result in any updates if none of the + * cache levels have any valid flags set. Futher, a unique value is + * associated with each known CPU cache entry. This unique value + * can be used to determine whether caches are shared between cpus. + * + * Return: -ENOENT on failure to find table, or 0 on success + */ +int cache_setup_acpi(unsigned int cpu) +{ + struct acpi_table_header *table; + acpi_status status; + + pr_debug("Cache Setup ACPI cpu %d\n", cpu); + + status = acpi_get_table(ACPI_SIG_PPTT, 0, &table); + if (ACPI_FAILURE(status)) { + pr_err_once("No PPTT table found, cache topology may be inaccurate\n"); + return -ENOENT; + } + + cache_setup_acpi_cpu(table, cpu); + acpi_put_table(table); + + return status; +} From patchwork Sat Jan 13 00:59:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 124402 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp73255qgn; Fri, 12 Jan 2018 17:02:45 -0800 (PST) X-Google-Smtp-Source: ACJfBosa/70QXzQ5bSXGkaeffKJQssrHGGrvdcjxqIJOG34Euexy1c+RHXKFAR56frB3glZQ95Fd X-Received: by 10.98.63.214 with SMTP id z83mr12585194pfj.95.1515805365731; Fri, 12 Jan 2018 17:02:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515805365; cv=none; d=google.com; s=arc-20160816; b=IJNHLNhqmdcsvKEN0smO6xGifSdLgEi2jiApyrDDX8cz+N/omxN6aU15cOt2xwzZqe jYPGEhvZi1/9DKjzf1N5/aV+gHnzcOS12whgFm89GcS9horrIwldficV9J6oHFc2+VwH K7lT3u0CKIu3mSM83ZvhqjeF6LXmEkT4gCEng24z1iFvZ7y8lYZuDPOxhIdLCEi4XjCN vc+EAWE3iLKlDTOQ81lREN/j1TAW36cMmIZ7vkmM/znbOY+kr6OzDx06Up/XYPWhFgO1 aLbs292SdA1DCFcCPeu3+MsqDTUshKOR2X762ARgL5y0Rd6HimXlQRYJNdXWE4tgoVsJ H4YQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=VAH0fF1vSgRWOiYyp9RZj4EQUrEaL774t59qXlHqqyg=; b=rfx5nfRyRYND0UMY2z4PlPEzxQkXFQ8gcASG1hGyi93jtIX5F8jtQaJWWDTnIsyE9D w35JrKWaupFxKKG8nDyfYEzb36EBYKi6XmSlkRjYb9nYZRVmARuIJYiFbKq1c6bxYugZ QkJTTe1Gbf3ACOiByWo+a7nHSvk9OEuNJP2bJ2W5j0McjTu/udycO/GHm09KMxsucOxI ZAu4KcXFTOJ4Yxxo5iO7J+nzQSVgDobwTyUcoKRWkjPVa+9pKoWE336Gd1vQP5u2FJaV O2ecgdfiSqivpuSYlPdVFnEJFYi7qHt9HJDRkNRE+Ms4ybCz6kH7ORIZVnUvCptyMaMn tS2g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a13si2464456pgw.92.2018.01.12.17.02.45; Fri, 12 Jan 2018 17:02:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965644AbeAMBCn (ORCPT + 28 others); Fri, 12 Jan 2018 20:02:43 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:53858 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965477AbeAMBAt (ORCPT ); Fri, 12 Jan 2018 20:00:49 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E17351435; Fri, 12 Jan 2018 17:00:48 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E91C33F487; Fri, 12 Jan 2018 17:00:47 -0800 (PST) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, sudeep.holla@arm.com, hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com, gregkh@linuxfoundation.org, viresh.kumar@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, jhugo@codeaurora.org, wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com, ahs3@redhat.com, Jayachandran.Nair@cavium.com, austinwc@codeaurora.org, lenb@kernel.org, vkilari@codeaurora.org, morten.rasmussen@arm.com, Jeremy Linton Subject: [PATCH v6 06/12] ACPI: Enable PPTT support on ARM64 Date: Fri, 12 Jan 2018 18:59:14 -0600 Message-Id: <20180113005920.28658-7-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20180113005920.28658-1-jeremy.linton@arm.com> References: <20180113005920.28658-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that we have a PPTT parser, in preparation for its use on arm64, lets build it. Signed-off-by: Jeremy Linton --- arch/arm64/Kconfig | 1 + drivers/acpi/Kconfig | 3 +++ drivers/acpi/Makefile | 1 + 3 files changed, 5 insertions(+) -- 2.13.5 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index c9a7e9e1414f..23bf30319d31 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -7,6 +7,7 @@ config ARM64 select ACPI_REDUCED_HARDWARE_ONLY if ACPI select ACPI_MCFG if ACPI select ACPI_SPCR_TABLE if ACPI + select ACPI_PPTT if ACPI select ARCH_CLOCKSOURCE_DATA select ARCH_HAS_DEBUG_VIRTUAL select ARCH_HAS_DEVMEM_IS_ALLOWED diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index 46505396869e..df7aebf0af0e 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -545,6 +545,9 @@ config ACPI_CONFIGFS if ARM64 source "drivers/acpi/arm64/Kconfig" + +config ACPI_PPTT + bool endif config TPS68470_PMIC_OPREGION diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index 41954a601989..b6056b566df4 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -87,6 +87,7 @@ obj-$(CONFIG_ACPI_BGRT) += bgrt.o obj-$(CONFIG_ACPI_CPPC_LIB) += cppc_acpi.o obj-$(CONFIG_ACPI_SPCR_TABLE) += spcr.o obj-$(CONFIG_ACPI_DEBUGGER_USER) += acpi_dbg.o +obj-$(CONFIG_ACPI_PPTT) += pptt.o # processor has its own "processor." module_param namespace processor-y := processor_driver.o From patchwork Sat Jan 13 00:59:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 124396 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp71818qgn; Fri, 12 Jan 2018 17:00:57 -0800 (PST) X-Google-Smtp-Source: ACJfBos6xUq8+hhZtXJjAN4MF0t7+4PPouHTC2NLMLSX8EGfl+vGRF1NSvTLQ5X1apzgxStXhlGm X-Received: by 10.84.133.226 with SMTP id f89mr27486863plf.407.1515805256952; Fri, 12 Jan 2018 17:00:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515805256; cv=none; d=google.com; s=arc-20160816; b=bUpeZnUAt6QbtJd47NSwM1p9j748eifIcwMDSGHyUe6PW9+wKLFFy+eC69MFtg08GD EtaOADva/00by6xEgELP8PSy6LrfDbQtjWmxS9b9vko4jCazvh3NLBDQyhlbcIf7+nhw J+JYD/IRDz351jGF+UNIG9U7kKp/Gc12N9zejWOlPoF5b0vxW8BvH+qYJmn5zkV2qca3 BgVGKKM5ZjR0ZssoBSdA9CQaMSabjB//v7/UeMkGOK8p0FfhbrulHgP61mp4LMzs3cJk cF2jj6UYEOYPTT5aR+EDlvX/n0BaHrwnUaN/jB0aQoPVhbAjqqWktc8WE/KXHVuP0Nph WmWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=4WJ4ctztS40/WgvdffS8lR1G8Ybg0+buUC1kJGkhzfY=; b=ZeXidPwsZ1gAi5KaggvQyYuSEee6/hEYvzggslBXj+5yuegJ5AyOk4+tNd/h0DxTJd 5sFv3Nt4l4r/xucEQ3B82Y8Z/cT4A0QpjKt5FX+sjqThTv0dRrAjA2Zw83g2gvOCQXtX QA4rqR2m0+zk0EuBzjG1LmVrR/CuHkbQCFbRWr9Csq3ZvkNNKVpg5Vf1ZcnvFgJ7ev9w 5PPmvsc5/jv01dv+edGkIzrWb3qPo8POrby7iC909XKMfjBOm/jllDL39gD2b6toB4Bg rFESSec6HadELmPo8YGJjf5AGZqJ2OR7LDaVbeTVaZTxKJBcOpi6rllEkhvD5k2+w1jD ro8Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o3si16380564pld.695.2018.01.12.17.00.56; Fri, 12 Jan 2018 17:00:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965530AbeAMBAx (ORCPT + 28 others); Fri, 12 Jan 2018 20:00:53 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:53878 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965443AbeAMBAv (ORCPT ); Fri, 12 Jan 2018 20:00:51 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8173315A2; Fri, 12 Jan 2018 17:00:50 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8A5F13F487; Fri, 12 Jan 2018 17:00:49 -0800 (PST) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, sudeep.holla@arm.com, hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com, gregkh@linuxfoundation.org, viresh.kumar@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, jhugo@codeaurora.org, wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com, ahs3@redhat.com, Jayachandran.Nair@cavium.com, austinwc@codeaurora.org, lenb@kernel.org, vkilari@codeaurora.org, morten.rasmussen@arm.com, Jeremy Linton Subject: [PATCH v6 07/12] drivers: base cacheinfo: Add support for ACPI based firmware tables Date: Fri, 12 Jan 2018 18:59:15 -0600 Message-Id: <20180113005920.28658-8-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20180113005920.28658-1-jeremy.linton@arm.com> References: <20180113005920.28658-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a entry to to struct cacheinfo to maintain a reference to the PPTT node which can be used to match identical caches across cores. Also stub out cache_setup_acpi() so that individual architectures can enable ACPI topology parsing. Signed-off-by: Jeremy Linton --- drivers/acpi/pptt.c | 1 + drivers/base/cacheinfo.c | 20 +++++++++++++------- include/linux/cacheinfo.h | 9 +++++++++ 3 files changed, 23 insertions(+), 7 deletions(-) -- 2.13.5 diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c index 2c4b3ed862a8..4f5ab19c3a08 100644 --- a/drivers/acpi/pptt.c +++ b/drivers/acpi/pptt.c @@ -329,6 +329,7 @@ static void update_cache_properties(struct cacheinfo *this_leaf, { int valid_flags = 0; + this_leaf->fw_unique = cpu_node; if (found_cache->flags & ACPI_PPTT_SIZE_PROPERTY_VALID) { this_leaf->size = found_cache->size; valid_flags++; diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index 217aa90fb036..ee51e33cc37c 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -208,16 +208,16 @@ static int cache_setup_of_node(unsigned int cpu) if (index != cache_leaves(cpu)) /* not all OF nodes populated */ return -ENOENT; - return 0; } + #else static inline int cache_setup_of_node(unsigned int cpu) { return 0; } static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf, struct cacheinfo *sib_leaf) { /* - * For non-DT systems, assume unique level 1 cache, system-wide + * For non-DT/ACPI systems, assume unique level 1 caches, system-wide * shared caches for all other levels. This will be used only if * arch specific code has not populated shared_cpu_map */ @@ -225,6 +225,11 @@ static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf, } #endif +int __weak cache_setup_acpi(unsigned int cpu) +{ + return -ENOTSUPP; +} + static int cache_shared_cpu_map_setup(unsigned int cpu) { struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); @@ -235,11 +240,11 @@ static int cache_shared_cpu_map_setup(unsigned int cpu) if (this_cpu_ci->cpu_map_populated) return 0; - if (of_have_populated_dt()) + if (!acpi_disabled) + ret = cache_setup_acpi(cpu); + else if (of_have_populated_dt()) ret = cache_setup_of_node(cpu); - else if (!acpi_disabled) - /* No cache property/hierarchy support yet in ACPI */ - ret = -ENOTSUPP; + if (ret) return ret; @@ -290,7 +295,8 @@ static void cache_shared_cpu_map_remove(unsigned int cpu) cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map); cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map); } - of_node_put(this_leaf->fw_unique); + if (of_have_populated_dt()) + of_node_put(this_leaf->fw_unique); } } diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h index 6f2e6c87b64c..65b0ae30016e 100644 --- a/include/linux/cacheinfo.h +++ b/include/linux/cacheinfo.h @@ -98,6 +98,15 @@ struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu); int init_cache_level(unsigned int cpu); int populate_cache_leaves(unsigned int cpu); void cache_of_set_props(struct cacheinfo *this_leaf, struct device_node *np); +int cache_setup_acpi(unsigned int cpu); +int acpi_find_last_cache_level(unsigned int cpu); +#ifndef CONFIG_ACPI +int acpi_find_last_cache_level(unsigned int cpu) +{ + /*ACPI kernels should be built with PPTT support*/ + return 0; +} +#endif const struct attribute_group *cache_get_priv_group(struct cacheinfo *this_leaf); From patchwork Sat Jan 13 00:59:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 124401 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp72964qgn; Fri, 12 Jan 2018 17:02:21 -0800 (PST) X-Google-Smtp-Source: ACJfBov8wB1XxHsQYh/bse+26468NAGD4iZAKC9EXOkeKBbsvCNnNoYvHPQW65ET41dO6RYr/nHp X-Received: by 10.101.64.6 with SMTP id f6mr21599998pgp.58.1515805340904; Fri, 12 Jan 2018 17:02:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515805340; cv=none; d=google.com; s=arc-20160816; b=C3mw+r3Nir+9Z4JRI53KzZ9kf+921ul3cZBG8QoSJyBBHU/c1rldjejgriGbOfAAFk S+n59tPSOLWFwKCAlPU8sYL1VkV4wsc57ZVVjBWr5FVIMHMDT7OFu5UGHy39evspq2JN J4mdp157xHNZm4KQavPWrVM83fYBXkDozmC7cEm9F3VToCV3V/v7Kt2X61tBKwaokVPh YDfBLm7pzgYkDlnWeiai3RRXzCI2Zj9ei2C+wV/h2EEtdXX7DhRLOQaKESnuAZSIF3sy 5uMXiN5SH6yKpTTLar7o2UQwdZZa4yVsT0xkCvnCZYn6ZLa+I5kEZuXm3xgJ4a/Ps+vu uaRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=Jn5QzMcAOiQk3vK8+6S2qzrFf4rulolq+gsNTRBEJN4=; b=Xh3W1YTXIIBQEc+huDLct87zhc/8nUY8Dvg87XICcW1NPpu7QB8D7p+8byoncUcYez Eecb/B4Y5G3cm84STRRw52HB7knSp55Bgkbfe07tkH7XmB6gm+UGFSGPLtO/7PiTzMn4 51VhXx3PtHgvj2WAx8+Vr7q+mjm8RGlLGUOoPrAy1dtpjcbjzraF83NunQ67l1KrxFmA y1U/QN4I6ZjWimsDM3zwCOFSQqm/6KAgZHI7Jt3IoD1QXyw+EaQrICyU0e8GedfIIYrV YLteH4IZwl7Y61y/eYEVIGQyPTLOS978MWq68B6br1gOOhYoxhvJzJhSOnY8WGeB3Aa0 B7Ig== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e189si16121410pfa.409.2018.01.12.17.02.20; Fri, 12 Jan 2018 17:02:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965641AbeAMBCS (ORCPT + 28 others); Fri, 12 Jan 2018 20:02:18 -0500 Received: from foss.arm.com ([217.140.101.70]:53906 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965504AbeAMBAw (ORCPT ); Fri, 12 Jan 2018 20:00:52 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0D7E615AD; Fri, 12 Jan 2018 17:00:52 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 167493F487; Fri, 12 Jan 2018 17:00:51 -0800 (PST) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, sudeep.holla@arm.com, hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com, gregkh@linuxfoundation.org, viresh.kumar@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, jhugo@codeaurora.org, wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com, ahs3@redhat.com, Jayachandran.Nair@cavium.com, austinwc@codeaurora.org, lenb@kernel.org, vkilari@codeaurora.org, morten.rasmussen@arm.com, Jeremy Linton Subject: [PATCH v6 08/12] arm64: Add support for ACPI based firmware tables Date: Fri, 12 Jan 2018 18:59:16 -0600 Message-Id: <20180113005920.28658-9-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20180113005920.28658-1-jeremy.linton@arm.com> References: <20180113005920.28658-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The /sys cache entries should support ACPI/PPTT generated cache topology information. Lets detect ACPI systems and call an arch specific cache_setup_acpi() routine to update the hardware probed cache topology. For arm64, if ACPI is enabled, determine the max number of cache levels and populate them using the PPTT table if one is available. Signed-off-by: Jeremy Linton --- arch/arm64/kernel/cacheinfo.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) -- 2.13.5 Acked-by: Sudeep Holla diff --git a/arch/arm64/kernel/cacheinfo.c b/arch/arm64/kernel/cacheinfo.c index 380f2e2fbed5..0bf0a835122f 100644 --- a/arch/arm64/kernel/cacheinfo.c +++ b/arch/arm64/kernel/cacheinfo.c @@ -17,6 +17,7 @@ * along with this program. If not, see . */ +#include #include #include @@ -46,7 +47,7 @@ static void ci_leaf_init(struct cacheinfo *this_leaf, static int __init_cache_level(unsigned int cpu) { - unsigned int ctype, level, leaves, of_level; + unsigned int ctype, level, leaves, fw_level; struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); for (level = 1, leaves = 0; level <= MAX_CACHE_LEVEL; level++) { @@ -59,15 +60,19 @@ static int __init_cache_level(unsigned int cpu) leaves += (ctype == CACHE_TYPE_SEPARATE) ? 2 : 1; } - of_level = of_find_last_cache_level(cpu); - if (level < of_level) { + if (acpi_disabled) + fw_level = of_find_last_cache_level(cpu); + else + fw_level = acpi_find_last_cache_level(cpu); + + if (level < fw_level) { /* * some external caches not specified in CLIDR_EL1 * the information may be available in the device tree * only unified external caches are considered here */ - leaves += (of_level - level); - level = of_level; + leaves += (fw_level - level); + level = fw_level; } this_cpu_ci->num_levels = level; From patchwork Sat Jan 13 00:59:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 124397 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp71882qgn; Fri, 12 Jan 2018 17:01:00 -0800 (PST) X-Google-Smtp-Source: ACJfBos6WlVRaPQGZkI0QSpYHp/S8HczshZUlwDcnAlva7OcDzXDHvKxKzSR1T3qOPHePPrVXgAN X-Received: by 10.84.240.12 with SMTP id y12mr27459144plk.382.1515805260839; Fri, 12 Jan 2018 17:01:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515805260; cv=none; d=google.com; s=arc-20160816; b=qLsb3j1W57zMYRb17h7kQO+BFI7dairZCZPD9PhS5ZYQsHRS9pbK/S9Kk+2xr9Wpto UeL983rOPVe4xpOhpjwW5SI/3kw+p5lvc/PF9yGl+z+aJE5Yt0vgUqy9GjRTQL4BcnUA OKKdpgBbPErrutJ5Szy/ckqqvXsnNscqGgT+8VZ/y8IP0Nb1N6qJUe1x7BGP+tFdbwm5 aWc8OBrebYwZ9CnQOu05lvw1Zhd1+1w+kcmhmmANe5TFZnfIbCp07vMs3doONOM0iKb2 joJv27syHLPLoRGWZpFnCM/lCOfN/187uMxbpG6yJWN5ktStbanuamjzhRQScpwtP7jQ Kpdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=7RJuWeiCjhqkFbnVAVXnxUpFG0CWw8INrIjIGZoSp/c=; b=u12CmJ4yov5xIv60fb6oaZJD9KAY56oxdT1cwSFaIYHiVkj5cgCQ4DNIEazOmMZQl8 og1kCYZ2Yczz+LvFkh9CnfvOa7rQlVlEmiROF3vE11/mXqUAfmzWptVW3duR5IazSyqA 4bS1YKsWTjAqRHLLU1KEZ8HoYMhRUS2Ol7NNZqis03kQ/iML9COaOD1eg2I/05F1yDl5 RN1lrR1XQL/8wZa8fXbXCtNcd7nSMj49uZTPuKq7uE0cnoKsV/M/hnvoqd3z5SB/zME+ 96ZmqMFFX6h39ZWKw1bZfmtxH871m8PqKHh7CcNz9uDo7MG8hLIh3SDVxGQgOoi4Nw4b c4xQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v85si3309345pgb.353.2018.01.12.17.01.00; Fri, 12 Jan 2018 17:01:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965554AbeAMBA4 (ORCPT + 28 others); Fri, 12 Jan 2018 20:00:56 -0500 Received: from foss.arm.com ([217.140.101.70]:53922 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965523AbeAMBAy (ORCPT ); Fri, 12 Jan 2018 20:00:54 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8498D1610; Fri, 12 Jan 2018 17:00:53 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8DAC93F487; Fri, 12 Jan 2018 17:00:52 -0800 (PST) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, sudeep.holla@arm.com, hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com, gregkh@linuxfoundation.org, viresh.kumar@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, jhugo@codeaurora.org, wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com, ahs3@redhat.com, Jayachandran.Nair@cavium.com, austinwc@codeaurora.org, lenb@kernel.org, vkilari@codeaurora.org, morten.rasmussen@arm.com, Jeremy Linton Subject: [PATCH v6 09/12] ACPI/PPTT: Add topology parsing code Date: Fri, 12 Jan 2018 18:59:17 -0600 Message-Id: <20180113005920.28658-10-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20180113005920.28658-1-jeremy.linton@arm.com> References: <20180113005920.28658-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The PPTT can be used to determine the groupings of CPU's at given levels in the system. Lets add a few routines to the PPTT parsing code to return a unique id for each unique level in the processor hierarchy. This can then be matched to build thread/core/cluster/die/package/etc mappings for each processing element in the system. Signed-off-by: Jeremy Linton --- drivers/acpi/pptt.c | 115 +++++++++++++++++++++++++++++++++++++++++++++++++++ include/linux/acpi.h | 3 ++ 2 files changed, 118 insertions(+) -- 2.13.5 diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c index 4f5ab19c3a08..83d89d683f16 100644 --- a/drivers/acpi/pptt.c +++ b/drivers/acpi/pptt.c @@ -412,6 +412,79 @@ static void cache_setup_acpi_cpu(struct acpi_table_header *table, } } +/* Passing level values greater than this will result in search termination */ +#define PPTT_ABORT_PACKAGE 0xFF + +/* + * Given an acpi_pptt_processor node, walk up until we identify the + * package that the node is associated with, or we run out of levels + * to request or the search is terminated with a flag match + * The level parameter also serves to limit possible loops within the tree. + */ +static struct acpi_pptt_processor *acpi_find_processor_package_id( + struct acpi_table_header *table_hdr, + struct acpi_pptt_processor *cpu, + int level, int flag) +{ + struct acpi_pptt_processor *prev_node; + + while (cpu && level) { + if (cpu->flags & flag) + break; + pr_debug("level %d\n", level); + prev_node = fetch_pptt_node(table_hdr, cpu->parent); + if (prev_node == NULL) + break; + cpu = prev_node; + level--; + } + return cpu; +} + +/* + * Get a unique value given a cpu, and a topology level, that can be + * matched to determine which cpus share common topological features + * at that level. + */ +static int topology_get_acpi_cpu_tag(struct acpi_table_header *table, + unsigned int cpu, int level, int flag) +{ + struct acpi_pptt_processor *cpu_node; + u32 acpi_cpu_id = get_acpi_id_for_cpu(cpu); + + cpu_node = acpi_find_processor_node(table, acpi_cpu_id); + if (cpu_node) { + cpu_node = acpi_find_processor_package_id(table, cpu_node, + level, flag); + /* Only the first level has a guaranteed id */ + if (level == 0) + return cpu_node->acpi_processor_id; + return (int)((u8 *)cpu_node - (u8 *)table); + } + pr_err_once("PPTT table found, but unable to locate core for %d\n", + cpu); + return -ENOENT; +} + +static int find_acpi_cpu_topology_tag(unsigned int cpu, int level, int flag) +{ + struct acpi_table_header *table; + acpi_status status; + int retval; + + status = acpi_get_table(ACPI_SIG_PPTT, 0, &table); + if (ACPI_FAILURE(status)) { + pr_err_once("No PPTT table found, cpu topology may be inaccurate\n"); + return -ENOENT; + } + retval = topology_get_acpi_cpu_tag(table, cpu, level, flag); + pr_debug("Topology Setup ACPI cpu %d, level %d ret = %d\n", + cpu, level, retval); + acpi_put_table(table); + + return retval; +} + /** * acpi_find_last_cache_level() - Determines the number of cache levels for a PE * @cpu: Kernel logical cpu number @@ -475,3 +548,45 @@ int cache_setup_acpi(unsigned int cpu) return status; } + +/** + * find_acpi_cpu_topology() - Determine a unique topology value for a given cpu + * @cpu: Kernel logical cpu number + * @level: The topological level for which we would like a unique ID + * + * Determine a topology unique ID for each thread/core/cluster/mc_grouping + * /socket/etc. This ID can then be used to group peers, which will have + * matching ids. + * + * The search terminates when either the requested level is found or + * we reach a root node. Levels beyond the termination point will return the + * same unique ID. The unique id for level 0 is the acpi processor id. All + * other levels beyond this use a generated value to uniquely identify + * a topological feature. + * + * Return: -ENOENT if the PPTT doesn't exist, or the cpu cannot be found. + * Otherwise returns a value which represents a unique topological feature. + */ +int find_acpi_cpu_topology(unsigned int cpu, int level) +{ + return find_acpi_cpu_topology_tag(cpu, level, 0); +} + +/** + * find_acpi_cpu_topology_package() - Determine a unique cpu package value + * @cpu: Kernel logical cpu number + * + * Determine a topology unique package ID for the given cpu. + * This ID can then be used to group peers, which will have matching ids. + * + * The search terminates when either a level is found with the PHYSICAL_PACKAGE + * flag set or we reach a root node. + * + * Return: -ENOENT if the PPTT doesn't exist, or the cpu cannot be found. + * Otherwise returns a value which represents the package for this cpu. + */ +int find_acpi_cpu_topology_package(unsigned int cpu) +{ + return find_acpi_cpu_topology_tag(cpu, PPTT_ABORT_PACKAGE, + ACPI_PPTT_PHYSICAL_PACKAGE); +} diff --git a/include/linux/acpi.h b/include/linux/acpi.h index dc1ebfeeb5ec..117d13934487 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -1266,4 +1266,7 @@ static inline int lpit_read_residency_count_address(u64 *address) } #endif +int find_acpi_cpu_topology(unsigned int cpu, int level); +int find_acpi_cpu_topology_package(unsigned int cpu); + #endif /*_LINUX_ACPI_H*/ From patchwork Sat Jan 13 00:59:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 124400 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp72602qgn; Fri, 12 Jan 2018 17:01:52 -0800 (PST) X-Google-Smtp-Source: ACJfBov54Dy76mFGWs5OsACO86kfqdTzkvR2GrIkwp9Ji65HDBSthFTBv4KjyieNAZTsJh3IXdaR X-Received: by 10.98.200.153 with SMTP id i25mr19781755pfk.241.1515805312153; Fri, 12 Jan 2018 17:01:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515805312; cv=none; d=google.com; s=arc-20160816; b=PCdDlWckwHZS7SgzEzKVUtLXSXtorhv1dJZQQPszUJGnxU7lyMFjHDplUr+JahUbk3 RhHPM3DMnAkqv+WunXEc74dCARvAhi1dM1+zYnPcOXwRpjiwQwJHP6eh4YT6KYTF5iRe K9Mx+9xcL0H6UDftxcqZDVgDXlfsW3jU1XGiY2XxU9jznwwGBmba4N2nxR9b/F2GGGPg H9G57GiKFdIv2iQtRIpWviDTUbU2iJub7YRk3g2BWfGCe5CgWTc7lZ9qbHmScloUzF2i 7rMaiRA3eMNob03/aYx7kBp3duStogw2lRn7ZfsFcTf1etTG5Z3bu5uPGnBdZ5dpJLNf 8w2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=i/sWc70Bqma7mhuhdTpaSLV8kEGJ83xP6B036Bbd3QA=; b=WwNjvh1YI4IVNwE5g4IlIjZxc4lS0vq5L0hcGnoFk+eL7mvfp3cPvpuOkrpg1IcqOr BvmqEXpr0jXrwQVXBG96PFYAhujQ5ZmCHGq9p6Rh0mTXqSQGGAZac/hAZbVHoeWs/kqL YK09vDHveGyFRtyZZE1Q1XPcWQNH7aaTBxvGUe/FKQdtEJrdWKQRuLRzu8CbKFfVglOc AO6oah1sl8t14r9k9FgeBbnEbDxTecDIsrvhJ0ejdI86pVvR+VATfNqo4AwTUXkdQ30o PuM2Ded7/hNzDrUW1A7Ay8S456iepXCgPOfIz+rw6Nr1geqVIyJu11Dx0y1u7py7vM3w gZZw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q3si860637pll.231.2018.01.12.17.01.51; Fri, 12 Jan 2018 17:01:52 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965624AbeAMBBu (ORCPT + 28 others); Fri, 12 Jan 2018 20:01:50 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:53936 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965443AbeAMBAz (ORCPT ); Fri, 12 Jan 2018 20:00:55 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 22A6B165C; Fri, 12 Jan 2018 17:00:55 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 1099C3F487; Fri, 12 Jan 2018 17:00:54 -0800 (PST) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, sudeep.holla@arm.com, hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com, gregkh@linuxfoundation.org, viresh.kumar@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, jhugo@codeaurora.org, wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com, ahs3@redhat.com, Jayachandran.Nair@cavium.com, austinwc@codeaurora.org, lenb@kernel.org, vkilari@codeaurora.org, morten.rasmussen@arm.com, Jeremy Linton , Vincent Guittot , Dietmar Eggemann , Juri Lelli Subject: [PATCH v6 10/12] arm64: topology: rename cluster_id Date: Fri, 12 Jan 2018 18:59:18 -0600 Message-Id: <20180113005920.28658-11-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20180113005920.28658-1-jeremy.linton@arm.com> References: <20180113005920.28658-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Lets match the name of the arm64 topology field to the kernel macro that uses it. Cc: Vincent Guittot Cc: Dietmar Eggemann Cc: Juri Lelli Signed-off-by: Jeremy Linton --- arch/arm64/include/asm/topology.h | 4 ++-- arch/arm64/kernel/topology.c | 27 ++++++++++++++------------- 2 files changed, 16 insertions(+), 15 deletions(-) -- 2.13.5 diff --git a/arch/arm64/include/asm/topology.h b/arch/arm64/include/asm/topology.h index c4f2d50491eb..6b10459e6905 100644 --- a/arch/arm64/include/asm/topology.h +++ b/arch/arm64/include/asm/topology.h @@ -7,14 +7,14 @@ struct cpu_topology { int thread_id; int core_id; - int cluster_id; + int package_id; cpumask_t thread_sibling; cpumask_t core_sibling; }; extern struct cpu_topology cpu_topology[NR_CPUS]; -#define topology_physical_package_id(cpu) (cpu_topology[cpu].cluster_id) +#define topology_physical_package_id(cpu) (cpu_topology[cpu].package_id) #define topology_core_id(cpu) (cpu_topology[cpu].core_id) #define topology_core_cpumask(cpu) (&cpu_topology[cpu].core_sibling) #define topology_sibling_cpumask(cpu) (&cpu_topology[cpu].thread_sibling) diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c index 8d48b233e6ce..7b06e263fdd1 100644 --- a/arch/arm64/kernel/topology.c +++ b/arch/arm64/kernel/topology.c @@ -51,7 +51,7 @@ static int __init get_cpu_for_node(struct device_node *node) return -1; } -static int __init parse_core(struct device_node *core, int cluster_id, +static int __init parse_core(struct device_node *core, int package_id, int core_id) { char name[10]; @@ -67,7 +67,7 @@ static int __init parse_core(struct device_node *core, int cluster_id, leaf = false; cpu = get_cpu_for_node(t); if (cpu >= 0) { - cpu_topology[cpu].cluster_id = cluster_id; + cpu_topology[cpu].package_id = package_id; cpu_topology[cpu].core_id = core_id; cpu_topology[cpu].thread_id = i; } else { @@ -89,7 +89,7 @@ static int __init parse_core(struct device_node *core, int cluster_id, return -EINVAL; } - cpu_topology[cpu].cluster_id = cluster_id; + cpu_topology[cpu].package_id = package_id; cpu_topology[cpu].core_id = core_id; } else if (leaf) { pr_err("%pOF: Can't get CPU for leaf core\n", core); @@ -105,7 +105,7 @@ static int __init parse_cluster(struct device_node *cluster, int depth) bool leaf = true; bool has_cores = false; struct device_node *c; - static int cluster_id __initdata; + static int package_id __initdata; int core_id = 0; int i, ret; @@ -144,7 +144,7 @@ static int __init parse_cluster(struct device_node *cluster, int depth) } if (leaf) { - ret = parse_core(c, cluster_id, core_id++); + ret = parse_core(c, package_id, core_id++); } else { pr_err("%pOF: Non-leaf cluster with core %s\n", cluster, name); @@ -162,7 +162,7 @@ static int __init parse_cluster(struct device_node *cluster, int depth) pr_warn("%pOF: empty cluster\n", cluster); if (leaf) - cluster_id++; + package_id++; return 0; } @@ -198,7 +198,7 @@ static int __init parse_dt_topology(void) * only mark cores described in the DT as possible. */ for_each_possible_cpu(cpu) - if (cpu_topology[cpu].cluster_id == -1) + if (cpu_topology[cpu].package_id == -1) ret = -EINVAL; out_map: @@ -228,7 +228,7 @@ static void update_siblings_masks(unsigned int cpuid) for_each_possible_cpu(cpu) { cpu_topo = &cpu_topology[cpu]; - if (cpuid_topo->cluster_id != cpu_topo->cluster_id) + if (cpuid_topo->package_id != cpu_topo->package_id) continue; cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); @@ -249,7 +249,7 @@ void store_cpu_topology(unsigned int cpuid) struct cpu_topology *cpuid_topo = &cpu_topology[cpuid]; u64 mpidr; - if (cpuid_topo->cluster_id != -1) + if (cpuid_topo->package_id != -1) goto topology_populated; mpidr = read_cpuid_mpidr(); @@ -263,19 +263,19 @@ void store_cpu_topology(unsigned int cpuid) /* Multiprocessor system : Multi-threads per core */ cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); - cpuid_topo->cluster_id = MPIDR_AFFINITY_LEVEL(mpidr, 2) | + cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 2) | MPIDR_AFFINITY_LEVEL(mpidr, 3) << 8; } else { /* Multiprocessor system : Single-thread per core */ cpuid_topo->thread_id = -1; cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); - cpuid_topo->cluster_id = MPIDR_AFFINITY_LEVEL(mpidr, 1) | + cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 1) | MPIDR_AFFINITY_LEVEL(mpidr, 2) << 8 | MPIDR_AFFINITY_LEVEL(mpidr, 3) << 16; } pr_debug("CPU%u: cluster %d core %d thread %d mpidr %#016llx\n", - cpuid, cpuid_topo->cluster_id, cpuid_topo->core_id, + cpuid, cpuid_topo->package_id, cpuid_topo->core_id, cpuid_topo->thread_id, mpidr); topology_populated: @@ -291,7 +291,7 @@ static void __init reset_cpu_topology(void) cpu_topo->thread_id = -1; cpu_topo->core_id = 0; - cpu_topo->cluster_id = -1; + cpu_topo->package_id = -1; cpumask_clear(&cpu_topo->core_sibling); cpumask_set_cpu(cpu, &cpu_topo->core_sibling); @@ -300,6 +300,7 @@ static void __init reset_cpu_topology(void) } } + void __init init_cpu_topology(void) { reset_cpu_topology(); From patchwork Sat Jan 13 00:59:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 124398 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp71913qgn; Fri, 12 Jan 2018 17:01:02 -0800 (PST) X-Google-Smtp-Source: ACJfBotrpZx2vbsnkMW6Gs39HELR8a2B/dTPX3IWeYsXkMVWH3E1CNjpPNaUafJ1yVAyKdlQ7WXB X-Received: by 10.84.136.36 with SMTP id 33mr11062076plk.157.1515805262189; Fri, 12 Jan 2018 17:01:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515805262; cv=none; d=google.com; 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[209.132.180.67]) by mx.google.com with ESMTP id v85si3309345pgb.353.2018.01.12.17.01.01; Fri, 12 Jan 2018 17:01:02 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965578AbeAMBA7 (ORCPT + 28 others); Fri, 12 Jan 2018 20:00:59 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:53962 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965523AbeAMBA5 (ORCPT ); Fri, 12 Jan 2018 20:00:57 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AC569165D; Fri, 12 Jan 2018 17:00:56 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id AC8E03F487; Fri, 12 Jan 2018 17:00:55 -0800 (PST) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, sudeep.holla@arm.com, hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com, gregkh@linuxfoundation.org, viresh.kumar@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, jhugo@codeaurora.org, wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com, ahs3@redhat.com, Jayachandran.Nair@cavium.com, austinwc@codeaurora.org, lenb@kernel.org, vkilari@codeaurora.org, morten.rasmussen@arm.com, Jeremy Linton , Juri Lelli Subject: [PATCH v6 11/12] arm64: topology: enable ACPI/PPTT based CPU topology Date: Fri, 12 Jan 2018 18:59:19 -0600 Message-Id: <20180113005920.28658-12-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20180113005920.28658-1-jeremy.linton@arm.com> References: <20180113005920.28658-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Propagate the topology information from the PPTT tree to the cpu_topology array. We can get the thread id, core_id and cluster_id by assuming certain levels of the PPTT tree correspond to those concepts. The package_id is flagged in the tree and can be found by calling find_acpi_cpu_topology_package() which terminates its search when it finds an ACPI node flagged as the physical package. If the tree doesn't contain enough levels to represent all of the requested levels then the root node will be returned for all subsequent levels. Cc: Juri Lelli Signed-off-by: Jeremy Linton --- arch/arm64/kernel/topology.c | 46 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 45 insertions(+), 1 deletion(-) -- 2.13.5 diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c index 7b06e263fdd1..ce8ec7fd6b32 100644 --- a/arch/arm64/kernel/topology.c +++ b/arch/arm64/kernel/topology.c @@ -11,6 +11,7 @@ * for more details. */ +#include #include #include #include @@ -22,6 +23,7 @@ #include #include #include +#include #include #include @@ -300,6 +302,46 @@ static void __init reset_cpu_topology(void) } } +#ifdef CONFIG_ACPI +/* + * Propagate the topology information of the processor_topology_node tree to the + * cpu_topology array. + */ +static int __init parse_acpi_topology(void) +{ + bool is_threaded; + int cpu, topology_id; + + is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK; + + for_each_possible_cpu(cpu) { + topology_id = find_acpi_cpu_topology(cpu, 0); + if (topology_id < 0) + return topology_id; + + if (is_threaded) { + cpu_topology[cpu].thread_id = topology_id; + topology_id = find_acpi_cpu_topology(cpu, 1); + cpu_topology[cpu].core_id = topology_id; + topology_id = find_acpi_cpu_topology_package(cpu); + cpu_topology[cpu].package_id = topology_id; + } else { + cpu_topology[cpu].thread_id = -1; + cpu_topology[cpu].core_id = topology_id; + topology_id = find_acpi_cpu_topology_package(cpu); + cpu_topology[cpu].package_id = topology_id; + } + } + + return 0; +} + +#else +static inline int __init parse_acpi_topology(void) +{ + return -EINVAL; +} +#endif void __init init_cpu_topology(void) { @@ -309,6 +351,8 @@ void __init init_cpu_topology(void) * Discard anything that was parsed if we hit an error so we * don't use partial information. */ - if (of_have_populated_dt() && parse_dt_topology()) + if ((!acpi_disabled) && parse_acpi_topology()) + reset_cpu_topology(); + else if (of_have_populated_dt() && parse_dt_topology()) reset_cpu_topology(); } From patchwork Sat Jan 13 00:59:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 124399 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp72051qgn; Fri, 12 Jan 2018 17:01:13 -0800 (PST) X-Google-Smtp-Source: ACJfBotHXFKIMYJDulFSgUPzNNhrl6xgK5XELCo4jeoQqvO879jpFRdQf/4T+bv2N4Hp1OKQl94g X-Received: by 10.99.172.86 with SMTP id z22mr14342307pgn.227.1515805273055; Fri, 12 Jan 2018 17:01:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515805273; cv=none; d=google.com; s=arc-20160816; b=Un4rupJ3hiQS1wnmlX0X+9u6RfkHE8WEeZSjjyxoEvRtmdKl5Bfcl+wfFUIY87upRD c+363RQV/t5ZYJHHl/X8AnJp9wpk4SwgNTj/KxKHC0XxZuQE/+OqlFQiem8FqVa7RFaz 2QQVz+z2guMacypzjKng549xSX2Hz44AfqD1jPSFi6pgnV8uZIn2Ynwft4qnDvt/sosw UFmYGG1C2JS1BA70bjOA+/8CpX2/IYiU0ZT9ixpJcUUlI+CLE/ziE9mTuks9Qow9VHI5 asSqyHsV56wDMH6tDsX1A8dtn9m4L10zhjWcwSXdNvVeLkon4adzoPxL7os+zWBFv4xk sBKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=H6arYo+q20MTgpvDcAB6MzxUA58BSwUfjErHomWl87M=; b=GtCnfikDu+2ZOVzY2YCZ0cO7vcGu16Y9XbqrHRsH5hCNAFmldt1or3trm2vJmMzxY8 lqgnCbisEesI/vMsZSSMAUGh0UmsSDWiomEKB9hIY+LyvYmYoBhTa46/44tBVrw0UPHv tYbpLBW/7bcerAAUE0S7dyAlQHlok3gBS8aQ1tYpoXx4/OKTkKE5JzzVGkCLzSTAOxfs ayBlMRhJFxEx6G/5TqqwDHJQn1ol+QSz3psa/fT+/a2PAN/jaUuR4Ar5zz9yZq28SJzs p6j6feRM4w7VMToNEZoVfHCH9oWTtoVSRt/jZqr+1bHxzBUSf9cBDiCwlRif3MnICWJm cZ1w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b91si893570plb.232.2018.01.12.17.01.12; Fri, 12 Jan 2018 17:01:13 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965596AbeAMBBL (ORCPT + 28 others); Fri, 12 Jan 2018 20:01:11 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:53976 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965560AbeAMBA7 (ORCPT ); Fri, 12 Jan 2018 20:00:59 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B16AC1682; Fri, 12 Jan 2018 17:00:58 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A85203F487; Fri, 12 Jan 2018 17:00:57 -0800 (PST) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, sudeep.holla@arm.com, hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com, gregkh@linuxfoundation.org, viresh.kumar@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, jhugo@codeaurora.org, wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com, ahs3@redhat.com, Jayachandran.Nair@cavium.com, austinwc@codeaurora.org, lenb@kernel.org, vkilari@codeaurora.org, morten.rasmussen@arm.com, Jeremy Linton , Geoffrey Blake Subject: [PATCH v6 12/12] ACPI: Add PPTT to injectable table list Date: Fri, 12 Jan 2018 18:59:20 -0600 Message-Id: <20180113005920.28658-13-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20180113005920.28658-1-jeremy.linton@arm.com> References: <20180113005920.28658-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add ACPI_SIG_PPTT to the table so initrd's can override the system topology. Signed-off-by: Geoffrey Blake Signed-off-by: Jeremy Linton --- drivers/acpi/tables.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.13.5 diff --git a/drivers/acpi/tables.c b/drivers/acpi/tables.c index 80ce2a7d224b..6d254450115b 100644 --- a/drivers/acpi/tables.c +++ b/drivers/acpi/tables.c @@ -456,7 +456,8 @@ static const char * const table_sigs[] = { ACPI_SIG_SLIC, ACPI_SIG_SPCR, ACPI_SIG_SPMI, ACPI_SIG_TCPA, ACPI_SIG_UEFI, ACPI_SIG_WAET, ACPI_SIG_WDAT, ACPI_SIG_WDDT, ACPI_SIG_WDRT, ACPI_SIG_DSDT, ACPI_SIG_FADT, ACPI_SIG_PSDT, - ACPI_SIG_RSDT, ACPI_SIG_XSDT, ACPI_SIG_SSDT, NULL }; + ACPI_SIG_RSDT, ACPI_SIG_XSDT, ACPI_SIG_SSDT, ACPI_SIG_PPTT, + NULL }; #define ACPI_HEADER_SIZE sizeof(struct acpi_table_header)