From patchwork Thu Dec 3 12:02:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 336933 Delivered-To: patch@linaro.org Received: by 2002:a92:5e16:0:0:0:0:0 with SMTP id s22csp232764ilb; Thu, 3 Dec 2020 04:04:10 -0800 (PST) X-Google-Smtp-Source: ABdhPJw41wLYiiRay4yb7CRnSxJd7iKyVi1zBHUJ1ml7Na5XPLv2oCdrT/dbTu/ECVvjnN+uJOg3 X-Received: by 2002:a17:906:25e:: with SMTP id 30mr2133757ejl.544.1606997050281; Thu, 03 Dec 2020 04:04:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1606997050; cv=none; d=google.com; s=arc-20160816; b=v4L8JlTAmF4DV0Qsx6lt57XWX1F0SoCghrq+SuQIGBPdLIuOg9HI8bF9X4ZsWAn2hE eanY2+i1/RUbRyNxBakjIqUjd1lR8qMPtQ3fJ0oK03hYWCqQUbAx+BjBgN4Wadsg2RJ+ dw9OcrhIrvN7q+IcSLoo8x6/NF8M+mjYtKa6We3iH3OPnrmpO5WPtRwr7Hn/uguKNZCu 4aza4XACrV3GHabIgcp3WQs6ptNjETR4CyaLC8Cxdw5wUQ0ttilDyTxuWP8dcs5DP3Um yG3ntAh28k+Ggu9pLJ08CiItQmwKLNjmQ8bSeYm2UvPuFD3+JhuCICtKTKY2h/0c+V0b gd4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=aC9csOiAJHx7sjNYuIuLQFPHwUFntB6TJc/eyhWOdXM=; b=wdM/Z2PAF9LgmRfLG6Y57gwtwyNml3VJNvZwoURIOEm2oi0S02EAEjOlRD81+heXMQ NgzKxtf5Lh54b9CWIvPbRpjXpj8pR6cloQpp56QXPVfF8/XdAnOAXG5vEmIXRakAUjDK KhRArNsEAtRER2lQt3wwMuu7itOJr184NU3dwr9CeRe/02X3DZm07r0EecD5mrVAJ3wo 7Cq3CbyxNd3NjFiUnV5KvW3Bj6aUJvUPilsB2RDBlUwdl/u18z6I653GPgH8bnfxkhH3 nAVCVAUFTbHwQ+W9RjpMXyI7yLCquZnXDmFLDHqjHof2cocBOgKwkoQgJQCD3oNmAvet hKHQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id mj1si1034695ejb.54.2020.12.03.04.04.10; Thu, 03 Dec 2020 04:04:10 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728904AbgLCMD7 (ORCPT + 6 others); Thu, 3 Dec 2020 07:03:59 -0500 Received: from szxga07-in.huawei.com ([45.249.212.35]:8929 "EHLO szxga07-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729035AbgLCMD7 (ORCPT ); Thu, 3 Dec 2020 07:03:59 -0500 Received: from DGGEMS407-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4CmvbR5rJ2z785t; Thu, 3 Dec 2020 20:02:27 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.9) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.487.0; Thu, 3 Dec 2020 20:02:43 +0800 From: Zhen Lei To: Philipp Zabel , Wei Xu , "Rob Herring" , linux-arm-kernel , devicetree , linux-kernel CC: Zhen Lei , Zhangfei Gao , Chen Feng , "Manivannan Sadhasivam" Subject: [PATCH 1/4] reset: hisilicon: correct vendor prefix Date: Thu, 3 Dec 2020 20:02:09 +0800 Message-ID: <20201203120212.1105-2-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201203120212.1105-1-thunder.leizhen@huawei.com> References: <20201203120212.1105-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.9] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The vendor prefix of "Hisilicon Limited" is "hisilicon", it is clearly stated in "vendor-prefixes.yaml". Fixes: 1527058736fa ("reset: hisilicon: add reset-hi3660") Signed-off-by: Zhen Lei Cc: Zhangfei Gao --- drivers/reset/hisilicon/reset-hi3660.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.8.3 diff --git a/drivers/reset/hisilicon/reset-hi3660.c b/drivers/reset/hisilicon/reset-hi3660.c index a7d4445924e558c..8f1953159a65b31 100644 --- a/drivers/reset/hisilicon/reset-hi3660.c +++ b/drivers/reset/hisilicon/reset-hi3660.c @@ -83,7 +83,7 @@ static int hi3660_reset_probe(struct platform_device *pdev) if (!rc) return -ENOMEM; - rc->map = syscon_regmap_lookup_by_phandle(np, "hisi,rst-syscon"); + rc->map = syscon_regmap_lookup_by_phandle(np, "hisilicon,rst-syscon"); if (IS_ERR(rc->map)) { dev_err(dev, "failed to get hi3660,rst-syscon\n"); return PTR_ERR(rc->map); From patchwork Thu Dec 3 12:02:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 336932 Delivered-To: patch@linaro.org Received: by 2002:a92:5e16:0:0:0:0:0 with SMTP id s22csp232747ilb; Thu, 3 Dec 2020 04:04:09 -0800 (PST) X-Google-Smtp-Source: ABdhPJyL2jNyyMKRq0Xa8sOZLziAvDGl6pawGEEfRLU/y+pMyIAgY7YRQwT9rlbS2PA92QVTG3Vb X-Received: by 2002:a17:906:cecd:: with SMTP id si13mr75789ejb.441.1606997049451; Thu, 03 Dec 2020 04:04:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1606997049; cv=none; d=google.com; s=arc-20160816; b=s+Xf1eC6aZlF8UFJ8AkeeWNmgDELzakvSM2mKXt1EgheF2marzkD9L1chwZnepEQT9 qs7x/QBjgPSMiIYoekanrDlLkddCOdEI/St6ETkAL7NkIpffNyBYUsz57f+UNwCbwMoH JuJ/W6MZ/Q/41v8KLG/J5z/PUtuSt6LA5W0+CxJoR9Rh5k2zLgvmIZ+3mYVtN68NjHHr aGp+oflwR3w2GPbfutXF3PBnvR67ZXAbUyuibClbiVOCYOXaGtnlZReFOcKtORJneMSA BXln1JcO2JvD07gPxbAOC2HjeTX/ZZ5Eo1nehmcHnpIQurulunGRgQuBh88MdcdvzOFB M6AA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=epkydfdfqreN/nkFvLIQRqu/sHuaiglc7nVJIZ4MZb4=; b=m11USa4NFDJr07yCSTlHl60v/4v7TQT3td4M2JdidU9hCrgW9UUUAQ5rmYYwBp7Nvo dBKsJTGq50xlUd1MNwIJgPabjmw1L9U75cK9JqaHu7kqIbD1t34Tpfeonqv4j534/HcB LKWUfryqIkQ7hwnlsMnJskE/AlAPPEexre7YCWSbOMYtv4jtz3bSat2KnbRKx33zXdrM NqftRcpKjXPrrc8MKjR8Ocm32U+7BozTg+1py39Y4ir/BsIy//wM6GflHWRFPwf93l/d 34EZeBzyJOgf1O80XQk37awS30nW8h6fHZeSRp4iZH1S9cDhR1wblySmCeVmnZUWlp0A 0B/g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id mj1si1034695ejb.54.2020.12.03.04.04.09; Thu, 03 Dec 2020 04:04:09 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388152AbgLCMDi (ORCPT + 6 others); Thu, 3 Dec 2020 07:03:38 -0500 Received: from szxga07-in.huawei.com ([45.249.212.35]:9365 "EHLO szxga07-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726360AbgLCMDi (ORCPT ); Thu, 3 Dec 2020 07:03:38 -0500 Received: from DGGEMS407-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4CmvbR64ftz7861; Thu, 3 Dec 2020 20:02:27 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.9) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.487.0; Thu, 3 Dec 2020 20:02:44 +0800 From: Zhen Lei To: Philipp Zabel , Wei Xu , "Rob Herring" , linux-arm-kernel , devicetree , linux-kernel CC: Zhen Lei , Zhangfei Gao , Chen Feng , "Manivannan Sadhasivam" Subject: [PATCH 2/4] arm64: dts: correct vendor prefix hisi to hisilicon Date: Thu, 3 Dec 2020 20:02:10 +0800 Message-ID: <20201203120212.1105-3-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201203120212.1105-1-thunder.leizhen@huawei.com> References: <20201203120212.1105-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.9] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The vendor prefix of "Hisilicon Limited" is "hisilicon", it is clearly stated in "vendor-prefixes.yaml". Fixes: 35ca8168133c ("arm64: dts: Add dts files for Hisilicon Hi3660 SoC") Fixes: dd8c7b78c11b ("arm64: dts: Add devicetree for Hisilicon Hi3670 SoC") Signed-off-by: Zhen Lei Cc: Chen Feng Cc: Manivannan Sadhasivam --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 4 ++-- arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) -- 1.8.3 diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 49c19c6879f95ce..bfb1375426d2b58 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -345,7 +345,7 @@ crg_rst: crg_rst_controller { compatible = "hisilicon,hi3660-reset"; #reset-cells = <2>; - hisi,rst-syscon = <&crg_ctrl>; + hisilicon,rst-syscon = <&crg_ctrl>; }; @@ -376,7 +376,7 @@ iomcu_rst: reset { compatible = "hisilicon,hi3660-reset"; - hisi,rst-syscon = <&iomcu>; + hisilicon,rst-syscon = <&iomcu>; #reset-cells = <2>; }; diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi index 85b0dfb35d6d396..5c5a5dc964ea848 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -155,7 +155,7 @@ compatible = "hisilicon,hi3670-reset", "hisilicon,hi3660-reset"; #reset-cells = <2>; - hisi,rst-syscon = <&crg_ctrl>; + hisilicon,rst-syscon = <&crg_ctrl>; }; pctrl: pctrl@e8a09000 { From patchwork Thu Dec 3 12:02:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 336934 Delivered-To: patch@linaro.org Received: by 2002:a92:5e16:0:0:0:0:0 with SMTP id s22csp232755ilb; Thu, 3 Dec 2020 04:04:10 -0800 (PST) X-Google-Smtp-Source: ABdhPJye7KgqvjyNYK0ri7hfUjHZe4WOmbVoZKC1LUMBEFn9surAbhJTP76S6kYjZyiDtts3Inqt X-Received: by 2002:a17:906:4d8d:: with SMTP id s13mr2227522eju.305.1606997049836; Thu, 03 Dec 2020 04:04:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1606997049; cv=none; d=google.com; s=arc-20160816; b=h6qtWVrQwRzwT+ficnjKPY/HaDRprMVTmuUyjdilv0pDmMFUeyEu3VWQWL+pkdn176 pf+Ua25CnkutdzUMjBMD43YCqxWqINlXgABjhY4YetOM3dypaXROFa2B9HZEopOeH+Na /Tqdn+ho5Y8umr7o8vpFfwSw1rMYf5FzOcg7rI2BlmKS3kGrZpVZaKEYz8zQEXwYw80n Mga6HkG2qyqVPZot7nZ3a2T9PuYU/f1LJDCwQ9BsufqV96qOO08fwuiC30U9ktvVlu1P SYkwJuRtW+QDMRJBS/3TGtElNt9XIvXf81wf3NlY9flGj6IzBQenjV8VDm04bc8jmvG6 Y4HQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=mR9SpewN9DJ5kpsK6O5O63bvVAXdBLPkczDcZLWkkk8=; b=FWjAUf3z/2zizbP/HIU2mmy/a38VataTd07/PBfg5DYnXP4kIbEpTanat5sqnz9rmX F71F1j/aile/lKCvdo5NHn7DMmH4ImPEe2DQriO6BjQY1zebZKDIQpgnQv/qClqZgoJ+ M8MEBL90KbIK4IRsEPQpLfg5IzUPMEvIbmuKSKBvsnJGw3DYI2BQVXN6w+ukwIirrcaI bOWLne06Y3VZBjkVMA2j+7GsxAE4Vj06hojGbVdP7ipwyRkF7Opdq1rkHwf0KC3cZTrw L4QxgbCaJ6bfPF0n6Y79LdhUYUCaWGbjX3/PbXYsxlK6uz2luZ/Pe1buBcCw48NPguo6 ub1w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id mj1si1034695ejb.54.2020.12.03.04.04.09; Thu, 03 Dec 2020 04:04:09 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388098AbgLCMDi (ORCPT + 6 others); Thu, 3 Dec 2020 07:03:38 -0500 Received: from szxga07-in.huawei.com ([45.249.212.35]:9364 "EHLO szxga07-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726884AbgLCMDh (ORCPT ); Thu, 3 Dec 2020 07:03:37 -0500 Received: from DGGEMS407-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4CmvbR5b1Vz785x; Thu, 3 Dec 2020 20:02:27 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.9) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.487.0; Thu, 3 Dec 2020 20:02:45 +0800 From: Zhen Lei To: Philipp Zabel , Wei Xu , "Rob Herring" , linux-arm-kernel , devicetree , linux-kernel CC: Zhen Lei , Zhangfei Gao , Chen Feng , "Manivannan Sadhasivam" Subject: [PATCH 3/4] dt-bindings: reset: correct vendor prefix hisi to hisilicon Date: Thu, 3 Dec 2020 20:02:11 +0800 Message-ID: <20201203120212.1105-4-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201203120212.1105-1-thunder.leizhen@huawei.com> References: <20201203120212.1105-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.9] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The vendor prefix of "Hisilicon Limited" is "hisilicon", it is clearly stated in "vendor-prefixes.yaml". Fixes: 836e23549583 ("dt-bindings: Document the hi3660 reset bindings") Signed-off-by: Zhen Lei Cc: Zhangfei Gao --- Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 1.8.3 diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt index 2df4bddeb688918..aefd26710f9e87d 100644 --- a/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt +++ b/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt @@ -11,7 +11,7 @@ Required properties: - compatible: should be one of the following: "hisilicon,hi3660-reset" for HI3660 "hisilicon,hi3670-reset", "hisilicon,hi3660-reset" for HI3670 -- hisi,rst-syscon: phandle of the reset's syscon. +- hisilicon,rst-syscon: phandle of the reset's syscon. - #reset-cells : Specifies the number of cells needed to encode a reset source. The type shall be a and the value shall be 2. @@ -29,7 +29,7 @@ Example: iomcu_rst: iomcu_rst_controller { compatible = "hisilicon,hi3660-reset"; - hisi,rst-syscon = <&iomcu>; + hisilicon,rst-syscon = <&iomcu>; #reset-cells = <2>; }; From patchwork Thu Dec 3 12:02:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 336931 Delivered-To: patch@linaro.org Received: by 2002:a92:5e16:0:0:0:0:0 with SMTP id s22csp232738ilb; Thu, 3 Dec 2020 04:04:09 -0800 (PST) X-Google-Smtp-Source: ABdhPJy5/u62YWElFq6XI+qj/ceojn3uUb4Y7KVbxAlQt60u+93d+9D48f18pXZ4g7m5zbjBWY4W X-Received: by 2002:a17:906:7e43:: with SMTP id z3mr2173603ejr.67.1606997049059; Thu, 03 Dec 2020 04:04:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1606997049; cv=none; d=google.com; s=arc-20160816; b=VEKYohQ/BKhFWWLrdKk4BQUL7ek7dE28r5F+uE35dIBiUoOrkRx5JlhjjShsDKRh6q 5LkbuHPDoj1TDqSSGmODT2l7AmUxlSZophuh5JEzd3CS3pIoPQkEO99x9Hzy7T33bTdo WuWtNiQjeV4rNuR09wH/fi7upsnLffFGobVKinL5EJTIzl+jP+K9IN+S24D5EaAbgw5N 0O8VUqz8yfu8jvuxHecHkjUdUBqNcZ7FeVewhL4x5qUdIWFx0FowG66rYOCLlfkeIBLm daXj6Ab/UHopQRWIulADvfkdyl5jDqOe1LTSf60BakCk/8rc6sGUl2AfvHX+Xoxf6swi 3lvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=owX/PhfbcFJeWJ3EwGDTBI4JtcpUNpABMw5bsHZWjEw=; b=rWujW0cYTUcIVWyQHvXdv4iHhSFFsrW99np9z7H8nf/2mdaGeDjEYKcvDymRWnhYRs 1rPSZ+WuMdIYoY8Y+bz2vcC07EAFGFu1QONBOp1pkdrjssRkDgLfO9yYDoOxapKAGTf4 iM39kB0ScX6n2MmsxQclz3dQE5/JrfY74t65RR/PMyYsTZ1gutWQhpNOixrXJr8J0MY7 al1cHi2YvH5nlKOR7Lx/j0IvHs4BHLvzSIn/MLlNvVbfctJCXZLFUqpgt+cPbf9LQWk3 5ejv5SzynqStoQXBONd1o37DQdpdcwtF6+H1lNFmmUXvCbDOoQ8Hx4pkhQh41Z2DxT8x iInA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id mj1si1034695ejb.54.2020.12.03.04.04.08; Thu, 03 Dec 2020 04:04:09 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730344AbgLCMDl (ORCPT + 6 others); Thu, 3 Dec 2020 07:03:41 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:8996 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388092AbgLCMDl (ORCPT ); Thu, 3 Dec 2020 07:03:41 -0500 Received: from DGGEMS407-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4CmvbR5FL0zhYQL; Thu, 3 Dec 2020 20:02:27 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.9) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.487.0; Thu, 3 Dec 2020 20:02:45 +0800 From: Zhen Lei To: Philipp Zabel , Wei Xu , "Rob Herring" , linux-arm-kernel , devicetree , linux-kernel CC: Zhen Lei , Zhangfei Gao , Chen Feng , "Manivannan Sadhasivam" Subject: [PATCH 4/4] dt-bindings: reset: convert Hisilicon reset controller bindings to json-schema Date: Thu, 3 Dec 2020 20:02:12 +0800 Message-ID: <20201203120212.1105-5-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201203120212.1105-1-thunder.leizhen@huawei.com> References: <20201203120212.1105-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.9] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the Hisilicon reset controller binding to DT schema format using json-schema. Signed-off-by: Zhen Lei --- .../bindings/reset/hisilicon,hi3660-reset.txt | 44 ------------- .../bindings/reset/hisilicon,hi3660-reset.yaml | 77 ++++++++++++++++++++++ 2 files changed, 77 insertions(+), 44 deletions(-) delete mode 100644 Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt create mode 100644 Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml -- 1.8.3 diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt deleted file mode 100644 index aefd26710f9e87d..000000000000000 --- a/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt +++ /dev/null @@ -1,44 +0,0 @@ -Hisilicon System Reset Controller -====================================== - -Please also refer to reset.txt in this directory for common reset -controller binding usage. - -The reset controller registers are part of the system-ctl block on -hi3660 and hi3670 SoCs. - -Required properties: -- compatible: should be one of the following: - "hisilicon,hi3660-reset" for HI3660 - "hisilicon,hi3670-reset", "hisilicon,hi3660-reset" for HI3670 -- hisilicon,rst-syscon: phandle of the reset's syscon. -- #reset-cells : Specifies the number of cells needed to encode a - reset source. The type shall be a and the value shall be 2. - - Cell #1 : offset of the reset assert control - register from the syscon register base - offset + 4: deassert control register - offset + 8: status control register - Cell #2 : bit position of the reset in the reset control register - -Example: - iomcu: iomcu@ffd7e000 { - compatible = "hisilicon,hi3660-iomcu", "syscon"; - reg = <0x0 0xffd7e000 0x0 0x1000>; - }; - - iomcu_rst: iomcu_rst_controller { - compatible = "hisilicon,hi3660-reset"; - hisilicon,rst-syscon = <&iomcu>; - #reset-cells = <2>; - }; - -Specifying reset lines connected to IP modules -============================================== -example: - - i2c0: i2c@..... { - ... - resets = <&iomcu_rst 0x20 3>; /* offset: 0x20; bit: 3 */ - ... - }; diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml b/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml new file mode 100644 index 000000000000000..9bf40952e5b7d28 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/hisilicon,hi3660-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon System Reset Controller + +maintainers: + - Wei Xu + +description: | + Please also refer to reset.txt in this directory for common reset + controller binding usage. + The reset controller registers are part of the system-ctl block on + hi3660 and hi3670 SoCs. + +properties: + compatible: + oneOf: + - items: + - const: hisilicon,hi3660-reset + - items: + - const: hisilicon,hi3670-reset + - const: hisilicon,hi3660-reset + + hisilicon,rst-syscon: + description: phandle of the reset's syscon. + $ref: /schemas/types.yaml#/definitions/phandle + + '#reset-cells': + description: | + Specifies the number of cells needed to encode a reset source. + Cell #1 : offset of the reset assert control register from the syscon + register base + offset + 4: deassert control register + offset + 8: status control register + Cell #2 : bit position of the reset in the reset control register + const: 2 + +required: + - compatible + +additionalProperties: false + +examples: + - | + #include + #include + #include + + iomcu: iomcu@ffd7e000 { + compatible = "hisilicon,hi3660-iomcu", "syscon"; + reg = <0xffd7e000 0x1000>; + }; + + iomcu_rst: iomcu_rst_controller { + compatible = "hisilicon,hi3660-reset"; + hisilicon,rst-syscon = <&iomcu>; + #reset-cells = <2>; + }; + + /* Specifying reset lines connected to IP modules */ + i2c@ffd71000 { + compatible = "snps,designware-i2c"; + reg = <0xffd71000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3660_CLK_GATE_I2C0>; + resets = <&iomcu_rst 0x20 3>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>; + status = "disabled"; + }; +...