From patchwork Sat Dec 12 17:54:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 342877 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp1638181jai; Sat, 12 Dec 2020 10:59:29 -0800 (PST) X-Google-Smtp-Source: ABdhPJxkBMwjN0U+qspkOwU+oQT/1Ynky+DUZPs6vqfJ0pHqXQIk5s567eZaHYi9kHixVmfoEtNI X-Received: by 2002:a5b:b49:: with SMTP id b9mr24995152ybr.310.1607799569307; Sat, 12 Dec 2020 10:59:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607799569; cv=none; d=google.com; s=arc-20160816; b=larM2hrVddDd5BoDsEHgghhO2mn+C9TBvoN2iOzeZDYP7F2O1pqoXFSofNZRBMvka0 c7OpNqtI4cvzw1RvyxrrqbW7mzotQK/ogfWGrBn4DsVxZaA5jkg5UO4lkyhxiBPxVFet MJxRV9jfFihB2oegUdr5JZ2YVdyvkUcoxOqef+bN4Amq84UF8TTxxHR6NsgEegDQZoyd WLFb6Pr/TjY7KmOK+oQD7S6aaOrDkiVtEF8fCkpTAS8aFQfRcbs5JM6VmqMYFhvLMOEH 8/Uo66sqgI3RM7mIV/jAtFVeuZCK31UYWclcHjOvhWPL2GykdTnHdWT0aLlb+hlGTOTr xjRA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=FMIWjUknrAyReda2X45aTe0D5x9+bgqjO1irVBVZ2No=; b=yzqRmTUM6C8cc2wNzWoCIu4P/qgCrmzFHV8xo5KRR2R+kYp5rmAOERiD7b7ia6GZtP xLRpCTrMhHqXYq4BnEHfoQGwYSmxpTcLqMCSUkJ9LgQ5XJtaI8V9IOgnkTW+tN4naPbC AWVBJIcbZo9jHGgRbQ3BFft8c4rBm8hhdImkMsP3M1uaZAhttW5vOmigd0eKDf36Kmlk 0nF8hPpCuTS/0mTa+7gJUm/ac0CuIXebxzrYkJtxCQomIwWex3Jwg+qmjI8pouGJ9kAz /PrHTm7RP4cRI3XqTBNd+rSSQgGrf4yox7NWOJECxjipqb3zHPoKccjpUvFrE8ZGvt5X L4cQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id e14si11428328ybp.62.2020.12.12.10.59.29 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 12 Dec 2020 10:59:29 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:53624 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1koA76-0003lw-Iu for patch@linaro.org; Sat, 12 Dec 2020 13:59:28 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:57358) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ko9U2-0000fo-Nz for qemu-devel@nongnu.org; Sat, 12 Dec 2020 13:19:06 -0500 Received: from mout.kundenserver.de ([212.227.126.134]:52471) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ko9Ty-00027N-MV for qemu-devel@nongnu.org; Sat, 12 Dec 2020 13:19:06 -0500 Received: from localhost.localdomain ([82.252.152.214]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.167]) with ESMTPSA (Nemesis) id 1N5UoU-1k4lJP3iYc-0170Ry; Sat, 12 Dec 2020 18:55:02 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Subject: [PULL 1/5] hw/m68k/q800: Don't connect two qemu_irqs directly to the same input Date: Sat, 12 Dec 2020 18:54:54 +0100 Message-Id: <20201212175458.259960-2-laurent@vivier.eu> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201212175458.259960-1-laurent@vivier.eu> References: <20201212175458.259960-1-laurent@vivier.eu> MIME-Version: 1.0 X-Provags-ID: V03:K1:I4fkby6ZmrgodSAXpPeZKvKTnWrpS2olwDJ2NsWWHZKHFt2veie lfaOiVVXP+sB426rbJNs8V/54Y4T20stGIrU4mVMu72FFNw3dqhdvvfgXYQu3mqbDjBxt6h wNNo00cblMmoVzsGU8/6YJVSHWwh69Z27d1Qxh7zAjDmw4aduFD9ZHrloaPCZnlEphZCImZ bcOcTH67HlwJ/rJgInkkw== X-UI-Out-Filterresults: notjunk:1; V03:K0:84uPdYbLF+E=:V4SNzK5jCfgZA3wtErnrk8 kyWcrYh5K0r11TdDnAz+ycUbOGUUnNoDx8QdURvX8/3v73Vqwc8Djh5PqJ/grxmRHoftdvQwr dJN2lZJ2m8+C4v0qfD5A2jeIj/b8JIijtY562oJYx5Fa8GF28PDZG4gMcmeAslSeuLATBhPUJ 7gkGwH6+5wfyi1LyK1cif0VCYkuy7wEI164BWZ/PLIXWCpPUCOOejOb08FMPm43WnZ9088DL9 ZfXDPtC08/dj7dAJDN1gPu9kBPStxXimyHLUbYhf4OqmwCCU4Ex+oDwQhcZkm6/9z1bipeOI+ UYuXpu0a66G0QvTr1/IqWkVpbsxX5FIiftPwMo3shwN4HgRatj2H7jOEkOuBSNddWoytdYxhj vOwHa5UUXKkFOkAYna0t2jA0FCn71pKiT8zUXKlYq28rFbEr7SmuG0HEyOXe4xY/eRQcCDqe6 vSH4ff3mSQ== Received-SPF: none client-ip=212.227.126.134; envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell The q800 board code connects both of the IRQ outputs of the ESCC to the same pic[3] qemu_irq. Connecting two qemu_irqs outputs directly to the same input is not valid as it produces subtly wrong behaviour (for instance if both the IRQ lines are high, and then one goes low, the PIC input will see this as a high-to-low transition even though the second IRQ line should still be holding it high). This kind of wiring needs an explicitly created OR gate; add one. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier Message-Id: <20201106235109.7066-2-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier --- hw/m68k/q800.c | 12 ++++++++++-- hw/m68k/Kconfig | 1 + 2 files changed, 11 insertions(+), 2 deletions(-) -- 2.29.2 diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 4db2b9bbc7b4..f9a2be776eb0 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -29,6 +29,7 @@ #include "hw/hw.h" #include "hw/boards.h" #include "hw/irq.h" +#include "hw/or-irq.h" #include "elf.h" #include "hw/loader.h" #include "ui/console.h" @@ -173,6 +174,7 @@ static void q800_init(MachineState *machine) CPUState *cs; DeviceState *dev; DeviceState *via_dev; + DeviceState *escc_orgate; SysBusESPState *sysbus_esp; ESPState *esp; SysBusDevice *sysbus; @@ -285,8 +287,14 @@ static void q800_init(MachineState *machine) qdev_prop_set_uint32(dev, "chnAtype", 0); sysbus = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(sysbus, &error_fatal); - sysbus_connect_irq(sysbus, 0, pic[3]); - sysbus_connect_irq(sysbus, 1, pic[3]); + + /* Logically OR both its IRQs together */ + escc_orgate = DEVICE(object_new(TYPE_OR_IRQ)); + object_property_set_int(OBJECT(escc_orgate), "num-lines", 2, &error_fatal); + qdev_realize_and_unref(escc_orgate, NULL, &error_fatal); + sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0)); + sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1)); + qdev_connect_gpio_out(DEVICE(escc_orgate), 0, pic[3]); sysbus_mmio_map(sysbus, 0, SCC_BASE); /* SCSI */ diff --git a/hw/m68k/Kconfig b/hw/m68k/Kconfig index c757e7dfa48b..60d7bcfb8f2b 100644 --- a/hw/m68k/Kconfig +++ b/hw/m68k/Kconfig @@ -22,3 +22,4 @@ config Q800 select ESCC select ESP select DP8393X + select OR_IRQ From patchwork Sat Dec 12 17:54:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 342876 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp1636322jai; Sat, 12 Dec 2020 10:56:44 -0800 (PST) X-Google-Smtp-Source: ABdhPJwcYs5yFky9AtR3w0TQz5mUzlQcGMwfFmOpraOjoWqeUDa2mXNqgnSR1xFWCzthMJc+4wwe X-Received: by 2002:a25:6e43:: with SMTP id j64mr27168514ybc.183.1607799404791; Sat, 12 Dec 2020 10:56:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607799404; cv=none; d=google.com; s=arc-20160816; b=I0XX8yWbFok03trUiblXVxqaaxgqD84k5U7uEFsZYo3H5dBY/HtXQVTlG6m8b3dFPw +MWfpnZY3Vht6ulT104xnUrP0WhReazo8+XeFbMZFLz06OuD1HsFJxiqBGbQmM0KAssb 5k04nCoCINGSLBl/M325pYLbT5qAAj4/95HEBplNOEHC8UVnoBru2aFlUTm9TKDJv09G Fi6U2Sj0U7CDuKYXW+KPAECKBn8FgGbWUruw2ZOJW7+FQZLWrc0NbxyQrm3oz8ki4oCt l6xz+Tc98DKxFibnuUUYedDZbxdny6D2D2qGGqe1Jj9yL0CZebbHEA33haq9VEMvlCTU q4DA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=AzvhYjjeDFjACJ6HqfBQ4YDfAYGCvQWXwopxdH7Kx7I=; b=IqAguzc+XzhvRANaIBdnxtoQzPQroWAJtjKC5XG7dxI4PWBAV3w8XVk583H0GeG0UO c9IjL7DhTIP7NzCqNwg6P8VCkBmvjAtCCz6sUcWZRWLM7UgC94+OeQSeejyspQfGx4gN 97LPks8aVUP9qdwhHPcYsTlgGxJBG2eVSvXUkWnF+OxEfKsDmp1GXjKuIG9FBKo8FNr7 WM1Q2Asp+EohDoNh+TYClwQKfa2bHu+iFaxGdDfpzcSI0qaWlR7yKsxookxvwIxdAKeE 0u+YXrlBwXKkSbI+QbHUqZ34a4Mor9UEbpO8sCxTRHXgSeV6RlDiTSf//y1+TiUoJkSV 0OaA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id i139si13169322ybg.44.2020.12.12.10.56.44 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 12 Dec 2020 10:56:44 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:45692 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1koA2m-0008W3-NY for patch@linaro.org; Sat, 12 Dec 2020 13:55:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:57316) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ko9U1-0000eu-1H for qemu-devel@nongnu.org; Sat, 12 Dec 2020 13:19:05 -0500 Received: from mout.kundenserver.de ([212.227.126.133]:40507) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ko9Tw-000264-EK for qemu-devel@nongnu.org; Sat, 12 Dec 2020 13:19:04 -0500 Received: from localhost.localdomain ([82.252.152.214]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.167]) with ESMTPSA (Nemesis) id 1MdNwm-1kF5L41evQ-00ZLRU; Sat, 12 Dec 2020 18:55:02 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Subject: [PULL 2/5] hw/m68k/q800.c: Make the GLUE chip an actual QOM device Date: Sat, 12 Dec 2020 18:54:55 +0100 Message-Id: <20201212175458.259960-3-laurent@vivier.eu> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201212175458.259960-1-laurent@vivier.eu> References: <20201212175458.259960-1-laurent@vivier.eu> MIME-Version: 1.0 X-Provags-ID: V03:K1:5WvelqhmKeJZ1UJ33TMHa3b2gEKW8F8ymjEsQvDHOSYdYUL8jJF TknZWh5MFlDzEUd6FVUShawIL4Jxh3UHzmto+TTJ3eJoGMniJ2VUrGtRjjbK9luOdsK6IkE cLshecz51JrZ+a4yrilvT8n4nWyGoXesYSgAUL2sCUyX2QhTkjuR87Dt2+y5Yf7GfPH+8V8 1Q6XHtn9fcGBeffI4Hgog== X-UI-Out-Filterresults: notjunk:1; V03:K0:UwXOuLaZehw=:fhIiWcI41MGUNjEw+vEVkK kqlsTm0Za/J3sQmsEFFwlKAW0Ob+chGowbbBh/H9eqtv6LnOrvbeCo2Sc6kbZsmctXg1uy4yg qyQxrnEGmxNFlWLtA2B2zhYAhOWqCqHDWvZRVcS8Vujn613GeFGzabXPTaXB1jn+PG5cy1Tmp 85ZU9w0CyqykNh7/RPut7umVc1I02SVGJRnKCIvZfeIQVpTiq+TpTqvRzilq4dNVDLgqQdsJk 8MT6IvZcuVfA2otMB3Xb63DDHWqsbO6BrxxEAKSIagdrp9p69N4b/H/WAba1HjRwZngSsgt4m 8PtJlerqm0/5z8tOwa2qGFjZ0D0+7ex3xHdYeRwL1B9LTb6cOdvZzo8awS/sUShW8qqbdcQhG U5Gbz3mjdYrqXgrszsm8VpBK5Cj+zUHGGLOiBy5M8Oo2zJ0rElVoJHR82zrOHXARi9zm7uybd rEIXylpqYg== Received-SPF: none client-ip=212.227.126.133; envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell The handling of the GLUE (General Logic Unit) device is currently open-coded. Make this into a proper QOM device. This minor piece of modernisation gets rid of the free floating qemu_irq array 'pic', which Coverity points out is technically leaked when we exit the machine init function. (The replacement glue device is not leaked because it gets added to the sysbus, so it's accessible via that.) Fixes: Coverity CID 1421883 Signed-off-by: Peter Maydell Reviewed-by: Laurent vivier Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20201106235109.7066-3-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier --- hw/m68k/q800.c | 82 ++++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 70 insertions(+), 12 deletions(-) -- 2.29.2 diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index f9a2be776eb0..2af0e2532eb2 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -48,6 +48,7 @@ #include "sysemu/qtest.h" #include "sysemu/runstate.h" #include "sysemu/reset.h" +#include "migration/vmstate.h" #define MACROM_ADDR 0x40800000 #define MACROM_SIZE 0x00100000 @@ -95,10 +96,14 @@ * CPU. */ -typedef struct { +#define TYPE_GLUE "q800-glue" +OBJECT_DECLARE_SIMPLE_TYPE(GLUEState, GLUE) + +struct GLUEState { + SysBusDevice parent_obj; M68kCPU *cpu; uint8_t ipr; -} GLUEState; +}; static void GLUE_set_irq(void *opaque, int irq, int level) { @@ -120,6 +125,58 @@ static void GLUE_set_irq(void *opaque, int irq, int level) m68k_set_irq_level(s->cpu, 0, 0); } +static void glue_reset(DeviceState *dev) +{ + GLUEState *s = GLUE(dev); + + s->ipr = 0; +} + +static const VMStateDescription vmstate_glue = { + .name = "q800-glue", + .version_id = 0, + .minimum_version_id = 0, + .fields = (VMStateField[]) { + VMSTATE_UINT8(ipr, GLUEState), + VMSTATE_END_OF_LIST(), + }, +}; + +/* + * If the m68k CPU implemented its inbound irq lines as GPIO lines + * rather than via the m68k_set_irq_level() function we would not need + * this cpu link property and could instead provide outbound IRQ lines + * that the board could wire up to the CPU. + */ +static Property glue_properties[] = { + DEFINE_PROP_LINK("cpu", GLUEState, cpu, TYPE_M68K_CPU, M68kCPU *), + DEFINE_PROP_END_OF_LIST(), +}; + +static void glue_init(Object *obj) +{ + DeviceState *dev = DEVICE(obj); + + qdev_init_gpio_in(dev, GLUE_set_irq, 8); +} + +static void glue_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->vmsd = &vmstate_glue; + dc->reset = glue_reset; + device_class_set_props(dc, glue_properties); +} + +static const TypeInfo glue_info = { + .name = TYPE_GLUE, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(GLUEState), + .instance_init = glue_init, + .class_init = glue_class_init, +}; + static void main_cpu_reset(void *opaque) { M68kCPU *cpu = opaque; @@ -180,8 +237,7 @@ static void q800_init(MachineState *machine) SysBusDevice *sysbus; BusState *adb_bus; NubusBus *nubus; - GLUEState *irq; - qemu_irq *pic; + DeviceState *glue; DriveInfo *dinfo; linux_boot = (kernel_filename != NULL); @@ -215,10 +271,9 @@ static void q800_init(MachineState *machine) } /* IRQ Glue */ - - irq = g_new0(GLUEState, 1); - irq->cpu = cpu; - pic = qemu_allocate_irqs(GLUE_set_irq, irq, 8); + glue = qdev_new(TYPE_GLUE); + object_property_set_link(OBJECT(glue), "cpu", OBJECT(cpu), &error_abort); + sysbus_realize_and_unref(SYS_BUS_DEVICE(glue), &error_fatal); /* VIA */ @@ -230,8 +285,10 @@ static void q800_init(MachineState *machine) sysbus = SYS_BUS_DEVICE(via_dev); sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_mmio_map(sysbus, 0, VIA_BASE); - qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, pic[0]); - qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 1, pic[1]); + qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, + qdev_get_gpio_in(glue, 0)); + qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 1, + qdev_get_gpio_in(glue, 1)); adb_bus = qdev_get_child_bus(via_dev, "adb.0"); @@ -272,7 +329,7 @@ static void q800_init(MachineState *machine) sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_mmio_map(sysbus, 0, SONIC_BASE); sysbus_mmio_map(sysbus, 1, SONIC_PROM_BASE); - sysbus_connect_irq(sysbus, 0, pic[2]); + sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 2)); /* SCC */ @@ -294,7 +351,7 @@ static void q800_init(MachineState *machine) qdev_realize_and_unref(escc_orgate, NULL, &error_fatal); sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0)); sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1)); - qdev_connect_gpio_out(DEVICE(escc_orgate), 0, pic[3]); + qdev_connect_gpio_out(DEVICE(escc_orgate), 0, qdev_get_gpio_in(glue, 3)); sysbus_mmio_map(sysbus, 0, SCC_BASE); /* SCSI */ @@ -456,6 +513,7 @@ static const TypeInfo q800_machine_typeinfo = { static void q800_machine_register_types(void) { type_register_static(&q800_machine_typeinfo); + type_register_static(&glue_info); } type_init(q800_machine_register_types)