From patchwork Mon Dec 14 14:25:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 343522 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3035469jai; Mon, 14 Dec 2020 06:19:28 -0800 (PST) X-Google-Smtp-Source: ABdhPJzbWMvNXcGxhLl57IuH7olOXpvq+dPg7p9qLksWXkipav97turwB5+dpNyAewsPbVyXf3ug X-Received: by 2002:a05:6402:45:: with SMTP id f5mr21222753edu.273.1607955567884; Mon, 14 Dec 2020 06:19:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607955567; cv=none; d=google.com; s=arc-20160816; b=scsIZg2Qbtha1PjfmyKnltd7usYW2nE5ynxB+mrA4NpZNEZPRfYpNxgKYiCWKLPApx 0mQbM93tvBbpAsqFg21ZgHYuu51y3R8uNSs8o1xCnEEixBL7pVRY1/jcwXDX/TPKPm9C 3qQOe8Gqf2cjCzwQQr6mjvYUfvXgkhNfqgFY1R1n2WV/NJOfVX4nq773ELi+Twsmxvzz sIUewrR4NY3HmYbFfkFtxXJRNqf+QaZxJV+3b4TOZOjj0WKZjrikVrsBG9pgiPw8f3b1 /DalwFcrcaPGeKacrmicpucrwf0gLi3YpCX1nIG4h4whbgugORutewYc/8WudDiDGRtE rVuA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=geSRvMF6kCfgAVrxKSiIze0q0V64uiyFq2IRTDk+dkk=; b=k85pFHsX5Lb3fz5MvsOv9tThkFNuAYkQI16LRB3ybNiXZqaa8bb7vNoicnc5Oxf7qh 5rf7JQJLdV/C3TtN2DeWwb8Gq0paqZ4zNU75iB+4qygEfwRAQ5v5Mp+40TzK5grgnvOn hVrLN9wQnwPlBpeQWBWJaendYHte+63pFD8ZKuYdsqgEJ5h+xZh18AFy6CRtJCNeVRcp 0rkK/1Ry5AUe0tAV7ETNFOiOyJpmxSTwAdwqmJRGfxkF9bRmXSrDpj1HFqaYjJw23cT8 1wNb/Z3sx43DA5Dnj3ujs4C2lHRpEL2nKOSIfjdUZm/PO4bTyayAMJzBrHw+HTa0x7qw drKQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Qn+uQp/d"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j14si10062778ejy.327.2020.12.14.06.19.27; Mon, 14 Dec 2020 06:19:27 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Qn+uQp/d"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726063AbgLNOTV (ORCPT + 15 others); Mon, 14 Dec 2020 09:19:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43374 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2440020AbgLNOTK (ORCPT ); Mon, 14 Dec 2020 09:19:10 -0500 Received: from mail-wr1-x442.google.com (mail-wr1-x442.google.com [IPv6:2a00:1450:4864:20::442]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 59189C0613D3 for ; Mon, 14 Dec 2020 06:18:30 -0800 (PST) Received: by mail-wr1-x442.google.com with SMTP id 91so16571886wrj.7 for ; Mon, 14 Dec 2020 06:18:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=geSRvMF6kCfgAVrxKSiIze0q0V64uiyFq2IRTDk+dkk=; b=Qn+uQp/daOJFLGBxEn+Jxi+2wPnCbhJ1FFJRxvdIhbweAMhsbXLSCLB6/fqlg0Z/8P MbUpEXd5hx16zzUB2ZZ8CYn6LHFaGfqy88rwSbfO952qInZj5ezYDKQeWMSZNyOhc4+n iv6pxPv32McWuWyt6Ny9H1STnA3msDs/wdYYkBRBm9Z+hxgkfDKRhaNrigP21C2u0gEa Tw5y5mtLe8oBad2cfXKRa7aCja/pF68rD3Kxab0wLZUwGIMx2obNhnXrD7KwXhpu+4jN bliT5lwPB/rZXDHYjL6pNm4Izc8977zB/vAtqw9oQhK56a0Eq1DdtvRbuUaHsZhlI/vA /rEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=geSRvMF6kCfgAVrxKSiIze0q0V64uiyFq2IRTDk+dkk=; b=BcPfM65pqfyCIpcvoVuwowjibF+axug8h6Pf29n+pyDIyM3zdlYpqk9M4J7EY7MeBW dA7S7Z5GVZly938pPLNvO4cSg24Yhe/ommg18TjlEnnoEphutWTId2J/ZQj158Bni6r1 ER7UInNky6eosTRr/AK6FJ0Tek4cVy7U3VDJopRB/RPn5GmVVDJ1+z+snhrJ0Wq3mITf 2HE4SeNOy02KgpQJbl4O4BQiLyCsglXsrMltZUEyz4L4cUHIPVtWj3xnn2mThjrS6GqN 8X54TPZoiCHY7c9qCQ1dKTzR7n7d7K9ZbWAOGnWItFqOrsBhs219XUouJKnzaeMel58T V3nA== X-Gm-Message-State: AOAM530FnckByinzZwnta2ezfVvi3bm4SkgTw8iFW2BMi4ZsQ9b5NUQe ktsONO6vUadV0vp4KNxCrEa9tw== X-Received: by 2002:adf:ee4a:: with SMTP id w10mr27351982wro.81.1607955509003; Mon, 14 Dec 2020 06:18:29 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:f2e4:25b3:2b53:52cd]) by smtp.gmail.com with ESMTPSA id h5sm34126285wrp.56.2020.12.14.06.18.28 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Dec 2020 06:18:28 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, bbhatt@codeaurora.org, Loic Poulain Subject: [PATCH v5 01/10] mhi: Add mhi_controller_initialize helper Date: Mon, 14 Dec 2020 15:25:28 +0100 Message-Id: <1607955937-26951-2-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> References: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This function allows to initialize a mhi_controller structure. Today, it only zeroing the structure. Use this function from mhi_alloc_controller so that any further initialization can be factorized in initalize function. Signed-off-by: Loic Poulain --- drivers/bus/mhi/core/init.c | 6 ++++++ include/linux/mhi.h | 6 ++++++ 2 files changed, 12 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c index 96cde9c..a75ab8c 100644 --- a/drivers/bus/mhi/core/init.c +++ b/drivers/bus/mhi/core/init.c @@ -1021,6 +1021,12 @@ void mhi_unregister_controller(struct mhi_controller *mhi_cntrl) } EXPORT_SYMBOL_GPL(mhi_unregister_controller); +void mhi_initialize_controller(struct mhi_controller *mhi_cntrl) +{ + memset(mhi_cntrl, 0, sizeof(*mhi_cntrl)); +} +EXPORT_SYMBOL_GPL(mhi_initialize_controller); + struct mhi_controller *mhi_alloc_controller(void) { struct mhi_controller *mhi_cntrl; diff --git a/include/linux/mhi.h b/include/linux/mhi.h index 04cf7f3..2754742 100644 --- a/include/linux/mhi.h +++ b/include/linux/mhi.h @@ -537,6 +537,12 @@ struct mhi_driver { #define to_mhi_device(dev) container_of(dev, struct mhi_device, dev) /** + * mhi_initialize_controller - Initialize MHI Controller structure + * @mhi_cntrl: MHI controller structure to initialize + */ +void mhi_initialize_controller(struct mhi_controller *mhi_cntrl); + +/** * mhi_alloc_controller - Allocate the MHI Controller structure * Allocate the mhi_controller structure using zero initialized memory */ From patchwork Mon Dec 14 14:25:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 343526 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3035513jai; Mon, 14 Dec 2020 06:19:30 -0800 (PST) X-Google-Smtp-Source: ABdhPJxyyYqoPI99G5UtuSdo+7BF97zM2LF6paWW7IDg/y+dReT05167FAsuzLYkj0CaLm5pyoAc X-Received: by 2002:a17:906:4bc5:: with SMTP id x5mr6194770ejv.55.1607955570702; Mon, 14 Dec 2020 06:19:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607955570; cv=none; d=google.com; s=arc-20160816; b=ZQCJEviQ3jdQx19E6b99jG5qdWkmTseND3ADw6e4j8H9L/V6a6cTMcSg2/TCNtdDku FpFu6UMzLhyLbvqztgrxteN6hABBJGtR+7lbT0MBkXUAWRFevzdMmXFKbt0odAm9h/F7 hsFvZqw2Ts4aC/gxE2OMAer9s/AzaAIE3Fb29x4xZHAwEoeuWf8e8tshyKxbmmECSj66 7idkefTCjfsfU/tfJcigKeMWlMbqF1Vm0slnMih+1zTg5VjmCw6HvvAUxpmz7yvyk3Br rJJhHxVq7kRQcb4QHu8vRi3jy9Psd9SdF9XyPhm+LZYsEQ9sQ4z7oGnn3Xcg+vl2JVNV lWCg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=pOEXaNJekDpHw1CP3O0Pj76+vI42wYO3Vt7QFcDTgJc=; b=gedn5+00zKl8NQcEm18b37tDt1LWGU+3UpalGxu+6mIDqoyIEWKmp8jDeO0aanRYne HVSuxBHbtU+4EBFk9ED25F4wJFt3vJtc+TFC0zknKTw2krjxb1fzq7hoxFkU47DHj6qL 7YaF/K9uKJF2kqQ9mjJZdl4TB/gg1gj2wbaeaDtgMUsR6ovZy5AOfgCLmZF8QdyoEaam dKws4xcX14UVvWlbQNdjvjWaLZIc9TR7DF29CKjRyB+j4rE5uXgrCRcGZ0KbrJeF2y3u BLtiATYBh+WaGnGoETaexsr0vOHsbnyFrA3Z4nCr1krJ9NwoR6+XuZJ+0UFLacTf7HgV yV8g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="sTMD/Cpl"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j14si10062778ejy.327.2020.12.14.06.19.30; Mon, 14 Dec 2020 06:19:30 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="sTMD/Cpl"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2440020AbgLNOT3 (ORCPT + 15 others); Mon, 14 Dec 2020 09:19:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43382 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2440023AbgLNOTM (ORCPT ); Mon, 14 Dec 2020 09:19:12 -0500 Received: from mail-wr1-x444.google.com (mail-wr1-x444.google.com [IPv6:2a00:1450:4864:20::444]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C7D1C0613D6 for ; Mon, 14 Dec 2020 06:18:32 -0800 (PST) Received: by mail-wr1-x444.google.com with SMTP id i9so16586817wrc.4 for ; Mon, 14 Dec 2020 06:18:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pOEXaNJekDpHw1CP3O0Pj76+vI42wYO3Vt7QFcDTgJc=; b=sTMD/CplS0S2yV2Hd1GUgMdESiqWIQtE8xVzBZN5YN9zGU9S5Vsv7Iz2wdtQTnFbfO 83+eHaG3FVH3fFSaHmJ5b8osXFVCHyU7pFpFoZoC9NBpRQCvdGFCtpbegY4Bb+tSy0Vn Z8f+0iR8TorLTMyHJeIaFb8CD68OFLpe7D1PoWSyh9FZxP7pzcS05IQgetLCht0OkepG XMjrPE4fKA9DvEklgLhvSc5OD1/wdANR00h11U/2Cxr5q4s+ciU+qDU4ikIPZSmx94Mx lk5bA7apPImY8zEfKk/XT0J5CROmgmKNUoaW+LXGLeMcoVp8ljB83I+0g2hFzwJrl//g JNcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pOEXaNJekDpHw1CP3O0Pj76+vI42wYO3Vt7QFcDTgJc=; b=uUtrbeXw3g4iXEVz+oOEH0JRplkmwjZYoOaQ3H9gsSJ2Yt0IAUxnxpxWIW/geZDBI8 +fV0XvhDWVX28iUP4o7tDLK7KQaLFERkaXqNPoBBdfZicveBOGiXKb2jjEHBsJhymUuS ubfjkHVDIS3B0IZzkj2qkEM2DXS/kVfTMM3KB/uZIvaeyNgtJ6UyIKI+ZS8ecjmKCyd+ Zo+uZIb80G8/wm5xg64SBCheRD096c9fqi4zz8F8gQRpLQz5QWNYVPtPl/ksMm1r9J03 YZV7ahXcnaGIhCYQiCtf4wbeOPXnHyrOxY9RXBh1jTQYOZX94HxNB6BnBTKTKeO7giXv FwBg== X-Gm-Message-State: AOAM532jdqVVxRMa4eFc3IeTNl1yaX/7qQvVoevz6uyT1b5sYDMlmG2r KzBga17gt6J24T49pIj7GgELPZojYVpimw== X-Received: by 2002:a5d:42cf:: with SMTP id t15mr28985885wrr.267.1607955511222; Mon, 14 Dec 2020 06:18:31 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:f2e4:25b3:2b53:52cd]) by smtp.gmail.com with ESMTPSA id h5sm34126285wrp.56.2020.12.14.06.18.30 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Dec 2020 06:18:30 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, bbhatt@codeaurora.org, Loic Poulain Subject: [PATCH v5 02/10] bus: mhi: core: Add device hardware reset support Date: Mon, 14 Dec 2020 15:25:29 +0100 Message-Id: <1607955937-26951-3-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> References: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The MHI specification allows to perform a hard reset of the device when writing to the SOC_RESET register. It can be used to completely restart the device (e.g. in case of unrecoverable MHI error). This is up to the MHI controller driver to determine when this hard reset should be used, and in case of MHI errors, should be used as a reset of last resort (after standard MHI stack reset). This function is prefixed with 'mhi_reg' to highlight that this is a stateless function, the MHI layer do nothing except triggering the reset by writing into the right register, this is up to the caller to ensure right mhi_controller state (e.g. unregister the controller if necessary). Signed-off-by: Loic Poulain --- drivers/bus/mhi/core/main.c | 7 +++++++ include/linux/mhi.h | 7 +++++++ 2 files changed, 14 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c index a353d1e..9f8ce15 100644 --- a/drivers/bus/mhi/core/main.c +++ b/drivers/bus/mhi/core/main.c @@ -142,6 +142,13 @@ enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl) } EXPORT_SYMBOL_GPL(mhi_get_mhi_state); +void mhi_reg_soc_reset(struct mhi_controller *mhi_cntrl) +{ + mhi_write_reg(mhi_cntrl, mhi_cntrl->regs, MHI_SOC_RESET_REQ_OFFSET, + MHI_SOC_RESET_REQ); +} +EXPORT_SYMBOL_GPL(mhi_reg_soc_reset); + int mhi_map_single_no_bb(struct mhi_controller *mhi_cntrl, struct mhi_buf_info *buf_info) { diff --git a/include/linux/mhi.h b/include/linux/mhi.h index 2754742..8b1bf80 100644 --- a/include/linux/mhi.h +++ b/include/linux/mhi.h @@ -687,6 +687,13 @@ enum mhi_ee_type mhi_get_exec_env(struct mhi_controller *mhi_cntrl); enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl); /** + * mhi_reg_soc_reset - Trigger a device reset. This can be used as a last resort + * to reset and recover a device. + * @mhi_cntrl: MHI controller + */ +void mhi_reg_soc_reset(struct mhi_controller *mhi_cntrl); + +/** * mhi_device_get - Disable device low power mode * @mhi_dev: Device associated with the channel */ From patchwork Mon Dec 14 14:25:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 343524 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3035495jai; Mon, 14 Dec 2020 06:19:29 -0800 (PST) X-Google-Smtp-Source: ABdhPJzLt4BQB2L56rROMV4cvAoSsoS5h6xNF4+qnPYKUOrtm4QP/Ht1+PwJ4PlPY1JMTT6PEtOS X-Received: by 2002:aa7:cb49:: with SMTP id w9mr25860312edt.357.1607955569528; Mon, 14 Dec 2020 06:19:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607955569; cv=none; d=google.com; s=arc-20160816; b=NkklAPD4GTuUlwUWdgBblHGvucHVHWfHexNFFA47dER88WADCFZRPmKODKJs1CXSn7 rpbtuv968u57HchIK1gwXn4Kpbn9iLrWC4kUETtc1D5BFDTsMI3+ge6b3fLWwR+XBWyl nXiKIXt+xfT82rky3EFMMEghtBjZhuWvaFJpyhYihT6yFrrBx++yAByj82Z2fBt3QHx0 SQPtb8/ss/SFGmpN9dT6ruFXXE5cI1ANMhLUtxjj8GB+M/hKUxlpBrX4KAQbY10U9mQ3 56hL8fUtnaGMP3TWljzZ++crExo0ix6WhEF9O5JW3s7bTgWxDHL7VHBKNI7e27gXMBrc iBDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=u23Upri+mVTKw2vMmpl89dQD9K1UaxJ4Tc+YMYk9PIg=; b=pJL8z/bcNvWw13+9Gl92Io/eS36zLM+jMOgel/vNADTVfFtwYEXrLGmA9yKHBSBgRA DW1TZmrU+zozyG8/q7ZTmIZoE6kh6Rysy29afig1OlPayWcp7U66t4ymzD9b3FkE+yTy z/4Z/FaO7negM4ZCpx25GL0mpXiPYYPp+CNlI6X/MVXx9YW1pKSQR6PciKW67NSyyBL4 88WVITyCP/r1W0We/SeWZ7Qn/6t4q68s/crRBZTh+W8Au6UehsBuHvQVMQ08/bASw2jU 6NU1hUZDsUArobbXQ+vQbn6EGIQTpSCxNPGi3h9SXJjJpc7Dkj3BJC9d6NAGMx22YJZz IYag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UFY54rm7; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j14si10062778ejy.327.2020.12.14.06.19.29; Mon, 14 Dec 2020 06:19:29 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UFY54rm7; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2393862AbgLNOT1 (ORCPT + 15 others); Mon, 14 Dec 2020 09:19:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2440024AbgLNOTN (ORCPT ); Mon, 14 Dec 2020 09:19:13 -0500 Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7589CC061793 for ; Mon, 14 Dec 2020 06:18:33 -0800 (PST) Received: by mail-wr1-x443.google.com with SMTP id w5so12850231wrm.11 for ; Mon, 14 Dec 2020 06:18:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=u23Upri+mVTKw2vMmpl89dQD9K1UaxJ4Tc+YMYk9PIg=; b=UFY54rm7D8guWdkIPJyOoEdfm14WXruuMxCmE1FSZEtLfsBO1Wd6P0pxiuyYNv2Gne eQLwsQ2BSUf+GVwO275ecTkb/UC8ZRrTtA/ig3s5/wG2Hv1TJHxJVUeHNjN908qJ+Ris VUA2bslsCSZ8KZTAb1vqn98Z6SLgATWQqvxlQclQr8sr0P5h5sZy0JtyGIuYteg07nnN EawiRnir+QnZ+NI18qw9FKA/qHuUZ0jFWaVfj7JnI6QsCyxeOCX3r6pdPYrsrsYLWMW+ qqmpITKY6vHMRl5bxR1tccRHZ4njGFpIZ4P37MbkbfpD97Icjw5GCyNjeN4B4MJmAhnm 6Vfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=u23Upri+mVTKw2vMmpl89dQD9K1UaxJ4Tc+YMYk9PIg=; b=bjetDscUFnsP9ygbwEzqbiRmARQYW+sK8eRTyaTmHL/1e2UhWIYmd6P1/yYDVZDkZ3 VcFGmyu8JOSpPbv3+JokE8hiRXL/oUAi8OhZd0lkDkcw49Zuz2qML2Ckz4w1aoSiA7v8 BNpx5CDBbSF3qUWSiOOaaKQXVDcSGyXfYjG33uMQ0iI3DTNp4gX8wzQrtEEkaOSnrnEJ vVQFNZX2NjnlraQ9HW0EQNa+kjiU4jVaai5XNvx7+PJSIMqUbNqNyn3v/Y7ljIP/lJTE RUVI5MxEkkEI33fjn3k9VQCPDZ36b8ZTrNh2tXukRpGe22EezoG+h0SsW+KQ+EPkw3mu ju9A== X-Gm-Message-State: AOAM533GsFM31hLhyuNO6UXRaH/BvuBUIJgvUi3CBSgF3kXWgG3WW9Gb x9iesRbHRx2OJa6Ks6FVBPEHkg== X-Received: by 2002:adf:db43:: with SMTP id f3mr4719917wrj.70.1607955512084; Mon, 14 Dec 2020 06:18:32 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:f2e4:25b3:2b53:52cd]) by smtp.gmail.com with ESMTPSA id h5sm34126285wrp.56.2020.12.14.06.18.31 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Dec 2020 06:18:31 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, bbhatt@codeaurora.org, Loic Poulain Subject: [PATCH v5 03/10] mhi: pci-generic: Increase number of hardware events Date: Mon, 14 Dec 2020 15:25:30 +0100 Message-Id: <1607955937-26951-4-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> References: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org If the IPA (IP hardware accelerator) is starved of event ring elements, the modem is crashing (SDX55). That can be prevented by setting a larger number of events (i.e 2 x number of channel ring elements). Tested with FN980m module. Signed-off-by: Loic Poulain Reviewed-by: Manivannan Sadhasivam --- drivers/bus/mhi/pci_generic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index e3df838..13a7e4f 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -91,7 +91,7 @@ struct mhi_pci_dev_info { #define MHI_EVENT_CONFIG_HW_DATA(ev_ring, ch_num) \ { \ - .num_elements = 128, \ + .num_elements = 256, \ .irq_moderation_ms = 5, \ .irq = (ev_ring) + 1, \ .priority = 1, \ From patchwork Mon Dec 14 14:25:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 343525 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3035506jai; Mon, 14 Dec 2020 06:19:30 -0800 (PST) X-Google-Smtp-Source: ABdhPJyW3f6JGzwGN0OAEaJCSXRp9/QxKdA7coSoqt39zPGGDNVbqIIMdwSksvuLxpBWuNunjOSn X-Received: by 2002:a17:906:1792:: with SMTP id t18mr4695623eje.282.1607955570155; Mon, 14 Dec 2020 06:19:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607955570; cv=none; d=google.com; s=arc-20160816; b=e7N2SISKHPY3+Hg5k69i7T8+N4ZJOfrCkHjjnHoAwVeGxEgmMZVobYrPy1GQngzXg9 75jNv40jjtnUlQKPvpec6ojAfpRPEPSz1phqaeOZRTU+JqO7TME81Cn6yc8KP9VfUjdJ PUnfYgT3puc+j/SFQ4mYQB+MPBo6LSW3NVMQXM2bLD0Nkdr1f0oWUuOdozndygzYBFyz tGq64jYrBGpp9NMPCpeFdG7FFOHSQzGDR2vig8rFgFGnnSs/m3d0a7n5Qf88KI6vunMt 2c8HIlrSAY6+I+70GXjOKzQJwFD7ErHa228OUOHQ75mVqCuknPSXLqNM8juZ+SEZdXrT rRKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=b6KTirZejd3sDDi2THGHxOo7aZHrY3+M9Y8zIKfmv2E=; b=If5Q89hikFQRr6W9Wt6Giug6yy+6Nc5lxqaLAkj7ja0Eg4DvFdU/Fqpvyut5fQmW9/ tzstGM/AHw2ohFlDw1IQDQ8C6//p9QyI3QzKqbsbbsHoz+5mBK7zsc79YuCOUd65/tnM eNZTqqXNUr3JFVSemAQjyFQ6/BDCUj3Wa/DKPGLQS0KVri1bsOph94vxMBD69MrX7OlE EQa264kwpFMgawtc5rCCsIJmX8nV5Pvnm49bGmou1oIpksAPta3h+NwfSxktHq62CIVa INJAffweiyjwhbvELIEmvcmiIrAwfElA+s6B9iHwhRmbeXOSMYGRPbotPmUL0yb3I2GR qfOg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ISXwCHro; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j14si10062778ejy.327.2020.12.14.06.19.29; Mon, 14 Dec 2020 06:19:30 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ISXwCHro; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2439156AbgLNOT2 (ORCPT + 15 others); Mon, 14 Dec 2020 09:19:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2440025AbgLNOTO (ORCPT ); Mon, 14 Dec 2020 09:19:14 -0500 Received: from mail-wm1-x344.google.com (mail-wm1-x344.google.com [IPv6:2a00:1450:4864:20::344]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E5FAC061794 for ; Mon, 14 Dec 2020 06:18:34 -0800 (PST) Received: by mail-wm1-x344.google.com with SMTP id k10so13861598wmi.3 for ; Mon, 14 Dec 2020 06:18:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=b6KTirZejd3sDDi2THGHxOo7aZHrY3+M9Y8zIKfmv2E=; b=ISXwCHroDN4ZRRIDtVw1624xKGOITa2X85ynUDO9lihneRxxxGnPYuySnvfD8D/Jn7 rQdb8V/MxNOtk8hbTLF6mvbZwlvyvwpy3JxnobExi9xso4ujd52RfxDvrKyh95CVPAcz 4x7AdkVoKw/LZ0f/Ov7HVVvshvEnaYfDM4NsSpRtl9jkH4nSwBOT6DrQ1kXga7SG3Me0 5kI1GFknP9Umog3FPAkFIvuLytatTcCyMFKPhTogNDRh7X702Y7A3ngjKTmsBjPqO29T Nyw+HQD/zsWds6YIlScQUGgbmloeD2Fku2/JefZdD2GaoejUu+y41NnxFiP7cyC66yDj v6uQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=b6KTirZejd3sDDi2THGHxOo7aZHrY3+M9Y8zIKfmv2E=; b=sGxuwswdnP1fMU8RFrq7QAPZ3pok2HcR8ztifhfgXC46fhJA8u46yriZaoI3+2Ke8z 6+6wTC7g5xidpugmhk4/1KPAkRe9AE71vGITaAkWJBqS00iFID8uDp9cweRXHY21zPaw P/hWkit4vC/IeooQD2/lyHrECA6GLK48qlTv7TC5+W5e2+6b938r6Q3yTLlrKbuhSzcd N1dRqCO8F8MoEAMAJC2zFHiWp1imrWfR3K6puhbiaf0fyTTkSNwROZDc3pHYjnp1Vo/Z 7NDG3P7krqBIju8GtKe7ippDol4hG/fdUzriMnAKOl4/ihlItvkiEmFL/etOahpq3IcL d4BA== X-Gm-Message-State: AOAM5323Btr1auAsIlTdprSQ/+LKBvKA3Dntu/vECyOOjdkdbXQ5Liol 9yqN93f0WjF3r0S//Eslh6Aq6ykdX1Iydw== X-Received: by 2002:a7b:ca47:: with SMTP id m7mr27921734wml.153.1607955512977; Mon, 14 Dec 2020 06:18:32 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:f2e4:25b3:2b53:52cd]) by smtp.gmail.com with ESMTPSA id h5sm34126285wrp.56.2020.12.14.06.18.32 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Dec 2020 06:18:32 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, bbhatt@codeaurora.org, Loic Poulain Subject: [PATCH v5 04/10] mhi: pci_generic: Enable burst mode for hardware channels Date: Mon, 14 Dec 2020 15:25:31 +0100 Message-Id: <1607955937-26951-5-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> References: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hardware channels have a feature called burst mode that allows to queue transfer ring element(s) (TRE) to a channel without ringing the device doorbell. In that mode, the device is polling the channel context for new elements. This reduces the frequency of host initiated doorbells and increase throughput. Create a new dedicated macro for hardware channels with burst enabled. Signed-off-by: Loic Poulain Reviewed-by: Manivannan Sadhasivam --- drivers/bus/mhi/pci_generic.c | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 13a7e4f..077595c 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -76,6 +76,36 @@ struct mhi_pci_dev_info { .offload_channel = false, \ } +#define MHI_CHANNEL_CONFIG_HW_UL(ch_num, ch_name, el_count, ev_ring) \ + { \ + .num = ch_num, \ + .name = ch_name, \ + .num_elements = el_count, \ + .event_ring = ev_ring, \ + .dir = DMA_TO_DEVICE, \ + .ee_mask = BIT(MHI_EE_AMSS), \ + .pollcfg = 0, \ + .doorbell = MHI_DB_BRST_ENABLE, \ + .lpm_notify = false, \ + .offload_channel = false, \ + .doorbell_mode_switch = true, \ + } \ + +#define MHI_CHANNEL_CONFIG_HW_DL(ch_num, ch_name, el_count, ev_ring) \ + { \ + .num = ch_num, \ + .name = ch_name, \ + .num_elements = el_count, \ + .event_ring = ev_ring, \ + .dir = DMA_FROM_DEVICE, \ + .ee_mask = BIT(MHI_EE_AMSS), \ + .pollcfg = 0, \ + .doorbell = MHI_DB_BRST_ENABLE, \ + .lpm_notify = false, \ + .offload_channel = false, \ + .doorbell_mode_switch = true, \ + } + #define MHI_EVENT_CONFIG_DATA(ev_ring) \ { \ .num_elements = 128, \ @@ -110,8 +140,8 @@ static const struct mhi_channel_config modem_qcom_v1_mhi_channels[] = { MHI_CHANNEL_CONFIG_DL(15, "QMI", 4, 0), MHI_CHANNEL_CONFIG_UL(20, "IPCR", 8, 0), MHI_CHANNEL_CONFIG_DL(21, "IPCR", 8, 0), - MHI_CHANNEL_CONFIG_UL(100, "IP_HW0", 128, 1), - MHI_CHANNEL_CONFIG_DL(101, "IP_HW0", 128, 2), + MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 128, 1), + MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 128, 2), }; static const struct mhi_event_config modem_qcom_v1_mhi_events[] = { From patchwork Mon Dec 14 14:25:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 343529 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3035910jai; Mon, 14 Dec 2020 06:19:58 -0800 (PST) X-Google-Smtp-Source: ABdhPJxFgvHCzoOj+D//5e0gN/LNr4oj3o/x52p3OaD+8Wmk1HnCGYdoJMFqXwQ/aS4aNaWGopUp X-Received: by 2002:a17:906:a106:: with SMTP id t6mr23049076ejy.63.1607955597908; Mon, 14 Dec 2020 06:19:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607955597; cv=none; d=google.com; s=arc-20160816; b=TlccMTpwRB8ZaLfhlioJnEUUhp7d5leigjDkZVvVjN/72u2YLji0tDfJzXb5h9OEON R+Li1612ptL3dXQXlHOQ2SqvtGeTrc9rAEdmSFBipawF+DEyDyTsBybSQfSXn5sFGV98 dPm1F0mhUGnmfX5lC1BjIDgxMrmOM72TU5DzgZbGQlls6gbRVUFhCHjUdLOchiIZomnY kAtIpn/uDkTKThySDz8q2nwFXBmHbFIK50jBCv4VupnlLoVyJ/YldVfHMjv4TCVQhbfb pTR44Yr9JL7U0bXgW4JSmrJN/3I+yNWLPrmuCLxd719FTkSf1vL9gK1qXbOGGByFkG9a 8DmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=A8ghSZC0o/frzSbWNus1KBuo0kNzFEb9nrR9JTZVUY8=; b=F/ncn3+CzJD6pkxwyYVin6wlxDVPjXRs0aT0mg02Xy09zbfuPd74cgEc43DW4PXUGE dtz+UDxU7elzJcavle+4rPqGTFxULM96tz1HNktPTBGvp47LfPaoR2ThGcLuqVwEPPll a8OhTagsGNLtwSFS7gfvTQ6585dS5qNdgmRznSN/JkboBNezU7y7LxkPqyAYXJxG02jA W5IOgAyYSTifVRw2qdBbg1I4+wbQmMwGICUjwRSjWd3zE31IDkPtIAOqAenAEEnmcfHV PLwGCGOoM2mWYXCVT/vLRffocIiJmz2oH+kWXuA63Y/0sMFhMl6RZXCen2ua7zamOa11 gm3w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DZIM9YJf; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j14si10062778ejy.327.2020.12.14.06.19.57; Mon, 14 Dec 2020 06:19:57 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DZIM9YJf; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2440025AbgLNOT4 (ORCPT + 15 others); Mon, 14 Dec 2020 09:19:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43492 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2440033AbgLNOTy (ORCPT ); Mon, 14 Dec 2020 09:19:54 -0500 Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 74A30C06179C for ; Mon, 14 Dec 2020 06:18:35 -0800 (PST) Received: by mail-wm1-x341.google.com with SMTP id 190so3622481wmz.0 for ; Mon, 14 Dec 2020 06:18:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=A8ghSZC0o/frzSbWNus1KBuo0kNzFEb9nrR9JTZVUY8=; b=DZIM9YJfKhpnscyFz4qfCprhv5PizD2Bsbgb2e+lHLVNting01MbTYAPY6JbFDy3I0 69mLqJGlFZa0ow69vxsO5ZpaBZHrdEVxeNr74bY2PNRDgsqjoU/lM+vfceRROMl0SKmV JMIyZNA3ATLtqPbj2Ki8cUVwRZUbZNpSeyUwYkUipir8/bXnC7CvbP1TkSqdpS0EWyzf iSgzL75UJOZWxPFlOc36YGcz+Gq74vnzI9rYEqHk8LB2uyJ3d6wV4rkK1ysosZ1UG23y v6+ZGoBIKGjwx+wswEdsk388p2Kru13WBM5z847dp/9iLuKMthmUHKe1Px+D1/a5rtYd Nd7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=A8ghSZC0o/frzSbWNus1KBuo0kNzFEb9nrR9JTZVUY8=; b=cj1KiJ1fneQ61zm7CwlGNWC9WTY9qfT6oMMM2mHwry/3RGlFRGiIZXF7TNJdqcvBHG 0V3hIv2WPazMh99FEWa25wPXFpqFCGryERljRV+y8h8zaEt0pXHRcldLNnqo+zTlPKrl 4xi4ZZpMOw2qHd+lyuSuQhY3q9A8BAO+0fETX4eet/ZW+KAkd0GHtA97ViWT8TQjZuDK 84l289G9mlZYVBeKBQkg3mkIin2bkzcOvj1LQ3UuiRuQh9rRUfL12VuirSqe/08ntf5m XyBEYHTOAl4WaxjNUn4OFxhqgEefow3CdaOyOo+cqDSsiG00kyZDdDJfVsOKaayqlqhf GB4g== X-Gm-Message-State: AOAM5301ojJoxIAdmibZ4oSFi8OShoZQN3reVdzpUacbv+5UUZAei60b qSUTpVU8Z6mtxF1DRKYPz9CfAA== X-Received: by 2002:a1c:e3c4:: with SMTP id a187mr27686834wmh.58.1607955514129; Mon, 14 Dec 2020 06:18:34 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:f2e4:25b3:2b53:52cd]) by smtp.gmail.com with ESMTPSA id h5sm34126285wrp.56.2020.12.14.06.18.33 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Dec 2020 06:18:33 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, bbhatt@codeaurora.org, Loic Poulain Subject: [PATCH v5 05/10] mhi: pci_generic: Add support for reset Date: Mon, 14 Dec 2020 15:25:32 +0100 Message-Id: <1607955937-26951-6-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> References: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for resetting the device, reset can be triggered in case of error or manually via sysfs (/sys/bus/pci/devices/*/reset). Signed-off-by: Loic Poulain --- drivers/bus/mhi/pci_generic.c | 121 +++++++++++++++++++++++++++++++++++++----- 1 file changed, 108 insertions(+), 13 deletions(-) -- 2.7.4 Reviewed-by: Hemant Kumar diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 077595c..2521cd4 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -8,6 +8,7 @@ * Copyright (C) 2020 Linaro Ltd */ +#include #include #include #include @@ -15,6 +16,7 @@ #define MHI_PCI_DEFAULT_BAR_NUM 0 +#define MHI_POST_RESET_DELAY_MS 500 /** * struct mhi_pci_dev_info - MHI PCI device specific information * @config: MHI controller configuration @@ -177,6 +179,16 @@ static const struct pci_device_id mhi_pci_id_table[] = { }; MODULE_DEVICE_TABLE(pci, mhi_pci_id_table); +enum mhi_pci_device_status { + MHI_PCI_DEV_STARTED, +}; + +struct mhi_pci_device { + struct mhi_controller mhi_cntrl; + struct pci_saved_state *pci_state; + unsigned long status; +}; + static int mhi_pci_read_reg(struct mhi_controller *mhi_cntrl, void __iomem *addr, u32 *out) { @@ -196,6 +208,20 @@ static void mhi_pci_status_cb(struct mhi_controller *mhi_cntrl, /* Nothing to do for now */ } +static bool mhi_pci_is_alive(struct mhi_controller *mhi_cntrl) +{ + struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev); + u16 vendor = 0; + + if (pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor)) + return false; + + if (vendor == (u16) ~0 || vendor == 0) + return false; + + return true; +} + static int mhi_pci_claim(struct mhi_controller *mhi_cntrl, unsigned int bar_num, u64 dma_mask) { @@ -291,16 +317,20 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { const struct mhi_pci_dev_info *info = (struct mhi_pci_dev_info *) id->driver_data; const struct mhi_controller_config *mhi_cntrl_config; + struct mhi_pci_device *mhi_pdev; struct mhi_controller *mhi_cntrl; int err; dev_dbg(&pdev->dev, "MHI PCI device found: %s\n", info->name); - mhi_cntrl = mhi_alloc_controller(); - if (!mhi_cntrl) + mhi_pdev = devm_kzalloc(&pdev->dev, sizeof(*mhi_pdev), GFP_KERNEL); + if (!mhi_pdev) return -ENOMEM; mhi_cntrl_config = info->config; + mhi_cntrl = &mhi_pdev->mhi_cntrl; + + mhi_initialize_controller(mhi_cntrl); mhi_cntrl->cntrl_dev = &pdev->dev; mhi_cntrl->iova_start = 0; mhi_cntrl->iova_stop = DMA_BIT_MASK(info->dma_data_width); @@ -315,17 +345,21 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) err = mhi_pci_claim(mhi_cntrl, info->bar_num, DMA_BIT_MASK(info->dma_data_width)); if (err) - goto err_release; + return err; err = mhi_pci_get_irqs(mhi_cntrl, mhi_cntrl_config); if (err) - goto err_release; + return err; + + pci_set_drvdata(pdev, mhi_pdev); - pci_set_drvdata(pdev, mhi_cntrl); + /* Have stored pci confspace at hand for restore in sudden PCI error */ + pci_save_state(pdev); + mhi_pdev->pci_state = pci_store_saved_state(pdev); err = mhi_register_controller(mhi_cntrl, mhi_cntrl_config); if (err) - goto err_release; + return err; /* MHI bus does not power up the controller by default */ err = mhi_prepare_for_power_up(mhi_cntrl); @@ -340,33 +374,94 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) goto err_unprepare; } + set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + return 0; err_unprepare: mhi_unprepare_after_power_down(mhi_cntrl); err_unregister: mhi_unregister_controller(mhi_cntrl); -err_release: - mhi_free_controller(mhi_cntrl); return err; } static void mhi_pci_remove(struct pci_dev *pdev) { - struct mhi_controller *mhi_cntrl = pci_get_drvdata(pdev); + struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { + mhi_power_down(mhi_cntrl, true); + mhi_unprepare_after_power_down(mhi_cntrl); + } - mhi_power_down(mhi_cntrl, true); - mhi_unprepare_after_power_down(mhi_cntrl); mhi_unregister_controller(mhi_cntrl); - mhi_free_controller(mhi_cntrl); } +static void mhi_pci_reset_prepare(struct pci_dev *pdev) +{ + struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + dev_info(&pdev->dev, "reset\n"); + + /* Clean up MHI state */ + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { + mhi_power_down(mhi_cntrl, false); + mhi_unprepare_after_power_down(mhi_cntrl); + } + + /* cause internal device reset */ + mhi_reg_soc_reset(mhi_cntrl); + + /* Be sure device reset has been executed */ + msleep(MHI_POST_RESET_DELAY_MS); +} + +static void mhi_pci_reset_done(struct pci_dev *pdev) +{ + struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + int err; + + /* Restore initial known working PCI state */ + pci_load_saved_state(pdev, mhi_pdev->pci_state); + pci_restore_state(pdev); + + /* Is device status available ? */ + if (!mhi_pci_is_alive(mhi_cntrl)) { + dev_err(&pdev->dev, "reset failed\n"); + return; + } + + err = mhi_prepare_for_power_up(mhi_cntrl); + if (err) { + dev_err(&pdev->dev, "failed to prepare MHI controller\n"); + return; + } + + err = mhi_sync_power_up(mhi_cntrl); + if (err) { + dev_err(&pdev->dev, "failed to power up MHI controller\n"); + mhi_unprepare_after_power_down(mhi_cntrl); + return; + } + + set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); +} + +static const struct pci_error_handlers mhi_pci_err_handler = { + .reset_prepare = mhi_pci_reset_prepare, + .reset_done = mhi_pci_reset_done, +}; + static struct pci_driver mhi_pci_driver = { .name = "mhi-pci-generic", .id_table = mhi_pci_id_table, .probe = mhi_pci_probe, - .remove = mhi_pci_remove + .remove = mhi_pci_remove, + .err_handler = &mhi_pci_err_handler, }; module_pci_driver(mhi_pci_driver); From patchwork Mon Dec 14 14:25:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 343528 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3035904jai; Mon, 14 Dec 2020 06:19:57 -0800 (PST) X-Google-Smtp-Source: ABdhPJyUzju2AWbvhNtdLEPx2dBzX+/jCDZd+WIT9jTSxSsaxZSLp3uC89w3kaE1EgkEIW49YEKn X-Received: by 2002:a05:6402:a53:: with SMTP id bt19mr25482425edb.104.1607955597438; Mon, 14 Dec 2020 06:19:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607955597; cv=none; d=google.com; s=arc-20160816; b=ZcAAM8+rDonHOgBURJ6X8UtdAguUfnqjXokI3mdo+a9rTBNAs0xa8JCwL6R5WVQwGa aG7qOJcaDql1xQVqW3rLPY9kHRkkm7pTJn1BfaLBluJNBFECXWqXXMdMkgGKXKPv50FE Io8soG2cU8PPcNe2+mA49n3h+itX2ts276paJfFYGPVTMnEcINFNIXdFFTJ80QR1PrMB RmstWfmU5vL7DrNKuQYpG4ZWxBtefMTFfP6/tdMmQORtrboJVrHfZcRNjK2QSaLUjp5d sN2wEo186dAg3zs76rfATA1aoAkD4cYMwdZR0wKj4yhgnjL66rIJ7IpT3k8yG7YaB33H ODew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=SQkFVpz5akWmuWPyyDeP6Bwq5eCvtJqCABU8uWkUUW8=; b=HjPLPOLNMHknLG4cH/EJrxxHd6JE8lrbwER/BQenzGCeiiNfV3jJMf2dHl6Qak7w4J Nl/JrFzdsu8e7exfGf6arf1nlM82jOSBhwwzFDuV9EC/1bPqDVKIeVTb6/S5Z8mL5ul+ sbJ204hPyiv9lTVohUY6Zmcky1jdSfRJlMFHrqI6Z7xKuzhhpmHR95yrW2YIiVXa6m01 A1xm3xsWsia7p5kN40BcfecqXdLKCHob3qlJbyaTZF2xRR2UYK7SiQtlqKV6tk2i7PZx 1qCZ7ZQ0gR9AcKkSO99h0nQvLG1llEWtckJgvcom25GzD30/64WqGCFOuCuPKon2mB+H IULQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KfPVnnKM; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j14si10062778ejy.327.2020.12.14.06.19.57; Mon, 14 Dec 2020 06:19:57 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KfPVnnKM; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731900AbgLNOT4 (ORCPT + 15 others); Mon, 14 Dec 2020 09:19:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43494 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2440025AbgLNOTy (ORCPT ); Mon, 14 Dec 2020 09:19:54 -0500 Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4E88BC0617A6 for ; Mon, 14 Dec 2020 06:18:36 -0800 (PST) Received: by mail-wr1-x443.google.com with SMTP id a12so16568142wrv.8 for ; Mon, 14 Dec 2020 06:18:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SQkFVpz5akWmuWPyyDeP6Bwq5eCvtJqCABU8uWkUUW8=; b=KfPVnnKMiGDLSeA2ZexpxK+77+GkQkkrc/Uxi0TSjcPyR6XKdZzepvIzOFG790bqBu h94CS6tyk0POrq9V8JZSIej6ybMO/itccr7pG30NoTFUCnaNT2sJpI2yni5MqFJDcRlO h8OIykV6iWGc7pvLSM8Ig188cCAbhlPRhQPYNHs8/mQrNbG3m8Aid9c8ZeAlnZLenzjZ mdiULvQbePf5Y4tGjwdR2Yjp6+hfudglByYktSUb1WCKS3Uf5DUgsOTwhrmVc0LXjs0i udBaqMl5MMeI+cU0QqGgVVZLriZsq70BFUYqTsZdrz4fyyjD0Fvw8zWL6ek5a2cVFbIS 8Pqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SQkFVpz5akWmuWPyyDeP6Bwq5eCvtJqCABU8uWkUUW8=; b=t2Q7H0qvgJSpkbEBQJ2C+AFszUGMHVti2xrhnhK9NKdVYfJD1rBp0WIyo6ZUF6A1m6 mz2Kl/Rm86RLqFv8h8GQUBFUcmKw+D1VuMXomSeCyor/kCJptd3/CpAzNPWH5++y8a1U wvTjCJuZdykAXsjfdxsJXHaXK8Rd7rW/2yVf+OaJatWntYrGKZFlGFyl2X6PNPtD2wky lNeC6B9b35kQYB1C3GYiHZEcKVdMAmQxCZzTOfKHiCJk3XFAMcDyk2Wsr3xHRDpC3Rjh jL80kZS/bAvzv7FCNXlrq9lWB2EAByza7EIt3Ch9q3Jo5YGSmc7aSZPxwSvFJi1jfkaS 70bg== X-Gm-Message-State: AOAM5306zeO+cE6EU0I2T7VHXNEAsou7JtQoH8g3v3347NOua0FEDHE/ aTkFqWTYke2UOkjhIBOHl0BudA== X-Received: by 2002:adf:bc92:: with SMTP id g18mr28636372wrh.160.1607955515017; Mon, 14 Dec 2020 06:18:35 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:f2e4:25b3:2b53:52cd]) by smtp.gmail.com with ESMTPSA id h5sm34126285wrp.56.2020.12.14.06.18.34 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Dec 2020 06:18:34 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, bbhatt@codeaurora.org, Loic Poulain Subject: [PATCH v5 06/10] mhi: pci_generic: Add suspend/resume/recovery procedure Date: Mon, 14 Dec 2020 15:25:33 +0100 Message-Id: <1607955937-26951-7-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> References: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for system wide suspend/resume. During suspend, MHI device controller must be put in M3 state and PCI bus in D3 state. Add a recovery procedure allowing to reinitialize the device in case of error during resume steps, which can happen if device loses power (and so its context) while system suspend. Signed-off-by: Loic Poulain Reviewed-by Hemant Kumar --- drivers/bus/mhi/pci_generic.c | 102 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 2521cd4..0936701 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -13,6 +13,7 @@ #include #include #include +#include #define MHI_PCI_DEFAULT_BAR_NUM 0 @@ -186,6 +187,7 @@ enum mhi_pci_device_status { struct mhi_pci_device { struct mhi_controller mhi_cntrl; struct pci_saved_state *pci_state; + struct work_struct recovery_work; unsigned long status; }; @@ -313,6 +315,48 @@ static void mhi_pci_runtime_put(struct mhi_controller *mhi_cntrl) /* no PM for now */ } +static void mhi_pci_recovery_work(struct work_struct *work) +{ + struct mhi_pci_device *mhi_pdev = container_of(work, struct mhi_pci_device, + recovery_work); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev); + int err; + + dev_warn(&pdev->dev, "device recovery started\n"); + + /* Clean up MHI state */ + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { + mhi_power_down(mhi_cntrl, false); + mhi_unprepare_after_power_down(mhi_cntrl); + } + + /* Check if we can recover without full reset */ + pci_set_power_state(pdev, PCI_D0); + pci_load_saved_state(pdev, mhi_pdev->pci_state); + pci_restore_state(pdev); + + if (!mhi_pci_is_alive(mhi_cntrl)) + goto err_try_reset; + + err = mhi_prepare_for_power_up(mhi_cntrl); + if (err) + goto err_try_reset; + + err = mhi_sync_power_up(mhi_cntrl); + if (err) + goto err_unprepare; + + set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + return; + +err_unprepare: + mhi_unprepare_after_power_down(mhi_cntrl); +err_try_reset: + if (pci_reset_function(pdev)) + dev_err(&pdev->dev, "Recovery failed\n"); +} + static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { const struct mhi_pci_dev_info *info = (struct mhi_pci_dev_info *) id->driver_data; @@ -327,6 +371,8 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) if (!mhi_pdev) return -ENOMEM; + INIT_WORK(&mhi_pdev->recovery_work, mhi_pci_recovery_work); + mhi_cntrl_config = info->config; mhi_cntrl = &mhi_pdev->mhi_cntrl; @@ -391,6 +437,8 @@ static void mhi_pci_remove(struct pci_dev *pdev) struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + cancel_work_sync(&mhi_pdev->recovery_work); + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { mhi_power_down(mhi_cntrl, true); mhi_unprepare_after_power_down(mhi_cntrl); @@ -456,12 +504,66 @@ static const struct pci_error_handlers mhi_pci_err_handler = { .reset_done = mhi_pci_reset_done, }; +static int __maybe_unused mhi_pci_suspend(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct mhi_pci_device *mhi_pdev = dev_get_drvdata(dev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + cancel_work_sync(&mhi_pdev->recovery_work); + + /* Transition to M3 state */ + mhi_pm_suspend(mhi_cntrl); + + pci_save_state(pdev); + pci_disable_device(pdev); + pci_wake_from_d3(pdev, true); + pci_set_power_state(pdev, PCI_D3hot); + + return 0; +} + +static int __maybe_unused mhi_pci_resume(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct mhi_pci_device *mhi_pdev = dev_get_drvdata(dev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + int err; + + pci_set_power_state(pdev, PCI_D0); + pci_restore_state(pdev); + pci_set_master(pdev); + + err = pci_enable_device(pdev); + if (err) + goto err_recovery; + + /* Exit M3, transition to M0 state */ + err = mhi_pm_resume(mhi_cntrl); + if (err) { + dev_err(&pdev->dev, "failed to resume device: %d\n", err); + goto err_recovery; + } + + return 0; + +err_recovery: + /* The device may have loose power or crashed, try recovering it */ + queue_work(system_long_wq, &mhi_pdev->recovery_work); + return 0; +} + +static const struct dev_pm_ops mhi_pci_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(mhi_pci_suspend, mhi_pci_resume) +}; + static struct pci_driver mhi_pci_driver = { .name = "mhi-pci-generic", .id_table = mhi_pci_id_table, .probe = mhi_pci_probe, .remove = mhi_pci_remove, .err_handler = &mhi_pci_err_handler, + .driver.pm = &mhi_pci_pm_ops }; module_pci_driver(mhi_pci_driver); From patchwork Mon Dec 14 14:25:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 343527 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3035884jai; Mon, 14 Dec 2020 06:19:57 -0800 (PST) X-Google-Smtp-Source: ABdhPJwZIagRTB7rGblv/hc5+iG03ZLj1aj2wu/qG9ODb/kAoCt3IFqjn9sG8VdePgmk1unaBWG5 X-Received: by 2002:aa7:ca03:: with SMTP id y3mr25338772eds.87.1607955596947; Mon, 14 Dec 2020 06:19:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607955596; cv=none; d=google.com; s=arc-20160816; b=1KJt9NMXtWJwe4i7kZRH08UacerLaG8xEv0dzK9MFylrCBpwwUO1YsDsG96Yvtm10l RuEC/5vsHSSiWrWQ9i0UHdxhd5j1Sj4HFfIY2T4IV1nSNdNJHIsHf9A1fnwPiuzJK0Nr ke2L/uNCHL01fm6BpBNl1x1AGUmbPqOuQcge3sVMKAazUykEpxqB8yledI4KLRH6Is+R 2/J9/gJe6bveLi3AvNJeq/O0gYzjepDSqGlUKxaUfFicmPBlAH3yfImFtQWhcoF426L3 ecVn18M3S5ge639gSxcoxObpbFJdmKJg8toDQLMVgcZwXLOlBgMqUCgtawBe8ipFoIsR CUVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=S8Vz3+deGb93+mWrPvYJGVU2WIAkVuBlEajZVdacAuo=; b=Rcr8lwNZFV+xNfLwx3TGtYpQyUKtKIycb78lvOhKdjV+bnCW+rvHgWNIH8cx3E1voQ ljJZTMBy8mNJ7Vn6YhAeNGyYoy+f7ZgxwAr0gaAJ9svsszTn+X1l36e3mnmvziBDAV9F T4O5Y8KfYZmz3XgimN5RRVZ6S5wZ+zveFQJ5mO+0hphGLsNOv5eaDBJAOzoavuE14xET HQEWeOLC5U/lGK9No99fuUBu4LbOqQvzHiKWxY1uIQAOFnDMfVCIc3AJIGNhIwmL7e9e layCoh0qwhWS3Z5TTTm4ZtVlJ8+j3s7wtbdqrhpRjRqDEH4iLyhDd221ICowMIJ7KcNX M/2A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QNDgGHdT; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j14si10062778ejy.327.2020.12.14.06.19.56; Mon, 14 Dec 2020 06:19:56 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QNDgGHdT; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2440037AbgLNOT4 (ORCPT + 15 others); Mon, 14 Dec 2020 09:19:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43496 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2440034AbgLNOTy (ORCPT ); Mon, 14 Dec 2020 09:19:54 -0500 Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com [IPv6:2a00:1450:4864:20::441]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4CC49C0617A7 for ; Mon, 14 Dec 2020 06:18:37 -0800 (PST) Received: by mail-wr1-x441.google.com with SMTP id 91so16572236wrj.7 for ; Mon, 14 Dec 2020 06:18:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=S8Vz3+deGb93+mWrPvYJGVU2WIAkVuBlEajZVdacAuo=; b=QNDgGHdTYCp9W2u1m6Zf7bM9gDys3YKtPrt3yC6niUomcomswTVYajt6YCvLvljK2G ZPY4d5RY5RiWfg+lHzAQuoBc5dzsiXfV4BiirS2Usn9gWYwkKq8ZNZWFY8MRN+3a6GQ+ IkOlRXq2ItSPelfuzhibNJ8roXwxqpiFGzlcaULWBjMDKdZSokWBRQrQUAfemVqAuCmu 1Xs+LqkxG+5Dn4OYWyI+yuNXEbrW7yzfpkJVbpMkPX4iJrHO0UVOkYoT8qGVMuy8dhBt BqYSmAZDmjiCYvCUw3h6j/mEdXX9oNZuWDKH8xHnTXydefy9j8pkumzXph67X4X6kAbD X3LA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=S8Vz3+deGb93+mWrPvYJGVU2WIAkVuBlEajZVdacAuo=; b=g8W5orYyOmSswR5qINz/HR5BiCf7dZ/w4dbFVCk9Ajxx4wsQst+VQdKGRa//gTQzTE 3bTWEXBvY6H2YNxiPOtUpK6xXz4/5btEgQ2ciomQrGc2xcUSY4/MiTh37nAdLtWb0C6t ro271MXjcTIMmlNhVszXDXwGzhLDKPlP0U5mK9mx35ebQ+Mft4uCWT10WAG+Zo5xbMea Ymc41K7stROChIPInqrlFc9lFVKnVR4Orv5x6Sv4djdMz0rSTjxO2fWBykeY43Hfx8uB 153Av89rDdjSJp236euUQjltNezgU1WJJA3HEMPSYFFP9J801KxTJ2YAiVnrn7q8N6dw 301w== X-Gm-Message-State: AOAM531aMDw8LInE4A7XC7C2/cq9WYfiuikzmg7fNWfUst4MIKnDwVt4 qi9XJ35zDGwLaM/envkZI2sXVg== X-Received: by 2002:adf:8b15:: with SMTP id n21mr28746992wra.426.1607955516016; Mon, 14 Dec 2020 06:18:36 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:f2e4:25b3:2b53:52cd]) by smtp.gmail.com with ESMTPSA id h5sm34126285wrp.56.2020.12.14.06.18.35 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Dec 2020 06:18:35 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, bbhatt@codeaurora.org, Loic Poulain Subject: [PATCH v5 07/10] mhi: pci_generic: Add PCI error handlers Date: Mon, 14 Dec 2020 15:25:34 +0100 Message-Id: <1607955937-26951-8-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> References: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In AER capable root complex, errors are reported to the host which can then act accordingly and perform PCI recovering procedure. This patch enables error reporting and implements error_detected, slot_reset and resume callbacks. Signed-off-by: Loic Poulain Reviewed-by Hemant Kumar --- drivers/bus/mhi/pci_generic.c | 50 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 0936701..b4a68bd 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -8,6 +8,7 @@ * Copyright (C) 2020 Linaro Ltd */ +#include #include #include #include @@ -403,6 +404,8 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) pci_save_state(pdev); mhi_pdev->pci_state = pci_store_saved_state(pdev); + pci_enable_pcie_error_reporting(pdev); + err = mhi_register_controller(mhi_cntrl, mhi_cntrl_config); if (err) return err; @@ -499,7 +502,54 @@ static void mhi_pci_reset_done(struct pci_dev *pdev) set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); } +static pci_ers_result_t mhi_pci_error_detected(struct pci_dev *pdev, + pci_channel_state_t state) +{ + struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + dev_err(&pdev->dev, "PCI error detected, state = %u\n", state); + + if (state == pci_channel_io_perm_failure) + return PCI_ERS_RESULT_DISCONNECT; + + /* Clean up MHI state */ + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { + mhi_power_down(mhi_cntrl, false); + mhi_unprepare_after_power_down(mhi_cntrl); + } else { + /* Nothing to do */ + return PCI_ERS_RESULT_RECOVERED; + } + + pci_disable_device(pdev); + + return PCI_ERS_RESULT_NEED_RESET; +} + +static pci_ers_result_t mhi_pci_slot_reset(struct pci_dev *pdev) +{ + if (pci_enable_device(pdev)) { + dev_err(&pdev->dev, "Cannot re-enable PCI device after reset.\n"); + return PCI_ERS_RESULT_DISCONNECT; + } + + return PCI_ERS_RESULT_RECOVERED; +} + +static void mhi_pci_io_resume(struct pci_dev *pdev) +{ + struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); + + dev_err(&pdev->dev, "PCI slot reset done\n"); + + queue_work(system_long_wq, &mhi_pdev->recovery_work); +} + static const struct pci_error_handlers mhi_pci_err_handler = { + .error_detected = mhi_pci_error_detected, + .slot_reset = mhi_pci_slot_reset, + .resume = mhi_pci_io_resume, .reset_prepare = mhi_pci_reset_prepare, .reset_done = mhi_pci_reset_done, }; From patchwork Mon Dec 14 14:25:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 343530 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3035917jai; Mon, 14 Dec 2020 06:19:58 -0800 (PST) X-Google-Smtp-Source: ABdhPJxbJYQ41xg7okMDjtXjrf7gsJXmkBmHrWUOK3MOj+BCNHs8mQANYkmr7N5kCCDMZB/uVCLO X-Received: by 2002:a17:906:7cc6:: with SMTP id h6mr22175281ejp.161.1607955598445; Mon, 14 Dec 2020 06:19:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607955598; cv=none; d=google.com; s=arc-20160816; b=B070KtEw+98R3FY0uweasb5I81YdizYku1sk3pB2PdQ2z6c7YXSCAaq1lWwH7Bh572 nREeku3zuwKIp97cHAI6ORCPuihg1WyTMgEVAd/1vK4/RTHCaory0uA8ghtleBAHtrUR 1JVMpnBiuHCzL8wfq5Fne/5s+mhh9cGT1CH3fpTrGD4b9IMIxWoroj+vnwsUlZ4IdUwx bxUPxfm34oivsd81dKFRlk7GWsx/xcAbJXf/tFSRjMaRe5cRBWtEYKGI41rokgeObKij xObW4K1pPQFfIU1TFzB4Yw1VGHvIcN4fICV20BxdmOHcodpBwdUTGkfQdZO121qQYwH1 sH0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=lvOycJjcphK1qnN/wDZnGvr18L32M/Z73HhDCdQdbTk=; b=GslkZy/vYm0E8REa91VhD+g+7ocuvq8QRJDpB8y748wDgpz19NJyD+akD/B+pMgEUS DIGznoXCzWdZZ63qGEZh7r/ayDnb9uH0ZDctCl/47UEJsBdMxyFXjaFYoKHBPx0kmWu2 tqYfk2LPQFaDtGJc74i8Mur+UVKxmygxcrJILeFm5WjEu69QvH4j88EXk9RL6dL9NFd4 UPXZhjCf+ed4FUu4ZaFj3Tqp+FOo+5WEbMHgdCG9TGhj3cbNd7I26wf+2yXRKP0V/SM8 OyId0+lMa0f66ZINoQtsCqGWyUNBE4cBRoeqyJuawQa4jjhGbXJmn5yoRsqW9uaU8Dc/ v21Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="LLyq/tTZ"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j14si10062778ejy.327.2020.12.14.06.19.58; Mon, 14 Dec 2020 06:19:58 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="LLyq/tTZ"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2440033AbgLNOT4 (ORCPT + 15 others); Mon, 14 Dec 2020 09:19:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2440035AbgLNOTy (ORCPT ); Mon, 14 Dec 2020 09:19:54 -0500 Received: from mail-wm1-x344.google.com (mail-wm1-x344.google.com [IPv6:2a00:1450:4864:20::344]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 470FCC0617B0 for ; Mon, 14 Dec 2020 06:18:38 -0800 (PST) Received: by mail-wm1-x344.google.com with SMTP id x22so13851989wmc.5 for ; Mon, 14 Dec 2020 06:18:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lvOycJjcphK1qnN/wDZnGvr18L32M/Z73HhDCdQdbTk=; b=LLyq/tTZ5WYizgf0bBbvJTuUWnNy4pixiaSXDT4Oefs0VWi+a2aHDuRiy2baa3F5Jj 4AS8y7Zfc6QTHkcTlQmOzPaX4GHfkcMHsMsmmoQyX2RmTAAY+Nvri9gX9lX/KRmAeRMA d0UONVbGBEUp+Bu47pgOixfZ7XzHPk3Jr5fAgZJ3UZsbZARgxnqzjBsFxquOZkMVoRxX 6ChyBjEcOi9PD+eqn6YGRbDGG/Zkyg0CL7GpK8j6Jm/QjHF4O2dILMeANzsikSio0FhO EZxzx2WnWCZjYRCc+gdzKyrP7vL5GQ++KgLOntkPKNOug78S903tcR9hUunebnWxSEKJ kS6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lvOycJjcphK1qnN/wDZnGvr18L32M/Z73HhDCdQdbTk=; b=UmPyYTV87dYhuQ5eWRSc22ZI7t1C8pcpQZH6vDsxEafAHcOokMFhXl+zEqusxwn2hb w1IMG4bUZL4/LvITeqMZxAAIvivros8+RAahWeCN9xJJ3fNsW90FWAnWlK3XscI6jUq6 Wa2bD0uh9uI4mEVUwtJZZL2r6bsRDcChTEJJQcivDOdaiFcAuQT6H2/er1LFMBrEdjsz 3UrcXcW9jQVMKHWTyNz+wS2zT7/L2wz/5oL/tC76GA0BrtOyAKc5j40GNfTg+LSabB/T PkpZaBrvgjqRnRZeH2iusjr9z9gxKV/oC0EhrwIF1WF7IqW39xxemaIQ475BhHim2Los bPbA== X-Gm-Message-State: AOAM530oZhsZZvqygPwY9j/fhPz8JVQUKZNngsSUn8zQOi9gAoB56GdM CpMg4ViWreUnUHKUjWUUEKnK7VDtl71xYA== X-Received: by 2002:a1c:55ca:: with SMTP id j193mr28353653wmb.87.1607955517017; Mon, 14 Dec 2020 06:18:37 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:f2e4:25b3:2b53:52cd]) by smtp.gmail.com with ESMTPSA id h5sm34126285wrp.56.2020.12.14.06.18.36 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Dec 2020 06:18:36 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, bbhatt@codeaurora.org, Loic Poulain Subject: [PATCH v5 08/10] mhi: pci_generic: Add health-check Date: Mon, 14 Dec 2020 15:25:35 +0100 Message-Id: <1607955937-26951-9-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> References: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org If the modem crashes for any reason, we may not be able to detect it at MHI level (MHI registers not reachable anymore). This patch implements a health-check mechanism to check regularly that device is alive (MHI layer can communicate with). If device is not alive (because a crash or unexpected reset), the recovery procedure is triggered. Tested successfully with Telit FN980m module. Signed-off-by: Loic Poulain Reviewed-by: Manivannan Sadhasivam Reviewed-by: Hemant Kumar --- drivers/bus/mhi/pci_generic.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index b4a68bd..063a287 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -14,11 +14,15 @@ #include #include #include +#include #include #define MHI_PCI_DEFAULT_BAR_NUM 0 #define MHI_POST_RESET_DELAY_MS 500 + +#define HEALTH_CHECK_PERIOD (HZ * 2) + /** * struct mhi_pci_dev_info - MHI PCI device specific information * @config: MHI controller configuration @@ -189,6 +193,7 @@ struct mhi_pci_device { struct mhi_controller mhi_cntrl; struct pci_saved_state *pci_state; struct work_struct recovery_work; + struct timer_list health_check_timer; unsigned long status; }; @@ -326,6 +331,8 @@ static void mhi_pci_recovery_work(struct work_struct *work) dev_warn(&pdev->dev, "device recovery started\n"); + del_timer(&mhi_pdev->health_check_timer); + /* Clean up MHI state */ if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { mhi_power_down(mhi_cntrl, false); @@ -349,6 +356,7 @@ static void mhi_pci_recovery_work(struct work_struct *work) goto err_unprepare; set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); return; err_unprepare: @@ -358,6 +366,21 @@ static void mhi_pci_recovery_work(struct work_struct *work) dev_err(&pdev->dev, "Recovery failed\n"); } +static void health_check(struct timer_list *t) +{ + struct mhi_pci_device *mhi_pdev = from_timer(mhi_pdev, t, health_check_timer); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + if (!mhi_pci_is_alive(mhi_cntrl)) { + dev_err(mhi_cntrl->cntrl_dev, "Device died\n"); + queue_work(system_long_wq, &mhi_pdev->recovery_work); + return; + } + + /* reschedule in two seconds */ + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); +} + static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { const struct mhi_pci_dev_info *info = (struct mhi_pci_dev_info *) id->driver_data; @@ -373,6 +396,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) return -ENOMEM; INIT_WORK(&mhi_pdev->recovery_work, mhi_pci_recovery_work); + timer_setup(&mhi_pdev->health_check_timer, health_check, 0); mhi_cntrl_config = info->config; mhi_cntrl = &mhi_pdev->mhi_cntrl; @@ -425,6 +449,9 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + /* start health check */ + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); + return 0; err_unprepare: @@ -440,6 +467,7 @@ static void mhi_pci_remove(struct pci_dev *pdev) struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + del_timer(&mhi_pdev->health_check_timer); cancel_work_sync(&mhi_pdev->recovery_work); if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { @@ -457,6 +485,8 @@ static void mhi_pci_reset_prepare(struct pci_dev *pdev) dev_info(&pdev->dev, "reset\n"); + del_timer(&mhi_pdev->health_check_timer); + /* Clean up MHI state */ if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { mhi_power_down(mhi_cntrl, false); @@ -500,6 +530,7 @@ static void mhi_pci_reset_done(struct pci_dev *pdev) } set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); } static pci_ers_result_t mhi_pci_error_detected(struct pci_dev *pdev, @@ -560,6 +591,7 @@ static int __maybe_unused mhi_pci_suspend(struct device *dev) struct mhi_pci_device *mhi_pdev = dev_get_drvdata(dev); struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + del_timer(&mhi_pdev->health_check_timer); cancel_work_sync(&mhi_pdev->recovery_work); /* Transition to M3 state */ @@ -595,6 +627,9 @@ static int __maybe_unused mhi_pci_resume(struct device *dev) goto err_recovery; } + /* Resume health check */ + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); + return 0; err_recovery: From patchwork Mon Dec 14 14:25:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 343542 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3043607jai; Mon, 14 Dec 2020 06:29:11 -0800 (PST) X-Google-Smtp-Source: ABdhPJyqag8f9COOtX809LIIFFJdCrE8MapxhiZLQwEhypTdXzpSt6O51MK9DOKFzXHV0/2u3Ozh X-Received: by 2002:a17:906:f05:: with SMTP id z5mr23193163eji.8.1607956151809; Mon, 14 Dec 2020 06:29:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607956151; cv=none; d=google.com; s=arc-20160816; b=PFKCOqpZtgKffcEN4+AuR269n/GAeu3Whig++272NFLfsqknwEAmAl3BYDr/pRqRjm 6Z/olW2VbH6dhIBnwk224tfa6vh+uJyojkgMcX0wrBjlmwVeOpKm66b+FpGLKa9pYLNh SwSJQU13uqi7y87e0YnXedAdJe+EYUJJtMs+Fh9I0ID6wMjPftk9K4bu5pmw3AfXHfSP IYDZhL1P+j1NyUDDDLsjwt2RQGAiKj+Z3YSNOprqZJWIafkY9cYAXiZtiR6FFtd6YPco tqnVkzYniSROJVjkF7XVryi+u4Tn3yPkM/5QRcwX8t5KEP7j48+C+Y3ysVa08PyR36yb 6Yhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=tg3mpSdAU62FkiSqPGbsW9AbKsLEPWMetHqB4PYOr28=; b=cUCWJljlBS9ma7icjrpLlROqEoE1iT2Erigk66ARTBvTizmYEQRlqtwJJLJO6YUXFx t2vsqnY6q4j1ZlhNu9vdPttvo3qd1SyQrcYa4gYvV2ws+hrV1hC4wfKR/qSw6tGijE/M dGSHxkzcK+uzhLOMZh7E4aUrMoOElI7bqMxamZKX7owrJh/1XiJtYOTnNhDA3jMQhgp4 5jE49pZjNrNo5JJx/tNPy3VHNl8mLWrkv9l5j79Zo/CB8hn6zg/A6jDmPNZUxav1Od5O ktddJDfcV3CyT06mf/RwsUEUX2pail0W/7K1vyQnKoA74J6na2uIrjY+M3I+KIr+2iNc D1qw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WqpIRZt8; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id v21si10487662edx.3.2020.12.14.06.29.11; Mon, 14 Dec 2020 06:29:11 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WqpIRZt8; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2440041AbgLNOUC (ORCPT + 15 others); Mon, 14 Dec 2020 09:20:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2440043AbgLNOUC (ORCPT ); Mon, 14 Dec 2020 09:20:02 -0500 Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13C91C06138C for ; Mon, 14 Dec 2020 06:18:39 -0800 (PST) Received: by mail-wm1-x341.google.com with SMTP id a6so13855327wmc.2 for ; Mon, 14 Dec 2020 06:18:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tg3mpSdAU62FkiSqPGbsW9AbKsLEPWMetHqB4PYOr28=; b=WqpIRZt8KnR53n9fM24eCdoIXUMaK5c+AEc8W9gbyPtof2oMdO3drTOFXVXKHHxBHA tz+wI4bybRVUU3G2WShWsncoAw6SYZ9d2CBNVcx5Gnv3c4+UKcYuqDeJpZltqVx8DHpl sFcEgX1TdU9SE4mt0lKueD9aUTfvpqjZcdv8HAJnm4fekR3INHRQR6oP6Zh/bbNwND3x fFB8kmQW0Wx5tqRk/RzFDAUzaVbF9NagXallBbZERVJUWWyaTL3kTabkq3mXRofH6n2z 26SHkd5V62N3FVMJdOUx483P366ohjuBeBs98UCSE5w5vuMbHxD+KVm+ZWLlDr4NKzbh QCVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tg3mpSdAU62FkiSqPGbsW9AbKsLEPWMetHqB4PYOr28=; b=aNB5VWUEZz7SotqU1mRnCbAZAOCcb43CZyKbmYC0TQYuMG40SujZfOHHS01E+tNlnN 4J4PJIc7Hclf/fIz504G+sBuxLFoHFbCNOQW7Oe6FSGPqhAD7QeGrOUhHhj0M8k2x/LY dpRV+v0n1bUwqCVGBR/zDSdvlQ0FWXlJetqMCUVz+kQ0pESFPKXYmAM5wWC4nki+MbU3 PvLTmCaitsJwZSqaxKBwI9fkhkhss9FqNwxb/kLw9i+ZijLYHnGHo6GyaTxU2BNZ6xf0 hPF1iWF5vhQ2qNXya8pAGQDOA3HBL3DbhZh27sek2vaiPDNmulLoRHm5TJEHmL7Xp2xA tkOA== X-Gm-Message-State: AOAM533f7eRsZvMqaFQGmcPRzgFr6ek3ziaC1KBOt3UN262QvYGZnEx4 igevglJoHikl+VEcdXn6uvtX+A== X-Received: by 2002:a1c:e306:: with SMTP id a6mr8773433wmh.66.1607955517810; Mon, 14 Dec 2020 06:18:37 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:f2e4:25b3:2b53:52cd]) by smtp.gmail.com with ESMTPSA id h5sm34126285wrp.56.2020.12.14.06.18.37 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Dec 2020 06:18:37 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, bbhatt@codeaurora.org, Loic Poulain Subject: [PATCH v5 09/10] mhi: pci_generic: Increase controller timeout value Date: Mon, 14 Dec 2020 15:25:36 +0100 Message-Id: <1607955937-26951-10-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> References: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On cold boot, device can take slightly more than 5 seconds to start. Increase the timeout to prevent MHI power-up issues. Signed-off-by: Loic Poulain Reviewed-by: Hemant Kumar --- drivers/bus/mhi/pci_generic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 063a287..156b5fe6 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -162,7 +162,7 @@ static const struct mhi_event_config modem_qcom_v1_mhi_events[] = { static const struct mhi_controller_config modem_qcom_v1_mhiv_config = { .max_channels = 128, - .timeout_ms = 5000, + .timeout_ms = 8000, .num_channels = ARRAY_SIZE(modem_qcom_v1_mhi_channels), .ch_cfg = modem_qcom_v1_mhi_channels, .num_events = ARRAY_SIZE(modem_qcom_v1_mhi_events), From patchwork Mon Dec 14 14:25:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 343534 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3037320jai; Mon, 14 Dec 2020 06:21:27 -0800 (PST) X-Google-Smtp-Source: ABdhPJwSbzh/iebl47feBebl0Ikguvbjpt9gjgFMsDN1WUf6nMxqsMvF95jyUdz0KEUv4PaPaIZ5 X-Received: by 2002:a17:906:1758:: with SMTP id d24mr23629031eje.287.1607955686902; Mon, 14 Dec 2020 06:21:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607955686; cv=none; d=google.com; s=arc-20160816; b=z+wi/bBqlAoRnDN+Q37dCK3KIOuxdh7fI1actSBU+MfzqhXJIMZP1p9u7IBICcpMC8 kd/A3k39/nw/sqm8n7nAR7igi0VSW6F82vRI3DaqghFIc5W+2qULozwb5tQX37B6onR7 V+4el4HS5c0/yHCPzPgo1v8wAMWoZS/LV3zcSNlfb5WjUACviN5MNjvLmosZ9d+cpgU/ hv+32b1W5C5Hv02U2TIr5fBQ1Vf2z8Ix1rEZGw8rOFT/rElixmbHEQAj8UKEXLmwQjnj JD+H0Cqiyty6ZG279SNmUBgJJTl5+qOcXyf08trzGDAQJEEReQ4VlYt6fluLJPfyUXVF DXTQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=bY1msGoBjemRs4hKNt3WYSHnFeZbrWNtczzN7TWoXGM=; b=LYZ5Mm06DXwv4OVzSSysbaDk1iE8Y+PnhOoUPuR1afloOt45EFdL5WiFzKRLLf5T3d Up1bK6NoEWD4lRrzdlVHJgg/xAmIfzgx/h3HLPIWdgT2kz191m4JpABEoGLGKkizo6LH XBwL/LhGfz4n1X3ykDNbDVy61HomN67ELK/KYlzdUSLS6z57gpHrLxVa1dHJhqPwb6w3 HSBFGqJYrrTSfIdI8tu6Jrx0u70iMHLv8pquFIeszrnaT+XZRtlCE+5fyubf5+iCZMP3 r+D5CO3a0F9roklaAJuTgzX/4rk0WBV6vqMgiYCyBNY8O1ovvg+XL41g4IcuF66j7Vrw xinQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dq8H++dr; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id 1si10753532edv.426.2020.12.14.06.21.25; Mon, 14 Dec 2020 06:21:26 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dq8H++dr; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2440047AbgLNOUC (ORCPT + 15 others); Mon, 14 Dec 2020 09:20:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43520 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2440041AbgLNOUC (ORCPT ); Mon, 14 Dec 2020 09:20:02 -0500 Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 156DFC061282 for ; Mon, 14 Dec 2020 06:18:40 -0800 (PST) Received: by mail-wr1-x443.google.com with SMTP id r3so16607575wrt.2 for ; Mon, 14 Dec 2020 06:18:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bY1msGoBjemRs4hKNt3WYSHnFeZbrWNtczzN7TWoXGM=; b=dq8H++drKY8U9QCDle1q2vKZZ7TzhkpS8eNvBWbs+4WqseVFZvPKhMNV0rhiZLPpf2 HPmdqH1Z0pvQXNTYWA+vzTHCKOiiXD2aUCHSw8daZJecyvRcqhLI6WvJrflGFhtAq3x5 IfKaXDer0gxRX5LktrLiRCEAgeZFm52z3dskT1yPxFhJcrqNOOmyIiPfRNMo3HBTuesP WhDXxav+iDlCMTuIY4mSYHVCg2rtsfv72dSEzfIsl67E8yObLGb0SKMIDFrjQcWqwlqk j2O14hXe7sDiqq6ZOQQS8mQbkFpmL/RfAfltfrWm1ZgzRpNgTVq5qzjO47Ga42Xx5MIH Uo0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bY1msGoBjemRs4hKNt3WYSHnFeZbrWNtczzN7TWoXGM=; b=CocTn/A6yZ57uWxlLc9AYiJdXOS2lqMXyMCI1bM3mg5QXVBI7c0hjOz7KHyQw4GXaA KVseb/NCgvjrZVLUXNP18r+cqHqUO9kidZfuPCVBWLR9Is1R+01JUntgb3zSzqN7odJ3 JXtedVI10vZV29siWe5ItdZHaZHEynK2IKVHRRhh1pV1ar4JV/yVV9aCaUR39U5zMohJ EQiujYzqNxWHYHf8hzGZljFekvsSRRK2UVdHpB/qgWRwPKiyja0pQPpmHrO5wFomUN+n 2Dz8DpfHGH87flgc5tehmT/J7a90jidgEGFmVhx7eBJWboh5EfrLiu5WbqM4yfatuziC 0d7w== X-Gm-Message-State: AOAM5335eDdVZxL4VfsMhV6zIRWOgcgYJpdFyANsKTZ6dzhpolQq04OY 2WB8W/FC/TODtlxt8Vxb04yzjg== X-Received: by 2002:adf:ee90:: with SMTP id b16mr3363358wro.221.1607955518828; Mon, 14 Dec 2020 06:18:38 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:f2e4:25b3:2b53:52cd]) by smtp.gmail.com with ESMTPSA id h5sm34126285wrp.56.2020.12.14.06.18.38 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Dec 2020 06:18:38 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, bbhatt@codeaurora.org, Loic Poulain Subject: [PATCH v5 10/10] mhi: pci_generic: Add diag channels Date: Mon, 14 Dec 2020 15:25:37 +0100 Message-Id: <1607955937-26951-11-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> References: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for Diag over MHI. Qualcomm Diag is the qualcomm diagnostics interface that can be used to collect modem logs, events, traces, etc. It can be used by tools such QPST or QXDM. This patch adds the DIAG channels and a dedicated event ring. Signed-off-by: Loic Poulain Reviewed-by Hemant Kumar --- drivers/bus/mhi/pci_generic.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 156b5fe6..9567b75 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -142,22 +142,26 @@ struct mhi_pci_dev_info { } static const struct mhi_channel_config modem_qcom_v1_mhi_channels[] = { + MHI_CHANNEL_CONFIG_UL(4, "DIAG", 16, 1), + MHI_CHANNEL_CONFIG_DL(5, "DIAG", 16, 1), MHI_CHANNEL_CONFIG_UL(12, "MBIM", 4, 0), MHI_CHANNEL_CONFIG_DL(13, "MBIM", 4, 0), MHI_CHANNEL_CONFIG_UL(14, "QMI", 4, 0), MHI_CHANNEL_CONFIG_DL(15, "QMI", 4, 0), MHI_CHANNEL_CONFIG_UL(20, "IPCR", 8, 0), MHI_CHANNEL_CONFIG_DL(21, "IPCR", 8, 0), - MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 128, 1), - MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 128, 2), + MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 128, 2), + MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 128, 3), }; static const struct mhi_event_config modem_qcom_v1_mhi_events[] = { /* first ring is control+data ring */ MHI_EVENT_CONFIG_CTRL(0), + /* DIAG dedicated event ring */ + MHI_EVENT_CONFIG_DATA(1), /* Hardware channels request dedicated hardware event rings */ - MHI_EVENT_CONFIG_HW_DATA(1, 100), - MHI_EVENT_CONFIG_HW_DATA(2, 101) + MHI_EVENT_CONFIG_HW_DATA(2, 100), + MHI_EVENT_CONFIG_HW_DATA(3, 101) }; static const struct mhi_controller_config modem_qcom_v1_mhiv_config = {