From patchwork Sat Dec 26 06:42:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Syed Nayyar Waris X-Patchwork-Id: 352507 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.2 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5047C433E6 for ; Sat, 26 Dec 2020 06:43:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 80862207B5 for ; Sat, 26 Dec 2020 06:43:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729117AbgLZGne (ORCPT ); Sat, 26 Dec 2020 01:43:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58940 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726775AbgLZGne (ORCPT ); Sat, 26 Dec 2020 01:43:34 -0500 Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F0704C061757; Fri, 25 Dec 2020 22:42:53 -0800 (PST) Received: by mail-pj1-x102d.google.com with SMTP id lb18so3322043pjb.5; Fri, 25 Dec 2020 22:42:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=a3tUiYozXBW5Qe16hKGeSkVlx2ZAlF5KcbW/IWUDcrE=; b=Y+jYyhZIrl33rTudnDWCeJuYlsr2ea2ErrO1LdMrwxZbvo1kJ6tr19nHCpksC7vzqg ZodJBBj+2G2mO0giDgagGXjSqSybkjRXfn0SRXdgmFQh5GuQg3OBCMuEexzaG6re+BGo 6bpTo93iEHogngUQfgNKV4eo/Wh4EkYR8x2U1Eel7YXhjhNzeHZq+mYO2NYPaP9UPj4x O36qEXpDnF9Yt+tyEZSofozNFnlcLH78eGz7iFU0eXCmd33XxIhQR/bQSOECX0AJyp/0 cDnU1gcm9RqrH8JBXv14W223I+tPw5ZscbVu5CPuJcVOJr9bsRaYWcfk16nJiCO4Bv4G iCmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=a3tUiYozXBW5Qe16hKGeSkVlx2ZAlF5KcbW/IWUDcrE=; b=qwgUmYsj8D1e3kmYlPnaJJ/Zp6cYqB6IzDU9fAkuQkTZAG477O6bwZ9919gdnmQTi8 5IDYK/ovwLr3nkNldSJ5X95sl2UxHWTmu9PpKgyTbcsIsHXw6BAE8zQ2ATEA4o//BLjQ GNqRY8tQXFnzxbV9s+ema5LI6pbFo9IoqBpY7ZBVIgPbVnK/deRsJCMLfZETowHLkHB+ G6wmlACKkK08TvUoDjglt+F6n94aT2FzTNi08yNlwSlG3re7q1CZ7nS0/c6RZ8EFURJk r36WIKsxIUHCGYRfi/XQkzQVXYs2Xg1dZaV12cCCO8UebBw21jDN6NZX6gv0sD0gesra uCyw== X-Gm-Message-State: AOAM531navUwFve00WGkR+t7TN6bXEHGsBckMYttf7U6TGEgdWg97nBJ Aqlepi1uacI91oZvqV1KI9Y= X-Google-Smtp-Source: ABdhPJyVNdjYpXWKUu1rWy5l1gkffrE01YUrVfTrURPZ8kZ2TJtOmHuTgrMkVMCYaA78yqj0vb/Pmg== X-Received: by 2002:a17:90a:a2a:: with SMTP id o39mr11396424pjo.161.1608964973609; Fri, 25 Dec 2020 22:42:53 -0800 (PST) Received: from syed.domain.name ([103.201.127.53]) by smtp.gmail.com with ESMTPSA id j23sm12420079pgj.34.2020.12.25.22.42.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 25 Dec 2020 22:42:53 -0800 (PST) Date: Sat, 26 Dec 2020 12:12:37 +0530 From: Syed Nayyar Waris To: linus.walleij@linaro.org Cc: andriy.shevchenko@linux.intel.com, vilhelm.gray@gmail.com, michal.simek@xilinx.com, arnd@arndb.de, rrichter@marvell.com, linus.walleij@linaro.org, bgolaszewski@baylibre.com, yamada.masahiro@socionext.com, akpm@linux-foundation.org, rui.zhang@intel.com, daniel.lezcano@linaro.org, amit.kucheria@verdurent.com, linux-arch@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 1/5] clump_bits: Introduce the for_each_set_clump macro Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org This macro iterates for each group of bits (clump) with set bits, within a bitmap memory region. For each iteration, "start" is set to the bit offset of the found clump, while the respective clump value is stored to the location pointed by "clump". Additionally, the bitmap_get_value() and bitmap_set_value() functions are introduced to respectively get and set a value of n-bits in a bitmap memory region. The n-bits can have any size from 1 to BITS_PER_LONG. size less than 1 or more than BITS_PER_LONG causes undefined behaviour. Moreover, during setting value of n-bit in bitmap, if a situation arise that the width of next n-bit is exceeding the word boundary, then it will divide itself such that some portion of it is stored in that word, while the remaining portion is stored in the next higher word. Similar situation occurs while retrieving the value from bitmap. GCC gives warning in bitmap_set_value(): https://godbolt.org/z/rjx34r Add explicit check to see if the value being written into the bitmap does not fall outside the bitmap. The situation that it is falling outside would never be possible in the code because the boundaries are required to be correct before the function is called. The responsibility is on the caller for ensuring the boundaries are correct. The code change is simply to silence the GCC warning messages because GCC is not aware that the boundaries have already been checked. As such, we're better off using __builtin_unreachable() here because we can avoid the latency of the conditional check entirely. Cc: Linus Walleij Cc: Arnd Bergmann Cc: William Breathitt Gray Cc: Andy Shevchenko Signed-off-by: Syed Nayyar Waris --- drivers/gpio/clump_bits.h | 101 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 101 insertions(+) create mode 100644 drivers/gpio/clump_bits.h diff --git a/drivers/gpio/clump_bits.h b/drivers/gpio/clump_bits.h new file mode 100644 index 000000000000..72ef772b83c8 --- /dev/null +++ b/drivers/gpio/clump_bits.h @@ -0,0 +1,101 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __CLUMP_BITS_H +#define __CLUMP_BITS_H + +/** + * find_next_clump - find next clump with set bits in a memory region + * @clump: location to store copy of found clump + * @addr: address to base the search on + * @size: bitmap size in number of bits + * @offset: bit offset at which to start searching + * @clump_size: clump size in bits + * + * Returns the bit offset for the next set clump; the found clump value is + * copied to the location pointed by @clump. If no bits are set, returns @size. + */ +extern unsigned long find_next_clump(unsigned long *clump, + const unsigned long *addr, + unsigned long size, unsigned long offset, + unsigned long clump_size); + +#define find_first_clump(clump, bits, size, clump_size) \ + find_next_clump((clump), (bits), (size), 0, (clump_size)) + +/** + * bitmap_get_value - get a value of n-bits from the memory region + * @map: address to the bitmap memory region + * @start: bit offset of the n-bit value + * @nbits: size of value in bits (must be between 1 and BITS_PER_LONG inclusive). + * + * Returns value of nbits located at the @start bit offset within the @map + * memory region. + */ +static inline unsigned long bitmap_get_value(const unsigned long *map, + unsigned long start, + unsigned long nbits) +{ + const size_t index = BIT_WORD(start); + const unsigned long offset = start % BITS_PER_LONG; + const unsigned long ceiling = round_up(start + 1, BITS_PER_LONG); + const unsigned long space = ceiling - start; + unsigned long value_low, value_high; + + if (space >= nbits) + return (map[index] >> offset) & GENMASK(nbits - 1, 0); + else { + value_low = map[index] & BITMAP_FIRST_WORD_MASK(start); + value_high = map[index + 1] & BITMAP_LAST_WORD_MASK(start + nbits); + return (value_low >> offset) | (value_high << space); + } +} + +/** + * bitmap_set_value - set value within a memory region + * @map: address to the bitmap memory region + * @nbits: size of map in bits + * @value: value of clump + * @value_width: size of value in bits (must be between 1 and BITS_PER_LONG inclusive) + * @start: bit offset of the value + */ +static inline void bitmap_set_value(unsigned long *map, unsigned long nbits, + unsigned long value, unsigned long value_width, + unsigned long start) +{ + const unsigned long index = BIT_WORD(start); + const unsigned long length = BIT_WORD(nbits); + const unsigned long offset = start % BITS_PER_LONG; + const unsigned long ceiling = round_up(start + 1, BITS_PER_LONG); + const unsigned long space = ceiling - start; + + value &= GENMASK(value_width - 1, 0); + + if (space >= value_width) { + map[index] &= ~(GENMASK(value_width - 1, 0) << offset); + map[index] |= value << offset; + } else { + map[index + 0] &= ~BITMAP_FIRST_WORD_MASK(start); + map[index + 0] |= value << offset; + + if (index + 1 >= length) + __builtin_unreachable(); + + map[index + 1] &= ~BITMAP_LAST_WORD_MASK(start + value_width); + map[index + 1] |= value >> space; + } +} + +/** + * for_each_set_clump - iterate over bitmap for each clump with set bits + * @start: bit offset to start search and to store the current iteration offset + * @clump: location to store copy of current 8-bit clump + * @bits: bitmap address to base the search on + * @size: bitmap size in number of bits + * @clump_size: clump size in bits + */ +#define for_each_set_clump(start, clump, bits, size, clump_size) \ + for ((start) = find_first_clump(&(clump), (bits), (size), (clump_size)); \ + (start) < (size); \ + (start) = find_next_clump(&(clump), (bits), (size), (start) + (clump_size), (clump_size))) + +#endif /* __CLUMP_BITS_H */ From patchwork Sat Dec 26 06:43:18 2020 Content-Type: text/plain; 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Fri, 25 Dec 2020 22:43:34 -0800 (PST) Date: Sat, 26 Dec 2020 12:13:18 +0530 From: Syed Nayyar Waris To: linus.walleij@linaro.org Cc: andriy.shevchenko@linux.intel.com, vilhelm.gray@gmail.com, michal.simek@xilinx.com, arnd@arndb.de, rrichter@marvell.com, linus.walleij@linaro.org, bgolaszewski@baylibre.com, yamada.masahiro@socionext.com, akpm@linux-foundation.org, rui.zhang@intel.com, daniel.lezcano@linaro.org, amit.kucheria@verdurent.com, linux-arch@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 2/5] lib/test_bitmap.c: Add for_each_set_clump test cases Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The introduction of the generic for_each_set_clump macro need test cases to verify the implementation. This patch adds test cases for scenarios in which clump sizes are 8 bits, 24 bits, 30 bits and 6 bits. The cases contain situations where clump is getting split at the word boundary and also when zeroes are present in the start and middle of bitmap. Cc: Andy Shevchenko Cc: William Breathitt Gray Signed-off-by: Syed Nayyar Waris --- lib/test_bitmap.c | 144 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 144 insertions(+) diff --git a/lib/test_bitmap.c b/lib/test_bitmap.c index 4425a1dd4ef1..c5b5fb98c9dd 100644 --- a/lib/test_bitmap.c +++ b/lib/test_bitmap.c @@ -13,6 +13,7 @@ #include #include #include +#include <../drivers/gpio/clump_bits.h> #include "../tools/testing/selftests/kselftest_module.h" @@ -155,6 +156,37 @@ static bool __init __check_eq_clump8(const char *srcfile, unsigned int line, return true; } +static bool __init __check_eq_clump(const char *srcfile, unsigned int line, + const unsigned int offset, + const unsigned int size, + const unsigned long *const clump_exp, + const unsigned long *const clump, + const unsigned long clump_size) +{ + unsigned long exp; + + if (offset >= size) { + pr_warn("[%s:%u] bit offset for clump out-of-bounds: expected less than %u, got %u\n", + srcfile, line, size, offset); + return false; + } + + exp = clump_exp[offset / clump_size]; + if (!exp) { + pr_warn("[%s:%u] bit offset for zero clump: expected nonzero clump, got bit offset %u with clump value 0", + srcfile, line, offset); + return false; + } + + if (*clump != exp) { + pr_warn("[%s:%u] expected clump value of 0x%lX, got clump value of 0x%lX", + srcfile, line, exp, *clump); + return false; + } + + return true; +} + #define __expect_eq(suffix, ...) \ ({ \ int result = 0; \ @@ -172,6 +204,7 @@ static bool __init __check_eq_clump8(const char *srcfile, unsigned int line, #define expect_eq_pbl(...) __expect_eq(pbl, ##__VA_ARGS__) #define expect_eq_u32_array(...) __expect_eq(u32_array, ##__VA_ARGS__) #define expect_eq_clump8(...) __expect_eq(clump8, ##__VA_ARGS__) +#define expect_eq_clump(...) __expect_eq(clump, ##__VA_ARGS__) static void __init test_zero_clear(void) { @@ -530,6 +563,28 @@ static void noinline __init test_mem_optimisations(void) } } +static const unsigned long clump_bitmap_data[] __initconst = { + 0x38000201, + 0x05ff0f38, + 0xeffedcba, + 0xbbbbabcd, + 0x000000aa, + 0x000000aa, + 0x00ff0000, + 0xaaaaaa00, + 0xff000000, + 0x00aa0000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x0f000000, + 0x00ff0000, + 0xaaaaaa00, + 0xff000000, + 0x00aa0000, + 0x00000ac0, +}; + static const unsigned char clump_exp[] __initconst = { 0x01, /* 1 bit set */ 0x02, /* non-edge 1 bit set */ @@ -541,6 +596,94 @@ static const unsigned char clump_exp[] __initconst = { 0x05, /* non-adjacent 2 bits set */ }; +static const unsigned long clump_exp1[] __initconst = { + 0x01, /* 1 bit set */ + 0x02, /* non-edge 1 bit set */ + 0x00, /* zero bits set */ + 0x38, /* 3 bits set across 4-bit boundary */ + 0x38, /* Repeated clump */ + 0x0F, /* 4 bits set */ + 0xFF, /* all bits set */ + 0x05, /* non-adjacent 2 bits set */ +}; + +static const unsigned long clump_exp2[] __initconst = { + 0xfedcba, /* 24 bits */ + 0xabcdef, + 0xaabbbb, /* Clump split between 2 words */ + 0x000000, /* zeroes in between */ + 0x0000aa, + 0x000000, + 0x0000ff, + 0xaaaaaa, + 0x000000, + 0x0000ff, +}; + +static const unsigned long clump_exp3[] __initconst = { + 0x00000000, /* starting with 0s*/ + 0x00000000, /* All 0s */ + 0x00000000, + 0x00000000, + 0x3f00000f, /* Non zero set */ + 0x2aa80003, + 0x00000aaa, + 0x00003fc0, +}; + +static const unsigned long clump_exp4[] __initconst = { + 0x00, + 0x2b, +}; + +struct clump_test_data_params { + DECLARE_BITMAP(data, 256); + unsigned long count; + unsigned long offset; + unsigned long limit; + unsigned long clump_size; + unsigned long const *exp; +}; + +static struct clump_test_data_params clump_test_data[] __initdata = { + {{0}, 2, 0, 64, 8, clump_exp1}, + {{0}, 8, 2, 240, 24, clump_exp2}, + {{0}, 8, 10, 240, 30, clump_exp3}, + {{0}, 1, 18, 18, 6, clump_exp4} }; + +static void __init prepare_test_data(unsigned int index) +{ + int i; + unsigned long width = 0; + + for (i = 0; i < clump_test_data[index].count; i++) { + bitmap_set_value(clump_test_data[index].data, 256, + clump_bitmap_data[(clump_test_data[index].offset)++], 32, width); + width += 32; + } +} + +static void __init execute_for_each_set_clump_test(unsigned int index) +{ + unsigned long start, clump; + + for_each_set_clump(start, clump, clump_test_data[index].data, + clump_test_data[index].limit, + clump_test_data[index].clump_size) + expect_eq_clump(start, clump_test_data[index].limit, clump_test_data[index].exp, + &clump, clump_test_data[index].clump_size); +} + +static void __init test_for_each_set_clump(void) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(clump_test_data); i++) { + prepare_test_data(i); + execute_for_each_set_clump_test(i); + } +} + static void __init test_for_each_set_clump8(void) { #define CLUMP_EXP_NUMBITS 64 @@ -631,6 +774,7 @@ static void __init selftest(void) test_bitmap_parselist(); test_mem_optimisations(); test_for_each_set_clump8(); + test_for_each_set_clump(); test_bitmap_cut(); } From patchwork Sat Dec 26 06:43:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Syed Nayyar Waris X-Patchwork-Id: 352506 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.2 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43AC5C433DB for ; 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Fri, 25 Dec 2020 22:44:16 -0800 (PST) Received: from syed.domain.name ([103.201.127.53]) by smtp.gmail.com with ESMTPSA id r185sm30254706pfc.53.2020.12.25.22.44.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 25 Dec 2020 22:44:16 -0800 (PST) Date: Sat, 26 Dec 2020 12:13:58 +0530 From: Syed Nayyar Waris To: linus.walleij@linaro.org Cc: andriy.shevchenko@linux.intel.com, vilhelm.gray@gmail.com, michal.simek@xilinx.com, arnd@arndb.de, rrichter@marvell.com, linus.walleij@linaro.org, bgolaszewski@baylibre.com, yamada.masahiro@socionext.com, akpm@linux-foundation.org, rui.zhang@intel.com, daniel.lezcano@linaro.org, amit.kucheria@verdurent.com, linux-arch@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 3/5] gpio: thunderx: Utilize for_each_set_clump macro Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org This patch reimplements the thunderx_gpio_set_multiple function in drivers/gpio/gpio-thunderx.c to use the new for_each_set_clump macro. Instead of looping for each bank in thunderx_gpio_set_multiple function, now we can skip bank which is not set and save cycles. Cc: William Breathitt Gray Cc: Robert Richter Cc: Bartosz Golaszewski Signed-off-by: Syed Nayyar Waris --- drivers/gpio/gpio-thunderx.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-thunderx.c b/drivers/gpio/gpio-thunderx.c index 9f66deab46ea..716b75ba7df6 100644 --- a/drivers/gpio/gpio-thunderx.c +++ b/drivers/gpio/gpio-thunderx.c @@ -16,6 +16,7 @@ #include #include #include +#include <../drivers/gpio/clump_bits.h> #define GPIO_RX_DAT 0x0 @@ -275,12 +276,15 @@ static void thunderx_gpio_set_multiple(struct gpio_chip *chip, unsigned long *bits) { int bank; - u64 set_bits, clear_bits; + unsigned long set_bits, clear_bits, gpio_mask; + unsigned long offset; + struct thunderx_gpio *txgpio = gpiochip_get_data(chip); - for (bank = 0; bank <= chip->ngpio / 64; bank++) { - set_bits = bits[bank] & mask[bank]; - clear_bits = ~bits[bank] & mask[bank]; + for_each_set_clump(offset, gpio_mask, mask, chip->ngpio, 64) { + bank = offset / 64; + set_bits = bits[bank] & gpio_mask; + clear_bits = ~bits[bank] & gpio_mask; writeq(set_bits, txgpio->register_base + (bank * GPIO_2ND_BANK) + GPIO_TX_SET); writeq(clear_bits, txgpio->register_base + (bank * GPIO_2ND_BANK) + GPIO_TX_CLR); } From patchwork Sat Dec 26 06:44:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Syed Nayyar Waris X-Patchwork-Id: 352586 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.2 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04B05C433E0 for ; Sat, 26 Dec 2020 06:45:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C1602207B5 for ; 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Fri, 25 Dec 2020 22:44:57 -0800 (PST) Date: Sat, 26 Dec 2020 12:14:42 +0530 From: Syed Nayyar Waris To: linus.walleij@linaro.org Cc: andriy.shevchenko@linux.intel.com, vilhelm.gray@gmail.com, michal.simek@xilinx.com, arnd@arndb.de, rrichter@marvell.com, linus.walleij@linaro.org, bgolaszewski@baylibre.com, yamada.masahiro@socionext.com, akpm@linux-foundation.org, rui.zhang@intel.com, daniel.lezcano@linaro.org, amit.kucheria@verdurent.com, linux-arch@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 4/5] gpio: xilinx: Utilize generic bitmap_get_value and _set_value Message-ID: <5041c8cfc423f046ca9cf4f8f0a8bd03552ab6ea.1608963095.git.syednwaris@gmail.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org This patch reimplements the xgpio_set_multiple() function in drivers/gpio/gpio-xilinx.c to use the new generic functions: bitmap_get_value() and bitmap_set_value(). The code is now simpler to read and understand. Moreover, instead of looping for each bit in xgpio_set_multiple() function, now we can check each channel at a time and save cycles. Cc: William Breathitt Gray Cc: Bartosz Golaszewski Cc: Michal Simek Signed-off-by: Syed Nayyar Waris --- drivers/gpio/gpio-xilinx.c | 66 +++++++++++++++++++------------------- 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c index 67f9f82e0db0..d565fbf128b7 100644 --- a/drivers/gpio/gpio-xilinx.c +++ b/drivers/gpio/gpio-xilinx.c @@ -14,6 +14,7 @@ #include #include #include +#include <../drivers/gpio/clump_bits.h> /* Register Offset Definitions */ #define XGPIO_DATA_OFFSET (0x0) /* Data register */ @@ -138,37 +139,37 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, { unsigned long flags; struct xgpio_instance *chip = gpiochip_get_data(gc); - int index = xgpio_index(chip, 0); - int offset, i; - - spin_lock_irqsave(&chip->gpio_lock[index], flags); - - /* Write to GPIO signals */ - for (i = 0; i < gc->ngpio; i++) { - if (*mask == 0) - break; - /* Once finished with an index write it out to the register */ - if (index != xgpio_index(chip, i)) { - xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + - index * XGPIO_CHANNEL_OFFSET, - chip->gpio_state[index]); - spin_unlock_irqrestore(&chip->gpio_lock[index], flags); - index = xgpio_index(chip, i); - spin_lock_irqsave(&chip->gpio_lock[index], flags); - } - if (__test_and_clear_bit(i, mask)) { - offset = xgpio_offset(chip, i); - if (test_bit(i, bits)) - chip->gpio_state[index] |= BIT(offset); - else - chip->gpio_state[index] &= ~BIT(offset); - } - } - - xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + - index * XGPIO_CHANNEL_OFFSET, chip->gpio_state[index]); - - spin_unlock_irqrestore(&chip->gpio_lock[index], flags); + u32 *const state = chip->gpio_state; + unsigned int *const width = chip->gpio_width; + + DECLARE_BITMAP(old, 64); + DECLARE_BITMAP(new, 64); + DECLARE_BITMAP(changed, 64); + + spin_lock_irqsave(&chip->gpio_lock[0], flags); + spin_lock(&chip->gpio_lock[1]); + + bitmap_set_value(old, 64, state[0], width[0], 0); + bitmap_set_value(old, 64, state[1], width[1], width[0]); + bitmap_replace(new, old, bits, mask, gc->ngpio); + + bitmap_set_value(old, 64, state[0], 32, 0); + bitmap_set_value(old, 64, state[1], 32, 32); + state[0] = bitmap_get_value(new, 0, width[0]); + state[1] = bitmap_get_value(new, width[0], width[1]); + bitmap_set_value(new, 64, state[0], 32, 0); + bitmap_set_value(new, 64, state[1], 32, 32); + bitmap_xor(changed, old, new, 64); + + if (((u32 *)changed)[0]) + xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET, + state[0]); + if (((u32 *)changed)[1]) + xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + + XGPIO_CHANNEL_OFFSET, state[1]); + + spin_unlock(&chip->gpio_lock[1]); + spin_unlock_irqrestore(&chip->gpio_lock[0], flags); } /** @@ -292,6 +293,7 @@ static int xgpio_probe(struct platform_device *pdev) chip->gpio_width[0] = 32; spin_lock_init(&chip->gpio_lock[0]); + spin_lock_init(&chip->gpio_lock[1]); if (of_property_read_u32(np, "xlnx,is-dual", &is_dual)) is_dual = 0; @@ -313,8 +315,6 @@ static int xgpio_probe(struct platform_device *pdev) if (of_property_read_u32(np, "xlnx,gpio2-width", &chip->gpio_width[1])) chip->gpio_width[1] = 32; - - spin_lock_init(&chip->gpio_lock[1]); } chip->gc.base = -1; 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Fri, 25 Dec 2020 22:45:36 -0800 (PST) Date: Sat, 26 Dec 2020 12:15:20 +0530 From: Syed Nayyar Waris To: linus.walleij@linaro.org Cc: andriy.shevchenko@linux.intel.com, vilhelm.gray@gmail.com, michal.simek@xilinx.com, arnd@arndb.de, rrichter@marvell.com, linus.walleij@linaro.org, bgolaszewski@baylibre.com, yamada.masahiro@socionext.com, akpm@linux-foundation.org, rui.zhang@intel.com, daniel.lezcano@linaro.org, amit.kucheria@verdurent.com, linux-arch@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 5/5] gpio: xilinx: Add extra check if sum of widths exceed 64 Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add extra check to see if sum of widths does not exceed 64. If it exceeds then return -EINVAL alongwith appropriate error message. Cc: Michal Simek Signed-off-by: Syed Nayyar Waris Acked-by: Michal Simek --- drivers/gpio/gpio-xilinx.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c index d565fbf128b7..c9d740ac711b 100644 --- a/drivers/gpio/gpio-xilinx.c +++ b/drivers/gpio/gpio-xilinx.c @@ -319,6 +319,12 @@ static int xgpio_probe(struct platform_device *pdev) chip->gc.base = -1; chip->gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1]; + + if (chip->gc.ngpio > 64) { + dev_err(&pdev->dev, "invalid configuration: number of GPIO is greater than 64"); + return -EINVAL; + } + chip->gc.parent = &pdev->dev; chip->gc.direction_input = xgpio_dir_in; chip->gc.direction_output = xgpio_dir_out;