From patchwork Thu Feb 15 12:49:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 128420 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp1711653ljc; Thu, 15 Feb 2018 04:51:02 -0800 (PST) X-Google-Smtp-Source: AH8x2274Vta+YCNhz/vnoxy35ccUu9lhrROSwt+ayGBjfq7oJWh9q+A311w+f18D4gn1ZYEnV/Kb X-Received: by 10.99.186.22 with SMTP id k22mr2076941pgf.7.1518699062827; Thu, 15 Feb 2018 04:51:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518699062; cv=none; d=google.com; s=arc-20160816; b=RmkX1/LlOHsdJkLRQbeHt9ojAYMbkFS0Thu1yNJF9R/CgizVEFNfYfEd6Fyk7Kivhw dT/UXv03kahNXadz7DqPNSRelhr1MHPkVn/t0utzCAIH6rKeY7XSLGFEZsJxm42wCxJT vwou9ajWBHbo2cDjEtgPg/hi8mx9rsyJwmByyUlGiuIhwXrBspQNRwduwtyKVYrhV76F W74Dm9x41ztEejGRPTn59C/OcH8k4Ek5O1Qwrlsz4DrXYfRLh8Ol8XUkIFRzpoiNzbdk bwx798ag4qGukxNqoOmwnfCB17SbBxaWa9WqHu3ZM+Z+eoxRHNnlmeRpMq5+Ol+CHNIT HFRg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=UwNwwuylaQlFwFXZC0am6HrvdEbK52hj29OHiQF1Xbs=; b=hGwUbBnP8eDm/NadlnT+D4geiSqwFlUKiq/UKaJjQ23G5mm76Z31600fHOq/GirwM2 1YmFIPG8g9DUstxJntq4MoDdeAfs6yVR+mhK2tlxQwin6k6pbgxDcoCZ/QVyQbO0Vl0X fT7Jro9UJhhsYOp0MsFofSw644mMmlcbG4YZ208z5eDACOt3vqstc4GRm2oZHwzPrGCO c/f+EhO7jbBxqcMqNFnbQ9Mnp+uiiDqI96WdVeoDO3EkCSddKnZye5XRf6hr3Vb1/9ao ySamj4IFJkHe6ZFjmfq9uGG3riHgdvizFEMu5KACAEmYP2nKD0tKrmA+V1HM4++VNvl6 88+A== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=cXaL9Ab0; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m8si2411357pgu.551.2018.02.15.04.51.02; Thu, 15 Feb 2018 04:51:02 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=cXaL9Ab0; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030843AbeBOMvB (ORCPT + 5 others); Thu, 15 Feb 2018 07:51:01 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:50157 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1031323AbeBOMu7 (ORCPT ); Thu, 15 Feb 2018 07:50:59 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w1FCoTYA016582; Thu, 15 Feb 2018 06:50:29 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1518699030; bh=KtlPfTlssRlWsOMYbOLJArvvgfviej4gXWzgsiqffH0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=cXaL9Ab08ulnvoUSrX+WhhhSG8bcg3m3qCvKewO0gU2qA/YAw/rzM71Wg5BjAasN9 MQMrbLrjqCH7Nv63G8ETL56NHRa/Bf8nDL7M0rNLPm35ewXinNgnVYXRmX9/QYYv40 xweXCSE5kiRk2h2ApS6IO3T5rce3yyCksR0IBhRM= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1FCoTfT012370; Thu, 15 Feb 2018 06:50:29 -0600 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Thu, 15 Feb 2018 06:50:29 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Thu, 15 Feb 2018 06:50:29 -0600 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1FCoKZE020487; Thu, 15 Feb 2018 06:50:26 -0600 From: Tero Kristo To: , , , , , CC: , , Subject: [PATCH 2/5] clk: ti: add support for register read-modify-write low-level operation Date: Thu, 15 Feb 2018 14:49:48 +0200 Message-ID: <1518698991-10099-3-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1518698991-10099-1-git-send-email-t-kristo@ti.com> References: <1518698991-10099-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Useful for changing few bits on a register, this makes sure for example that the operation is done atomically in case of syscon. Signed-off-by: Tero Kristo --- drivers/clk/ti/clk.c | 24 ++++++++++++++++++++++++ include/linux/clk/ti.h | 2 ++ 2 files changed, 26 insertions(+) -- 1.9.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c index f4d6802..4efa2c9 100644 --- a/drivers/clk/ti/clk.c +++ b/drivers/clk/ti/clk.c @@ -55,6 +55,29 @@ static void clk_memmap_writel(u32 val, const struct clk_omap_reg *reg) writel_relaxed(val, io->mem + reg->offset); } +static void _clk_rmw(u32 val, u32 mask, void __iomem *ptr) +{ + u32 v; + + v = readl_relaxed(ptr); + v &= ~mask; + v |= val; + writel_relaxed(v, ptr); +} + +static void clk_memmap_rmw(u32 val, u32 mask, const struct clk_omap_reg *reg) +{ + struct clk_iomap *io = clk_memmaps[reg->index]; + + if (reg->ptr) { + _clk_rmw(val, mask, reg->ptr); + } else if (io->regmap) { + regmap_update_bits(io->regmap, reg->offset, mask, val); + } else { + _clk_rmw(val, mask, io->mem + reg->offset); + } +} + static u32 clk_memmap_readl(const struct clk_omap_reg *reg) { u32 val; @@ -89,6 +112,7 @@ int ti_clk_setup_ll_ops(struct ti_clk_ll_ops *ops) ti_clk_ll_ops = ops; ops->clk_readl = clk_memmap_readl; ops->clk_writel = clk_memmap_writel; + ops->clk_rmw = clk_memmap_rmw; return 0; } diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h index d18da83..9e86114 100644 --- a/include/linux/clk/ti.h +++ b/include/linux/clk/ti.h @@ -211,6 +211,7 @@ enum { * struct ti_clk_ll_ops - low-level ops for clocks * @clk_readl: pointer to register read function * @clk_writel: pointer to register write function + * @clk_rmw: pointer to register read-modify-write function * @clkdm_clk_enable: pointer to clockdomain enable function * @clkdm_clk_disable: pointer to clockdomain disable function * @clkdm_lookup: pointer to clockdomain lookup function @@ -226,6 +227,7 @@ enum { struct ti_clk_ll_ops { u32 (*clk_readl)(const struct clk_omap_reg *reg); void (*clk_writel)(u32 val, const struct clk_omap_reg *reg); + void (*clk_rmw)(u32 val, u32 mask, const struct clk_omap_reg *reg); int (*clkdm_clk_enable)(struct clockdomain *clkdm, struct clk *clk); int (*clkdm_clk_disable)(struct clockdomain *clkdm, struct clk *clk);