From patchwork Mon Jan 4 12:41:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 356577 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7EFDCC43381 for ; Mon, 4 Jan 2021 12:42:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4873C207B1 for ; Mon, 4 Jan 2021 12:42:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726124AbhADMmX (ORCPT ); Mon, 4 Jan 2021 07:42:23 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:34916 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725840AbhADMmX (ORCPT ); Mon, 4 Jan 2021 07:42:23 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 104CfXsE015124; Mon, 4 Jan 2021 06:41:33 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1609764093; bh=5LOsNk+DfZ3KJX3uwomu6Vnma6rc/1g2DMZdSRAxi8s=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=X2QK92L8BE8p3QM+xyIonxYwIuVIyUHCdInv+E3es+QB/ayAfftslBKbqeh/X0hwA flj16N0cg6GNIyCLkYjJBaHLN0Z2xkIgVcVkTADNLOBjVskPQVdOr6/RnSkmVy1EZt IlmxzHpBGesA06ncNLsLMcxHXsdhqTvVwnhTjOpA= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 104CfXEi095444 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 4 Jan 2021 06:41:33 -0600 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Mon, 4 Jan 2021 06:41:13 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Mon, 4 Jan 2021 06:41:13 -0600 Received: from a0393678-ssd.ent.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 104Cf3bh034579; Mon, 4 Jan 2021 06:41:09 -0600 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Rob Herring , Tom Joseph , Lorenzo Pieralisi , Kishon Vijay Abraham I , Nadeem Athani CC: , , , , Subject: [PATCH v2 1/4] dt-bindings: PCI: ti, j721e: Add binding to represent refclk to the connector Date: Mon, 4 Jan 2021 18:11:00 +0530 Message-ID: <20210104124103.30930-2-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210104124103.30930-1-kishon@ti.com> References: <20210104124103.30930-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add binding to represent refclk to the PCIe connector. Signed-off-by: Kishon Vijay Abraham I --- .../bindings/pci/ti,j721e-pci-host.yaml | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml index 0880a613ece6..7607018a115b 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml @@ -46,12 +46,21 @@ properties: maxItems: 1 clocks: - maxItems: 1 - description: clock-specifier to represent input to the PCIe + minItems: 1 + maxItems: 2 + description: clock-specifier to represent input to the PCIe for 1 item. + 2nd item if present represents reference clock to the connector. clock-names: - items: - - const: fck + oneOf: + - description: Represent input clock to the PCIe + items: + - const: fck + - description: Represent input clock to the PCIe and reference clock to + the connector. + items: + - const: fck + - const: pcie_refclk vendor-id: const: 0x104c From patchwork Mon Jan 4 12:41:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 356576 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70F6CC433E9 for ; Mon, 4 Jan 2021 12:44:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 323F621E92 for ; Mon, 4 Jan 2021 12:44:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727042AbhADMnn (ORCPT ); Mon, 4 Jan 2021 07:43:43 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:56494 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727019AbhADMnn (ORCPT ); Mon, 4 Jan 2021 07:43:43 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 104CfwsB098481; Mon, 4 Jan 2021 06:41:58 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1609764118; bh=pW+3Nkkfv15OxmYOKkSjlpKQ8IkjEw2ZblHzX+3dit8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=AKt/lhY0m29zqJN9KO05LwQipGxH1RVVYyYFtO7tp2VHQKUjuSdvOqjjZRC4+ilfd 5Lolq1uWdxseCo8rjYCljMbgOQhzuG6XOGG+o48Sm3I8eoLjNZ/HrCbpX1NB0ePUOV kvkgSuS0jA/d0GQkxA5CA4Drj0mp2Sv1OMo45kdA= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 104CfwnS080776 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 4 Jan 2021 06:41:58 -0600 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Mon, 4 Jan 2021 06:41:17 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Mon, 4 Jan 2021 06:41:17 -0600 Received: from a0393678-ssd.ent.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 104Cf3bi034579; Mon, 4 Jan 2021 06:41:13 -0600 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Rob Herring , Tom Joseph , Lorenzo Pieralisi , Kishon Vijay Abraham I , Nadeem Athani CC: , , , , Subject: [PATCH v2 2/4] dt-bindings: pci: ti, j721e: Add host mode dt-bindings for TI's AM64 SoC Date: Mon, 4 Jan 2021 18:11:01 +0530 Message-ID: <20210104124103.30930-3-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210104124103.30930-1-kishon@ti.com> References: <20210104124103.30930-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add host mode dt-bindings for TI's AM64 SoC. This is the same IP used in J7200, however AM64 is a non-coherent architecture. Signed-off-by: Kishon Vijay Abraham I --- .../devicetree/bindings/pci/ti,j721e-pci-host.yaml | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml index 7607018a115b..77118dba415e 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml @@ -16,12 +16,17 @@ allOf: properties: compatible: oneOf: - - description: PCIe controller in J7200 + - const: ti,am64-pcie-host + - const: ti,j7200-pcie-host + - const: ti,j721e-pcie-host + - description: PCIe controller in AM64 items: + - const: ti,am64-pcie-host - const: ti,j7200-pcie-host - const: ti,j721e-pcie-host - - description: PCIe controller in J721E + - description: PCIe controller in J7200 items: + - const: ti,j7200-pcie-host - const: ti,j721e-pcie-host reg: @@ -87,7 +92,6 @@ required: - vendor-id - device-id - msi-map - - dma-coherent - dma-ranges - ranges - reset-gpios From patchwork Mon Jan 4 12:41:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 356376 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp14936132jai; Mon, 4 Jan 2021 04:43:57 -0800 (PST) X-Google-Smtp-Source: ABdhPJylKenfJXzZJaeC8tiW9hYSQl2p2zxoyD9/sRd5+5sdHKV7xcCWN7UxjUwTxvLzwwC538eW X-Received: by 2002:a17:906:94d4:: with SMTP id d20mr66140191ejy.475.1609764236926; Mon, 04 Jan 2021 04:43:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1609764236; cv=none; d=google.com; s=arc-20160816; b=Uk/mA751/W4dyBCGfPModSKqTqCL8RhHpvhQI2b26SC6e7Ytphe+HGtmeyGwXjCNaA Cx0yal+US/RmashUTR+p/YsvI8Vpjx1krHHgMqdoa6eaQ98j5P8QnWOYmkYGR8wlgbw8 NNiz+ujsUbU01JEiNBwqLyMc9vFdE5B5/gjxS+dfXavLMb3AWV/2kBxofGXlKx/xKzZH /dkRZJJ91fg4+eWSyNJqiZ6VtRTnHJcY+dUQDQ2bmUIIpcCrFdY98LzxQR9g+jcqTgsl M8SaVG/FapNC1Pvtk/mMbHRuH1Ybru9bwqDifJZq3V1XjUar9SZYcf3tvjtcbeeCaLyG 0ntw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=ekIjBsGEy8ttVisERONWFmyGyUxpFsUO4LLaUm07A6A=; b=ryVTimPSujVe3k9/v7z66GPWgcTaB6LL8+THX2idJ2se5VmoMhTDdHjFa2uFe0xM2F Yp8gkKT9WvA7kRloXvI3wZcE3tTFe68b8Ecr4tmYVXN5AXR3eaDHjwsYUfOyTd3koEYt bQJSQluj7f8ChbD6uZ34WlgngddPkJH3ngxlHOjAQrz/yma+WZGDdcRRpFss5siwzWdE ZWvI+qlOzTg6wYEhHDUrBFYjr1ztzW0DVBX2B6aCH0FH03ebi4SjWrSUwzeVL38/L7ML ItZWYYdIPK5eNwg30ME2LuukWxy1rI9v5rdCRkRA3y42u0jN1KzMQzq/hgDifjCdgtme A67w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=eGjuHFPq; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u26si32993070edo.164.2021.01.04.04.43.56; Mon, 04 Jan 2021 04:43:56 -0800 (PST) Received-SPF: pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=eGjuHFPq; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726564AbhADMme (ORCPT + 3 others); Mon, 4 Jan 2021 07:42:34 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:34956 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726558AbhADMmd (ORCPT ); Mon, 4 Jan 2021 07:42:33 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 104Cfj1G015247; Mon, 4 Jan 2021 06:41:45 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1609764105; bh=ekIjBsGEy8ttVisERONWFmyGyUxpFsUO4LLaUm07A6A=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=eGjuHFPqO9E0G40l1ubfF9q9XagbjWUNzwQZXW6oAJmvxNDBT0kQo0NK5s3A1nE6k 6bCIudcJxc62vSC7hsf/sK+q/YSWFz6yfi1FDiYugsJO0jbFhvpvLJ4FXsvzAutDCP HsOO5qhPqzyM4pX/Om61J6uPBd4UxAu619wqZSY0= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 104CfjiD081592 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 4 Jan 2021 06:41:45 -0600 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Mon, 4 Jan 2021 06:41:21 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Mon, 4 Jan 2021 06:41:22 -0600 Received: from a0393678-ssd.ent.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 104Cf3bj034579; Mon, 4 Jan 2021 06:41:18 -0600 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Rob Herring , Tom Joseph , Lorenzo Pieralisi , Kishon Vijay Abraham I , Nadeem Athani CC: , , , , Subject: [PATCH v2 3/4] dt-bindings: pci: ti, j721e: Add endpoint mode dt-bindings for TI's AM64 SoC Date: Mon, 4 Jan 2021 18:11:02 +0530 Message-ID: <20210104124103.30930-4-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210104124103.30930-1-kishon@ti.com> References: <20210104124103.30930-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add endpoint mode dt-bindings for TI's AM64 SoC. This is the same IP used in J7200, however AM64 is a non-coherent architecture. Signed-off-by: Kishon Vijay Abraham I --- .../devicetree/bindings/pci/ti,j721e-pci-ep.yaml | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml index d06f0c4464c6..447c8fe0f09e 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml @@ -16,12 +16,17 @@ allOf: properties: compatible: oneOf: - - description: PCIe EP controller in J7200 + - const: ti,am64-pcie-ep + - const: ti,j7200-pcie-ep + - const: ti,j721e-pcie-ep + - description: PCIe EP controller in AM64 items: + - const: ti,am64-pcie-ep - const: ti,j7200-pcie-ep - const: ti,j721e-pcie-ep - - description: PCIe EP controller in J721E + - description: PCIe EP controller in J7200 items: + - const: ti,j7200-pcie-ep - const: ti,j721e-pcie-ep reg: @@ -66,7 +71,6 @@ required: - power-domains - clocks - clock-names - - dma-coherent - max-functions - phys - phy-names From patchwork Mon Jan 4 12:41:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 357224 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0248FC433E9 for ; Mon, 4 Jan 2021 12:43:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AFFAE224DF for ; Mon, 4 Jan 2021 12:43:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726652AbhADMmu (ORCPT ); Mon, 4 Jan 2021 07:42:50 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:56502 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726278AbhADMmt (ORCPT ); Mon, 4 Jan 2021 07:42:49 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 104Cg1Ai098496; Mon, 4 Jan 2021 06:42:01 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1609764121; bh=k3u+AVmoyV8AjjDEAKA55tnZJ8Kv6tWdf0rL6Di5au0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=rAdjzeiC8CQMcOEpvggErBwS75NZ7TMRGP9V6lb9vef9mNtJDUspxN4fmaS2gZRSC e18ZIt+t8YPfxToVroEkRzXTYJjxfhfCEecaqiMuR7WAo/YuBdvCoK/Aucx7TE3iD9 xP3gGfDJhiWqpSVlpCqOuBceYby6d0jMLaAK0YrQ= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 104Cg1mM096157 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 4 Jan 2021 06:42:01 -0600 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Mon, 4 Jan 2021 06:41:26 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Mon, 4 Jan 2021 06:41:26 -0600 Received: from a0393678-ssd.ent.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 104Cf3bk034579; Mon, 4 Jan 2021 06:41:22 -0600 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Rob Herring , Tom Joseph , Lorenzo Pieralisi , Kishon Vijay Abraham I , Nadeem Athani CC: , , , , Subject: [PATCH v2 4/4] PCI: j721e: Add support to provide refclk to PCIe connector Date: Mon, 4 Jan 2021 18:11:03 +0530 Message-ID: <20210104124103.30930-5-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210104124103.30930-1-kishon@ti.com> References: <20210104124103.30930-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add support to provide refclk to PCIe connector. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/cadence/pci-j721e.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c index dac1ac8a7615..2e73729c7388 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -6,6 +6,7 @@ * Author: Kishon Vijay Abraham I */ +#include #include #include #include @@ -50,6 +51,7 @@ enum link_status { struct j721e_pcie { struct device *dev; + struct clk *refclk; u32 mode; u32 num_lanes; struct cdns_pcie *cdns_pcie; @@ -310,6 +312,7 @@ static int j721e_pcie_probe(struct platform_device *pdev) struct cdns_pcie_ep *ep; struct gpio_desc *gpiod; void __iomem *base; + struct clk *clk; u32 num_lanes; u32 mode; int ret; @@ -408,6 +411,20 @@ static int j721e_pcie_probe(struct platform_device *pdev) goto err_get_sync; } + clk = devm_clk_get_optional(dev, "pcie_refclk"); + if (IS_ERR(clk)) { + dev_err(dev, "failed to get pcie_refclk\n"); + ret = PTR_ERR(clk); + goto err_pcie_setup; + } + + ret = clk_prepare_enable(clk); + if (ret) { + dev_err(dev, "failed to enable pcie_refclk\n"); + goto err_get_sync; + } + pcie->refclk = clk; + /* * "Power Sequencing and Reset Signal Timings" table in * PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0 @@ -476,6 +493,7 @@ static int j721e_pcie_remove(struct platform_device *pdev) struct cdns_pcie *cdns_pcie = pcie->cdns_pcie; struct device *dev = &pdev->dev; + clk_disable_unprepare(pcie->refclk); cdns_pcie_disable_phy(cdns_pcie); pm_runtime_put(dev); pm_runtime_disable(dev);