From patchwork Sat Feb 17 14:00:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 128665 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp1618697ljc; Sat, 17 Feb 2018 06:03:27 -0800 (PST) X-Google-Smtp-Source: AH8x224PWsroTz7Ne111XRPmascHewwh+AHLawpeVzQKvN8JazkyEWdWXPIn6fVCFCNT/CM0zMEC X-Received: by 10.37.179.38 with SMTP id l38mr5587907ybj.142.1518876207345; Sat, 17 Feb 2018 06:03:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518876207; cv=none; d=google.com; s=arc-20160816; b=AfEBgiCuLYIFNc45by3+ySLVBZGg8YBMp466sG15eK3c0LuDGL1yK9hYVcH57x2BwD G/EgbwTzLN7JPha0xba8BLBUznbl89eVhNqPCCeO5/DzSiryRJhvPM5znIksAc0WXJ0e es7wXUWNhNuPqJX0PYrlUeYt476ss8fvHUNyzMZE3HWyooxdxD6/BENUOqk+6LtM9/bx mTqTSw3Ww2/Gfr+HtZvi6VEpgw97Rwnq164mfQzNW7nkgR35YuQ3eGPFJ7RlQ5KoXg3T P8t4mPkMNABtYaRTr0nc+KryDzVELvMqykuUQfou7O3Y222QZK0FfKfjqjesmbpiEzeR PNWw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:message-id:date:to:from :dkim-signature:arc-authentication-results; bh=8g3VeqEBLLwqmfKajkLXAjgCGS5xAsK+XOXYyEJ1460=; b=qMlXFx32TZ6UBhVYvOTjhRurRHN17tju+uSSN2O/uFbf6NN5lSRNa1svn4gW8uYbOe doGhzkcEFWUK+451xzqcqYpHmeb+0yd53cRnvFwvQ71nxJKATE3nk1Y8+hfnUhnXZfck Muxb4a6GWNcBR8ZEV8Ys7UBVDEU9F2g9s74FPJsesm2d4I+Fkzle/xOsXDAI3QThJ4qN 6x8ZfwoP4JOIGTau8IGPYtB9jvDGndGQmkXgNfRsS8VS9uuMJuQFvB5AOkFO1vxDf1bw 3V6E7QDLGT+EsNze5R+jZG6Y1TBzwNAAPfQmmf56/2WOEJLk7g/+blhHmRXXZVerjmsy FMcg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=dOU9yWni; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[213.113.116.203]) by smtp.gmail.com with ESMTPSA id w204sm122054lff.29.2018.02.17.06.02.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 17 Feb 2018 06:02:55 -0800 (PST) From: Linus Walleij To: qemu-devel@nongnu.org Date: Sat, 17 Feb 2018 15:00:49 +0100 Message-Id: <20180217140051.22731-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4010:c07::243 Subject: [Qemu-devel] [PATCH 1/3] hw/i2c-ddc: Do not fail writes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linus Walleij , qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The tx function of the DDC I2C slave emulation was returning 1 on all writes resulting in NACK in the I2C bus. Changing it to 0 makes the DDC I2C work fine with bit-banged I2C such as the versatile I2C. I guess it was not affecting whatever I2C controller this was used with until now, but with the Versatile I2C it surely does not work. Signed-off-by: Linus Walleij --- hw/i2c/i2c-ddc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.14.3 Reviewed-by: Peter Maydell diff --git a/hw/i2c/i2c-ddc.c b/hw/i2c/i2c-ddc.c index 199dac9e41c1..bec0c91e2dd0 100644 --- a/hw/i2c/i2c-ddc.c +++ b/hw/i2c/i2c-ddc.c @@ -259,12 +259,12 @@ static int i2c_ddc_tx(I2CSlave *i2c, uint8_t data) s->reg = data; s->firstbyte = false; DPRINTF("[EDID] Written new pointer: %u\n", data); - return 1; + return 0; } /* Ignore all writes */ s->reg++; - return 1; + return 0; } static void i2c_ddc_init(Object *obj) From patchwork Sat Feb 17 14:00:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 128666 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp1619801ljc; Sat, 17 Feb 2018 06:04:36 -0800 (PST) X-Google-Smtp-Source: AH8x226Tmj6v0/RrsfyTBsCfq8m07bSIzAmBKus+MwJJJCtJ1U9cvhp23u5bXoeQZll8hWVIgqzQ X-Received: by 10.37.107.78 with SMTP id o14mr1484846ybm.337.1518876276440; Sat, 17 Feb 2018 06:04:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518876276; cv=none; d=google.com; s=arc-20160816; b=UHnSRRvunwV7nRZ9mwBff+ZvqOtdB+PtBN9N5NJqm6BeSEwrJ7n+piiFyhSn8C0SHx m1D6lReAb7WmueqWBOVZbA05Tw/L4z5XN1gGcXSidtkQhnOaJ7apdwO4gidKf1O9RrG4 H0PGdTPh6ZO0vXSnMbbeKGNH4eUEzKtr5KQCdDWH0Dta+2OITAMbSYJeOtKhwRSRB2Ph RHsXti6ngN2aFNhqR3HxqJrJQN6VpOybM/uXDWx1CknBW3RCKD2QepEWAR3OhKKh8Duq eigafxm69TFQU/191OnCXXk4j+fHRy5L1i/aS7LSO6YJK6E2mJCLGbjxgeUpo20f8ch0 QpDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=KWsTBDfBdhi/iC7vjg9grd1Np8GxFeYjxGwjjAolK6I=; b=1DCrbL9wTJMgvzKWK1CE2On7sTghIHGen6Qrjdkc2V0ifXJEsz7PwRJTFcDEBMd6+5 fAHOkGoRhzyW98JTdAEuMzz1h6n8LiPz0zjPuUP53TDtEeTe/9gJkRDqZRzS1wnNlQpn ZH2nbGeaEp3ZGntfMrmouQnxMYnQ1RZC7ZfynlFuEO/yhYf+EL4Ed+zxyMpr6uZCruF7 yPtYFHDeV+Yr+G8w2zKmTGVMvQIwmXMxokPmUoWcwh0oSHwylFCVbDyKAypj0YrY2w0L zq+ZfKd07918YUDYq1ufz0i9BkaBZu1LwpA+i1KvSqF5zCJZZKTKi7kgof2YTWVu5frW qY/w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=SC4BoolG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[213.113.116.203]) by smtp.gmail.com with ESMTPSA id w204sm122054lff.29.2018.02.17.06.04.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 17 Feb 2018 06:04:00 -0800 (PST) From: Linus Walleij To: qemu-devel@nongnu.org Date: Sat, 17 Feb 2018 15:00:50 +0100 Message-Id: <20180217140051.22731-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180217140051.22731-1-linus.walleij@linaro.org> References: <20180217140051.22731-1-linus.walleij@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4010:c07::244 Subject: [Qemu-devel] [PATCH 2/3] hw/sii9022: Add support for Silicon Image SII9022 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linus Walleij , qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This adds support for emulating the Silicon Image SII9022 DVI/HDMI bridge. It's not very clever right now, it just acknowledges the switch into DDC I2C mode and back. Combining this with the existing DDC I2C emulation gives the right behavior on the Versatile Express emulation passing through the QEMU EDID to the emulated platform. Signed-off-by: Linus Walleij --- hw/display/Makefile.objs | 1 + hw/display/sii9022.c | 185 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 186 insertions(+) create mode 100644 hw/display/sii9022.c -- 2.14.3 diff --git a/hw/display/Makefile.objs b/hw/display/Makefile.objs index d3a4cb396eb9..3c7c75b94da5 100644 --- a/hw/display/Makefile.objs +++ b/hw/display/Makefile.objs @@ -3,6 +3,7 @@ common-obj-$(CONFIG_VGA_CIRRUS) += cirrus_vga.o common-obj-$(CONFIG_G364FB) += g364fb.o common-obj-$(CONFIG_JAZZ_LED) += jazz_led.o common-obj-$(CONFIG_PL110) += pl110.o +common-obj-$(CONFIG_SII9022) += sii9022.o common-obj-$(CONFIG_SSD0303) += ssd0303.o common-obj-$(CONFIG_SSD0323) += ssd0323.o common-obj-$(CONFIG_XEN) += xenfb.o diff --git a/hw/display/sii9022.c b/hw/display/sii9022.c new file mode 100644 index 000000000000..d6f3cdc04293 --- /dev/null +++ b/hw/display/sii9022.c @@ -0,0 +1,185 @@ +/* + * Silicon Image SiI9022 + * + * This is a pretty hollow emulation: all we do is acknowledge that we + * exist (chip ID) and confirm that we get switched over into DDC mode + * so the emulated host can proceed to read out EDID data. All subsequent + * set-up of connectors etc will be acknowledged and ignored. + * + * Copyright (c) 2018 Linus Walleij + * + * This code is licensed under the GNU GPL v2. + * + * Contributions after 2012-01-13 are licensed under the terms of the + * GNU GPL, version 2 or (at your option) any later version. + */ + +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "hw/i2c/i2c.h" + +#define DEBUG_SII9022 0 + +#define DPRINTF(fmt, ...) \ + do { \ + if (DEBUG_SII9022) { \ + printf("sii9022: " fmt, ## __VA_ARGS__); \ + } \ + } while (0) + +#define SII9022_SYS_CTRL_DATA 0x1a +#define SII9022_SYS_CTRL_PWR_DWN 0x10 +#define SII9022_SYS_CTRL_AV_MUTE 0x08 +#define SII9022_SYS_CTRL_DDC_BUS_REQ 0x04 +#define SII9022_SYS_CTRL_DDC_BUS_GRTD 0x02 +#define SII9022_SYS_CTRL_OUTPUT_MODE 0x01 +#define SII9022_SYS_CTRL_OUTPUT_HDMI 1 +#define SII9022_SYS_CTRL_OUTPUT_DVI 0 +#define SII9022_REG_CHIPID 0x1b +#define SII9022_INT_ENABLE 0x3c +#define SII9022_INT_STATUS 0x3d +#define SII9022_INT_STATUS_HOTPLUG 0x01; +#define SII9022_INT_STATUS_PLUGGED 0x04; + +#define TYPE_SII9022 "sii9022" +#define SII9022(obj) OBJECT_CHECK(sii9022_state, (obj), TYPE_SII9022) + +typedef struct sii9022_state { + I2CSlave parent_obj; + uint8_t ptr; + bool addr_byte; + bool ddc_req; + bool ddc_skip_finish; + bool ddc; +} sii9022_state; + +static const VMStateDescription vmstate_sii9022 = { + .name = "sii9022", + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_I2C_SLAVE(parent_obj, sii9022_state), + VMSTATE_UINT8(ptr, sii9022_state), + VMSTATE_BOOL(addr_byte, sii9022_state), + VMSTATE_BOOL(ddc_req, sii9022_state), + VMSTATE_BOOL(ddc_skip_finish, sii9022_state), + VMSTATE_BOOL(ddc, sii9022_state), + VMSTATE_END_OF_LIST() + } +}; + +static int sii9022_event(I2CSlave *i2c, enum i2c_event event) +{ + sii9022_state *s = SII9022(i2c); + + switch (event) { + case I2C_START_SEND: + s->addr_byte = true; + break; + case I2C_START_RECV: + break; + case I2C_FINISH: + break; + case I2C_NACK: + break; + } + + return 0; +} + +static int sii9022_rx(I2CSlave *i2c) +{ + sii9022_state *s = SII9022(i2c); + uint8_t res = 0x00; + + switch (s->ptr) { + case SII9022_SYS_CTRL_DATA: + if (s->ddc_req) { + /* Acknowledge DDC bus request */ + res = SII9022_SYS_CTRL_DDC_BUS_GRTD | SII9022_SYS_CTRL_DDC_BUS_REQ; + } + break; + case SII9022_REG_CHIPID: + res = 0xb0; + break; + case SII9022_INT_STATUS: + /* Something is cold-plugged in, no interrupts */ + res = SII9022_INT_STATUS_PLUGGED; + break; + default: + break; + } + DPRINTF("%02x read from %02x\n", res, s->ptr); + s->ptr++; + + return res; +} + +static int sii9022_tx(I2CSlave *i2c, uint8_t data) +{ + sii9022_state *s = SII9022(i2c); + + if (s->addr_byte) { + s->ptr = data; + s->addr_byte = false; + return 0; + } + + switch (s->ptr) { + case SII9022_SYS_CTRL_DATA: + if (data & SII9022_SYS_CTRL_DDC_BUS_REQ) { + s->ddc_req = true; + if (data & SII9022_SYS_CTRL_DDC_BUS_GRTD) { + s->ddc = true; + /* Skip this finish since we just switched to DDC */ + s->ddc_skip_finish = true; + DPRINTF("switched to DDC mode\n"); + } + } else { + s->ddc_req = false; + s->ddc = false; + } + break; + default: + break; + } + + DPRINTF("%02x written to %02x\n", data, s->ptr); + s->ptr++; + + return 0; +} + +static void sii9022_reset(DeviceState *dev) +{ + sii9022_state *s = SII9022(dev); + + s->ptr = 0; + s->addr_byte = false; +} + +static void sii9022_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + I2CSlaveClass *k = I2C_SLAVE_CLASS(klass); + + k->event = sii9022_event; + k->recv = sii9022_rx; + k->send = sii9022_tx; + dc->reset = sii9022_reset; + dc->vmsd = &vmstate_sii9022; +} + +static const TypeInfo sii9022_info = { + .name = TYPE_SII9022, + .parent = TYPE_I2C_SLAVE, + .instance_size = sizeof(sii9022_state), + .class_init = sii9022_class_init, +}; + +static void sii9022_register_types(void) +{ + type_register_static(&sii9022_info); +} + +type_init(sii9022_register_types) From patchwork Sat Feb 17 14:00:51 2018 Content-Type: text/plain; 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[213.113.116.203]) by smtp.gmail.com with ESMTPSA id w204sm122054lff.29.2018.02.17.06.04.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 17 Feb 2018 06:04:03 -0800 (PST) From: Linus Walleij To: qemu-devel@nongnu.org Date: Sat, 17 Feb 2018 15:00:51 +0100 Message-Id: <20180217140051.22731-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180217140051.22731-1-linus.walleij@linaro.org> References: <20180217140051.22731-1-linus.walleij@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4010:c07::243 Subject: [Qemu-devel] [PATCH 3/3] arm/vexpress: Add proper display connector emulation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linus Walleij , qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This adds the SiI9022 and EDID I2C devices to the ARM Versatile Express machine, and selects the two I2C devices necessary in the arm-softmmy.mak configuration so everything will build smoothly. I am implementing proper handling of the graphics in the Linux kernel and adding proper emulation of SiI9022 and EDID makes the driver probe as nicely as before, retrieveing the resolutions supported by the "QEMU monitor" and overall just working nice. The assignment of the SiI9022 at address 0x39 and the EDID DDC I2C at address 0x50 is not strictly correct: the DDC I2C is there all the time but in the actual component it only appears once activated inside the SiI9022, so ideally it should be added and removed to the bus by the SiI9022. However for this purpose it works fine to just have it around. Signed-off-by: Linus Walleij --- default-configs/arm-softmmu.mak | 2 ++ hw/arm/vexpress.c | 7 ++++++- 2 files changed, 8 insertions(+), 1 deletion(-) -- 2.14.3 diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak index ca34cf446242..54f855d07206 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -21,6 +21,8 @@ CONFIG_STELLARIS_INPUT=y CONFIG_STELLARIS_ENET=y CONFIG_SSD0303=y CONFIG_SSD0323=y +CONFIG_DDC=y +CONFIG_SII9022=y CONFIG_ADS7846=y CONFIG_MAX111X=y CONFIG_SSI=y diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index dc5928ae1ab5..d6c912c97684 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -29,6 +29,7 @@ #include "hw/arm/arm.h" #include "hw/arm/primecell.h" #include "hw/devices.h" +#include "hw/i2c/i2c.h" #include "net/net.h" #include "sysemu/sysemu.h" #include "hw/boards.h" @@ -537,6 +538,7 @@ static void vexpress_common_init(MachineState *machine) uint32_t sys_id; DriveInfo *dinfo; pflash_t *pflash0; + I2CBus *i2c; ram_addr_t vram_size, sram_size; MemoryRegion *sysmem = get_system_memory(); MemoryRegion *vram = g_new(MemoryRegion, 1); @@ -628,7 +630,10 @@ static void vexpress_common_init(MachineState *machine) sysbus_create_simple("sp804", map[VE_TIMER01], pic[2]); sysbus_create_simple("sp804", map[VE_TIMER23], pic[3]); - /* VE_SERIALDVI: not modelled */ + dev = sysbus_create_simple("versatile_i2c", map[VE_SERIALDVI], NULL); + i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c"); + i2c_create_slave(i2c, "sii9022", 0x39); + i2c_create_slave(i2c, "i2c-ddc", 0x50); sysbus_create_simple("pl031", map[VE_RTC], pic[4]); /* RTC */