From patchwork Wed Jan 6 13:42:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 358014 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08B67C433E6 for ; Wed, 6 Jan 2021 13:46:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D43F02311F for ; Wed, 6 Jan 2021 13:46:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727448AbhAFNp3 (ORCPT ); Wed, 6 Jan 2021 08:45:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726924AbhAFNox (ORCPT ); Wed, 6 Jan 2021 08:44:53 -0500 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31F07C061358; Wed, 6 Jan 2021 05:44:13 -0800 (PST) Received: by mail-wm1-x334.google.com with SMTP id k10so2486336wmi.3; Wed, 06 Jan 2021 05:44:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bxZLTc7rIJqLiJdfqS1xtEvX/QdxfbBjIy6J1+OLQNE=; b=IM3iZ4sPhKgYRgmLXkyxqO3lbGRcEzCB35idFQMDqIGzIkLMgyMe34WRg0uz6B0D0X RfDlRfrHmm5RSt/EfDpfapTTxq8qiqxmBbtT+kMGRk+2BIo2kMU6NxoEQ2znALmQRaCj ZnU+6Az6+diszOdSiS0SkWxBAiHPPMB5dlcKR2qlkRmhCsfhcvQa/tIhpWWOIMAF7bij KerJJ1KM1FUWtRyGa/W60M1CrZ48lMzhNkXOcIhLFkbFDqXlNkqIlWClykAECCtZ3hS4 lau4tY66z5RXP8LIZ3WQ3Z3e0CpK0JivxJt5bpQbr3fJl5EYS6Rm4DnZ6pN6HBRP6Qrc AW0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bxZLTc7rIJqLiJdfqS1xtEvX/QdxfbBjIy6J1+OLQNE=; b=kBKLj5jl/WKjIzKx22cg9HagPZDfdP2IaZPVMi7k3HrlAqdcxpvnmaG43Ea+GqNWtx ArkLiBSAZYQJbI6MukJngsdhiig4WBFVH3otNZ2feAFpWpwy6JEG9SVKySSrHb6dAqJM 45htRFu7HNDNcpVMqtnn9qFLEy1FhBu9VzV7+ZaRpB3o06deWC3vhSwWfi9hA9LQo23z waOrujcz9eHxFnaDSqyc0W/b69pAT8AWoXWt/6uF/KSeHHrqw4jl9PVmgWq2eCY+7FsR QTKTnrB4KByZ2O9En/vmWLOu8Jmen1325CHKaklMOeLLB+vAxM0sieh/poOxygFEPlur LH7Q== X-Gm-Message-State: AOAM530jqCEZCw7DPFkqfhAckNSmJxqThurEaKa/SsEyB7YonN9maOBp qzr2H0+Of16mURZ++Izz4QI= X-Google-Smtp-Source: ABdhPJwfCUpDM2zedZ6Ij/scp6mHXprurYB1xW+w1ei+iiMBq/uFUOVnbjd+JJvVnjYc+FsdkE12eQ== X-Received: by 2002:a7b:c2e8:: with SMTP id e8mr3714963wmk.103.1609940651943; Wed, 06 Jan 2021 05:44:11 -0800 (PST) Received: from localhost.localdomain (p200300f13711ec00428d5cfffeb99db8.dip0.t-ipconnect.de. [2003:f1:3711:ec00:428d:5cff:feb9:9db8]) by smtp.googlemail.com with ESMTPSA id f14sm3085351wme.14.2021.01.06.05.44.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jan 2021 05:44:11 -0800 (PST) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, netdev@vger.kernel.org Cc: davem@davemloft.net, kuba@kernel.org, robh+dt@kernel.org, andrew@lunn.ch, f.fainelli@gmail.com, jianxin.pan@amlogic.com, narmstrong@baylibre.com, khilman@baylibre.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jbrunet@baylibre.com, Martin Blumenstingl Subject: [PATCH v4 2/5] net: stmmac: dwmac-meson8b: fix enabling the timing-adjustment clock Date: Wed, 6 Jan 2021 14:42:48 +0100 Message-Id: <20210106134251.45264-3-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210106134251.45264-1-martin.blumenstingl@googlemail.com> References: <20210106134251.45264-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The timing-adjustment clock only has to be enabled when a) there is a 2ns RX delay configured using device-tree and b) the phy-mode indicates that the RX delay should be enabled. Only enable the RX delay if both are true, instead of (by accident) also enabling it when there's the 2ns RX delay configured but the phy-mode incicates that the RX delay is not used. Fixes: 9308c47640d515 ("net: stmmac: dwmac-meson8b: add support for the RX delay configuration") Reported-by: Andrew Lunn Reviewed-by: Andrew Lunn Reviewed-by: Florian Fainelli Signed-off-by: Martin Blumenstingl --- drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c index f184b00f5116..5f500141567d 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c @@ -301,7 +301,7 @@ static int meson8b_init_prg_eth(struct meson8b_dwmac *dwmac) return -EINVAL; } - if (rx_dly_config & PRG_ETH0_ADJ_ENABLE) { + if (delay_config & PRG_ETH0_ADJ_ENABLE) { if (!dwmac->timing_adj_clk) { dev_err(dwmac->dev, "The timing-adjustment clock is mandatory for the RX delay re-timing\n"); From patchwork Wed Jan 6 13:42:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 358016 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC26AC4332B for ; Wed, 6 Jan 2021 13:45:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 785852311A for ; Wed, 6 Jan 2021 13:45:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727362AbhAFNo6 (ORCPT ); Wed, 6 Jan 2021 08:44:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49940 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727250AbhAFNo5 (ORCPT ); Wed, 6 Jan 2021 08:44:57 -0500 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9AF4BC06134C; Wed, 6 Jan 2021 05:44:16 -0800 (PST) Received: by mail-wr1-x42b.google.com with SMTP id 91so2478906wrj.7; Wed, 06 Jan 2021 05:44:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Bj9QR4GcsVI7/BBA1Gy1qvVAIyCNaZb8bS0S8Rhtv/4=; b=c/W/MLP22cFw5ohBhb4ymuDkHXfLECsyGsr//56SCIM7ZzDQmRO7uf9Xxndn44P1p2 YurWz3sptqksqOf7yxSFm/FuJP7DoepaWyKgbXWz/N6OBLjVg7vsbMNcyte6/gN9txcS uwDjEw2lFUSS7V0XOMt9rH4tNQppGPEQDMMAlqVilc18SsBjsu0rpPhrAjiM7UyMwNin lD1yud2uUPt5SsMeASyUx01HTEyyU2/lnhAtHg0/0el0m8hFjIDVe+Zgj2OHO1MqI+ou /L/uR+A9aGvRePf5S7UkpeM49XGQfoty4N0iN0DFKFQeBOI3PUlnMIGGhMuurX87matF UqAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Bj9QR4GcsVI7/BBA1Gy1qvVAIyCNaZb8bS0S8Rhtv/4=; b=W++8jp0snl5PlcM3Ou7MXWGdvBrdbLKgD1vrHNypMsatYnLQWwOazs/taSh/24PcNL ojMDcyAzmIZpUByx9sZU5jyCV+H9QUMKQSrlNsJ0Jt5M+dWERIIoMhD4MEK5G28yQ6Zd TzzGrOtmplJwdkdudbLWe6PMzgaZ9DeyYGaG7Lfp4y13uoJghBPQjIXaGHi4/pGlir6+ VSnP367+xePub4JcHTkEBsWTSeA5rUbjkqKBWsD6bAyOORSFIB1VGCUGEg84926fHd2s JZaEzU583YlO3pXNIZajRIpMva3RlKHUcahDvgMeVY/0PgSwtCegZg4Owk6sFms7eHN6 PGSg== X-Gm-Message-State: AOAM533chcZEq/VaVEZbZjxEch0ti0qxtv82vJRuzhHU9AGec0UnbFl7 r9mpHoGEYAFJeJs1fcJpZnk= X-Google-Smtp-Source: ABdhPJwrzRV0FdmMjI5mkXJwFhegdW00g1wQZPfHMRaXu9w5AOxrQZt2a3ct88SU7Ng6ZEW8fPVJaQ== X-Received: by 2002:a5d:540f:: with SMTP id g15mr4354055wrv.397.1609940655212; Wed, 06 Jan 2021 05:44:15 -0800 (PST) Received: from localhost.localdomain (p200300f13711ec00428d5cfffeb99db8.dip0.t-ipconnect.de. [2003:f1:3711:ec00:428d:5cff:feb9:9db8]) by smtp.googlemail.com with ESMTPSA id f14sm3085351wme.14.2021.01.06.05.44.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jan 2021 05:44:14 -0800 (PST) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, netdev@vger.kernel.org Cc: davem@davemloft.net, kuba@kernel.org, robh+dt@kernel.org, andrew@lunn.ch, f.fainelli@gmail.com, jianxin.pan@amlogic.com, narmstrong@baylibre.com, khilman@baylibre.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jbrunet@baylibre.com, Martin Blumenstingl Subject: [PATCH v4 5/5] net: stmmac: dwmac-meson8b: add support for the RGMII RX delay on G12A Date: Wed, 6 Jan 2021 14:42:51 +0100 Message-Id: <20210106134251.45264-6-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210106134251.45264-1-martin.blumenstingl@googlemail.com> References: <20210106134251.45264-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Amlogic Meson G12A (and newer: G12B, SM1) SoCs have a more advanced RX delay logic. Instead of fine-tuning the delay in the nanoseconds range it now allows tuning in 200 picosecond steps. This support comes with new bits in the PRG_ETH1[19:16] register. Add support for validating the RGMII RX delay as well as configuring the register accordingly on these platforms. Reviewed-by: Andrew Lunn Reviewed-by: Florian Fainelli Signed-off-by: Martin Blumenstingl --- .../ethernet/stmicro/stmmac/dwmac-meson8b.c | 61 +++++++++++++++---- 1 file changed, 48 insertions(+), 13 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c index 4937432ac70d..55152d7ba99a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c @@ -68,10 +68,21 @@ */ #define PRG_ETH0_ADJ_SKEW GENMASK(24, 20) +#define PRG_ETH1 0x4 + +/* Defined for adding a delay to the input RX_CLK for better timing. + * Each step is 200ps. These bits are used with external RGMII PHYs + * because RGMII RX only has the small window. cfg_rxclk_dly can + * adjust the window between RX_CLK and RX_DATA and improve the stability + * of "rx data valid". + */ +#define PRG_ETH1_CFG_RXCLK_DLY GENMASK(19, 16) + struct meson8b_dwmac; struct meson8b_dwmac_data { int (*set_phy_mode)(struct meson8b_dwmac *dwmac); + bool has_prg_eth1_rgmii_rx_delay; }; struct meson8b_dwmac { @@ -270,30 +281,35 @@ static int meson8b_devm_clk_prepare_enable(struct meson8b_dwmac *dwmac, static int meson8b_init_rgmii_delays(struct meson8b_dwmac *dwmac) { - u32 tx_dly_config, rx_dly_config, delay_config; + u32 tx_dly_config, rx_adj_config, cfg_rxclk_dly, delay_config; int ret; + rx_adj_config = 0; + cfg_rxclk_dly = 0; tx_dly_config = FIELD_PREP(PRG_ETH0_TXDLY_MASK, dwmac->tx_delay_ns >> 1); - if (dwmac->rx_delay_ps == 2000) - rx_dly_config = PRG_ETH0_ADJ_ENABLE | PRG_ETH0_ADJ_SETUP; - else - rx_dly_config = 0; + if (dwmac->data->has_prg_eth1_rgmii_rx_delay) + cfg_rxclk_dly = FIELD_PREP(PRG_ETH1_CFG_RXCLK_DLY, + dwmac->rx_delay_ps / 200); + else if (dwmac->rx_delay_ps == 2000) + rx_adj_config = PRG_ETH0_ADJ_ENABLE | PRG_ETH0_ADJ_SETUP; switch (dwmac->phy_mode) { case PHY_INTERFACE_MODE_RGMII: - delay_config = tx_dly_config | rx_dly_config; + delay_config = tx_dly_config | rx_adj_config; break; case PHY_INTERFACE_MODE_RGMII_RXID: delay_config = tx_dly_config; + cfg_rxclk_dly = 0; break; case PHY_INTERFACE_MODE_RGMII_TXID: - delay_config = rx_dly_config; + delay_config = rx_adj_config; break; case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RMII: delay_config = 0; + cfg_rxclk_dly = 0; break; default: dev_err(dwmac->dev, "unsupported phy-mode %s\n", @@ -323,6 +339,9 @@ static int meson8b_init_rgmii_delays(struct meson8b_dwmac *dwmac) PRG_ETH0_ADJ_DELAY | PRG_ETH0_ADJ_SKEW, delay_config); + meson8b_dwmac_mask_bits(dwmac, PRG_ETH1, PRG_ETH1_CFG_RXCLK_DLY, + cfg_rxclk_dly); + return 0; } @@ -423,11 +442,20 @@ static int meson8b_dwmac_probe(struct platform_device *pdev) dwmac->rx_delay_ps *= 1000; } - if (dwmac->rx_delay_ps != 0 && dwmac->rx_delay_ps != 2000) { - dev_err(&pdev->dev, - "The only allowed RX delays values are: 0ps, 2000ps"); - ret = -EINVAL; - goto err_remove_config_dt; + if (dwmac->data->has_prg_eth1_rgmii_rx_delay) { + if (dwmac->rx_delay_ps != 0 && dwmac->rx_delay_ps != 2000) { + dev_err(dwmac->dev, + "The only allowed RGMII RX delays values are: 0ps, 2000ps"); + ret = -EINVAL; + goto err_remove_config_dt; + } + } else { + if (dwmac->rx_delay_ps > 3000 || dwmac->rx_delay_ps % 200) { + dev_err(dwmac->dev, + "The RGMII RX delay range is 0..3000ps in 200ps steps"); + ret = -EINVAL; + goto err_remove_config_dt; + } } dwmac->timing_adj_clk = devm_clk_get_optional(dwmac->dev, @@ -469,10 +497,17 @@ static int meson8b_dwmac_probe(struct platform_device *pdev) static const struct meson8b_dwmac_data meson8b_dwmac_data = { .set_phy_mode = meson8b_set_phy_mode, + .has_prg_eth1_rgmii_rx_delay = false, }; static const struct meson8b_dwmac_data meson_axg_dwmac_data = { .set_phy_mode = meson_axg_set_phy_mode, + .has_prg_eth1_rgmii_rx_delay = false, +}; + +static const struct meson8b_dwmac_data meson_g12a_dwmac_data = { + .set_phy_mode = meson_axg_set_phy_mode, + .has_prg_eth1_rgmii_rx_delay = true, }; static const struct of_device_id meson8b_dwmac_match[] = { @@ -494,7 +529,7 @@ static const struct of_device_id meson8b_dwmac_match[] = { }, { .compatible = "amlogic,meson-g12a-dwmac", - .data = &meson_axg_dwmac_data, + .data = &meson_g12a_dwmac_data, }, { } };