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X-Received-From: 2a00:1450:4010:c07::241 Subject: [Qemu-devel] [PATCH 1/5] i2c: Fix some brace style issues X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Corey Minyard , Linus Walleij , qemu-arm@nongnu.org, =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Corey Minyard Signed-off-by: Corey Minyard Reviewed-by: Peter Maydell Signed-off-by: Linus Walleij --- hw/i2c/core.c | 3 +-- include/hw/i2c/i2c.h | 6 ++---- 2 files changed, 3 insertions(+), 6 deletions(-) -- 2.14.3 diff --git a/hw/i2c/core.c b/hw/i2c/core.c index 59068f157eb5..9a54b61c1dbd 100644 --- a/hw/i2c/core.c +++ b/hw/i2c/core.c @@ -19,8 +19,7 @@ struct I2CNode { #define I2C_BROADCAST 0x00 -struct I2CBus -{ +struct I2CBus { BusState qbus; QLIST_HEAD(, I2CNode) current_devs; uint8_t saved_address; diff --git a/include/hw/i2c/i2c.h b/include/hw/i2c/i2c.h index 24e95d015589..8fd449f645f0 100644 --- a/include/hw/i2c/i2c.h +++ b/include/hw/i2c/i2c.h @@ -25,8 +25,7 @@ typedef struct I2CSlave I2CSlave; #define I2C_SLAVE_GET_CLASS(obj) \ OBJECT_GET_CLASS(I2CSlaveClass, (obj), TYPE_I2C_SLAVE) -typedef struct I2CSlaveClass -{ +typedef struct I2CSlaveClass { DeviceClass parent_class; /* Callbacks provided by the device. */ @@ -50,8 +49,7 @@ typedef struct I2CSlaveClass int (*event)(I2CSlave *s, enum i2c_event event); } I2CSlaveClass; -struct I2CSlave -{ +struct I2CSlave { DeviceState qdev; /* Remaining fields for internal use by the I2C code. */ From patchwork Tue Feb 27 10:49:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 129761 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp1243720lja; Tue, 27 Feb 2018 02:49:44 -0800 (PST) X-Google-Smtp-Source: AG47ELvjMQkwELy3sZJ6XOsVq08gNhGg4Nmos6EBdNgzpVvPVWMUJgiunvA3+9KlmgsnBO2Ziaz3 X-Received: by 10.129.71.9 with SMTP id u9mr4094968ywa.212.1519728584711; Tue, 27 Feb 2018 02:49:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519728584; cv=none; d=google.com; s=arc-20160816; b=BdceJO8/a5PHeCuONaostB04pxAH3X8MD/vJr9JxbCkgAI7ntkQhxXMxUApNNtgujy 4MzYNBP3UXd92cJEjNHh3DPIoHBOi0IJkRn+a3Ar1AlUxyLVLhnMqkCt2tU82+d+gKdo kII9/SyEZjZDsv9HyKPnfLi/WQG2o+47PFK7t7jPfS0DK2gCKMM/3lKwNPe530Ejc82y mQ/ASPaFasqG+IPoHdya77lVSBexVE9jrt68L0cHTjKwcVCYFt96YjDCnqb85R3XOZ45 L0D76ThOUm1IcZMOP/gKls6nfvbnLNhDOuWPwA4NnaQeMJ+GzsJztQ3WksgeYFN5xphh l5iA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=Twqxi8BDJv63Fx0OmA4mzSxVFDLjBcftrJ1XbHyLRmQ=; b=cVWhlBW6Y8c4rfJCvXsKFEYFZIzMdm2L7FNb1GPvapbmXsSlIhuUjd6LKmcv+lbflv /Op6LygFe5HuAs8IMDt2gmE0O/slAta8AskWFrnIVa2EYa4HEawxFayTOzJmejFscwL5 vmXgGOd4iMbnq1WwEUJhcRsPxI+cruOVx9x7KvYsVepRzARsy5dNSd1fvde3gl+4Zilo VOVENlm/aQQOduhpwW/qW4mbY46C+9FYh/C6HnkTdetu7qv5+mgwzxg5WkdzxsktXOcQ FhkMnjCc5S8twWgwL3mSryA6oj4ootgfGtrai4VrIbHBsA4KTJd5X0A0Nw1jfNuPx6i2 8QbQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=gsFOflii; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id r6-v6si1853452ybg.726.2018.02.27.02.49.44 for (version=TLS1 cipher=AES128-SHA bits=128/128); Tue, 27 Feb 2018 02:49:44 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=gsFOflii; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:36160 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eqcpM-0006Kj-2y for patch@linaro.org; Tue, 27 Feb 2018 05:49:44 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54711) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eqcos-0006Jh-Gr for qemu-devel@nongnu.org; Tue, 27 Feb 2018 05:49:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eqcor-0004BV-Gv for qemu-devel@nongnu.org; Tue, 27 Feb 2018 05:49:14 -0500 Received: from mail-lf0-x241.google.com ([2a00:1450:4010:c07::241]:40229) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eqcor-0004Ah-8D for qemu-devel@nongnu.org; Tue, 27 Feb 2018 05:49:13 -0500 Received: by mail-lf0-x241.google.com with SMTP id 37so26791850lfs.7 for ; Tue, 27 Feb 2018 02:49:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Twqxi8BDJv63Fx0OmA4mzSxVFDLjBcftrJ1XbHyLRmQ=; b=gsFOfliisx+w6qA4RO3mVDUwM5nSPZShAx3JM5hCUcVT9Pg9+HQLROmqmEGRsaxIuz K26oAFpzc29d/UgKbOn2AngiH5oRtGhWGDCE08T6w9dIlPQVfLLjkOZuBz+j9ByYKu2s GOLVy5iuIzcNTNcC638XvoQ8vKAq9pVmIUUG0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Twqxi8BDJv63Fx0OmA4mzSxVFDLjBcftrJ1XbHyLRmQ=; b=rqO2jGSkmYbYOrYzQjQZXT25D+qarCY7EDpuD3zyyf1mjDlHgz2vENV1EjViHrNNdt WL0M0Q3yoQXOMEv1xpO4thDvvyyQKtjv0F2E9fzB0jSxsmu7SjtC7KLylZf+124KQasj 0dlgMN/5j8IDzE/rT7XESw1/uLkEVG3FiehHOkGgQUI/lGpFQQ4DEE5k0WG/9yEp+G02 Qt9OB/TrjsnUX49NoEOiua6hL8eVwc4es3+VPaUI71oUfcRboZgEk44c8c0NJT6Eo2KC JVG9E53zCxDgaRMQz6mmi8+Osv3RKt18We74kuxKZK78luqBukPC1ZZDegHQ+MNiI5DF AmIQ== X-Gm-Message-State: APf1xPC185/zPvXQ7WkLRbsv3qAW7AArdtDnCiiGtK3nHqLEUSty6IKi wQu+DlmVHE9gLAcz1SeFlrtg/IfqjYw= X-Received: by 10.25.43.136 with SMTP id r130mr10141019lfr.48.1519728551677; Tue, 27 Feb 2018 02:49:11 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id 74sm2484148ljq.32.2018.02.27.02.49.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 27 Feb 2018 02:49:10 -0800 (PST) From: Linus Walleij To: qemu-devel@nongnu.org, Peter Maydell Date: Tue, 27 Feb 2018 11:49:00 +0100 Message-Id: <20180227104903.21353-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180227104903.21353-1-linus.walleij@linaro.org> References: <20180227104903.21353-1-linus.walleij@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4010:c07::241 Subject: [Qemu-devel] [PATCH 2/5] i2c: Move the bus class to i2c.h X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Corey Minyard , Linus Walleij , qemu-arm@nongnu.org, =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Corey Minyard Some devices need access to it. Signed-off-by: Corey Minyard Reviewed-by: Peter Maydell Signed-off-by: Linus Walleij --- hw/i2c/core.c | 17 ----------------- include/hw/i2c/i2c.h | 17 +++++++++++++++++ 2 files changed, 17 insertions(+), 17 deletions(-) -- 2.14.3 diff --git a/hw/i2c/core.c b/hw/i2c/core.c index 9a54b61c1dbd..cfccefca3d6c 100644 --- a/hw/i2c/core.c +++ b/hw/i2c/core.c @@ -10,30 +10,13 @@ #include "qemu/osdep.h" #include "hw/i2c/i2c.h" -typedef struct I2CNode I2CNode; - -struct I2CNode { - I2CSlave *elt; - QLIST_ENTRY(I2CNode) next; -}; - #define I2C_BROADCAST 0x00 -struct I2CBus { - BusState qbus; - QLIST_HEAD(, I2CNode) current_devs; - uint8_t saved_address; - bool broadcast; -}; - static Property i2c_props[] = { DEFINE_PROP_UINT8("address", struct I2CSlave, address, 0), DEFINE_PROP_END_OF_LIST(), }; -#define TYPE_I2C_BUS "i2c-bus" -#define I2C_BUS(obj) OBJECT_CHECK(I2CBus, (obj), TYPE_I2C_BUS) - static const TypeInfo i2c_bus_info = { .name = TYPE_I2C_BUS, .parent = TYPE_BUS, diff --git a/include/hw/i2c/i2c.h b/include/hw/i2c/i2c.h index 8fd449f645f0..d727379b487a 100644 --- a/include/hw/i2c/i2c.h +++ b/include/hw/i2c/i2c.h @@ -56,6 +56,23 @@ struct I2CSlave { uint8_t address; }; +#define TYPE_I2C_BUS "i2c-bus" +#define I2C_BUS(obj) OBJECT_CHECK(I2CBus, (obj), TYPE_I2C_BUS) + +typedef struct I2CNode I2CNode; + +struct I2CNode { + I2CSlave *elt; + QLIST_ENTRY(I2CNode) next; +}; + +struct I2CBus { + BusState qbus; + QLIST_HEAD(, I2CNode) current_devs; + uint8_t saved_address; + bool broadcast; +}; + I2CBus *i2c_init_bus(DeviceState *parent, const char *name); void i2c_set_slave_address(I2CSlave *dev, uint8_t address); int i2c_bus_busy(I2CBus *bus); From patchwork Tue Feb 27 10:49:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 129763 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp1245785lja; Tue, 27 Feb 2018 02:52:11 -0800 (PST) X-Google-Smtp-Source: AG47ELudoOummcsAzf2h10InTun3J35dAVS2BC5rymbVXitIvFHiXdTR9L6RR94yyE4FwynV+R7p X-Received: by 10.13.227.195 with SMTP id m186mr8668364ywe.64.1519728731130; Tue, 27 Feb 2018 02:52:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519728731; cv=none; d=google.com; s=arc-20160816; b=A70ObR64jSMYb7GiN7L35LULHqEKq3sF4r6eAklbZw0jSk/ZIyJAZH1HF+ec+WPGrd CwerRATbifh5pDcBSKtA1kyjkbJinXQ4TWssEBm47k2ZoAfoNfo4DSJVYxNVx8jmv5ik f8dPCfaoGS8ESAXxFZ89tKRBZgEXAC0IynX7pIgM/K82gLCWpBs0txU6AoXcRy40ZaDG f+VgLkVw4I42c0kLmKUKgEWd3XcO2h8W+a5/TpYA3zlR7kb9jbnuycO06R2O1jNh4w0D EWfK75OUI2Bt1Rx2r+CRn/+7a+x6yx6wPlzBz0hxOzSAbl24n+YlNOSu/i8/wYUHfJN/ ssBA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=bxR4RkALHrAoI9FSOR6VpD83INuPRfeIwUlXBxL+XuI=; b=U468hZEMzSFk3mIJJtttdKXHAKQQami9CgyQmE8nfeM9KTK6unGlYlIP8QcJjS2mzb z/wmSQ6swedOFLkzC7ZEcijlS+wQ7NjFf9sDINUTpnPmXWMVYLz7ZsvV2iKrus0Mg/C3 L2yUopmA1YawHUbhxG54wgxgUJMSvAYdoHwgZUXGUFnDY9kc2bIS31XXXpSZPojVvQk0 Au7Z6XlLv5En3qJHg9HuAmMs/OOp/pty3sGp5OUO7zQITijvs9elHYlyR/EXb0RtBwiQ Z0/olL1MpKPxWPelZ6tfR+LM14oQgBCoWwyPX2C73zG/O1VJD2/VPSXA0UgeUiS5g4sM vXEg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=X07j9Q7J; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2a00:1450:4010:c07::242 Subject: [Qemu-devel] [PATCH 3/5] hw/i2c-ddc: Do not fail writes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Corey Minyard , Linus Walleij , qemu-arm@nongnu.org, =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The tx function of the DDC I2C slave emulation was returning 1 on all writes resulting in NACK in the I2C bus. Changing it to 0 makes the DDC I2C work fine with bit-banged I2C such as the versatile I2C. I guess it was not affecting whatever I2C controller this was used with until now, but with the Versatile I2C it surely does not work. Reviewed-by: Peter Maydell Signed-off-by: Linus Walleij --- hw/i2c/i2c-ddc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.14.3 Reviewed-by: Philippe Mathieu-Daudé diff --git a/hw/i2c/i2c-ddc.c b/hw/i2c/i2c-ddc.c index 199dac9e41c1..bec0c91e2dd0 100644 --- a/hw/i2c/i2c-ddc.c +++ b/hw/i2c/i2c-ddc.c @@ -259,12 +259,12 @@ static int i2c_ddc_tx(I2CSlave *i2c, uint8_t data) s->reg = data; s->firstbyte = false; DPRINTF("[EDID] Written new pointer: %u\n", data); - return 1; + return 0; } /* Ignore all writes */ s->reg++; - return 1; + return 0; } static void i2c_ddc_init(Object *obj) From patchwork Tue Feb 27 10:49:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 129762 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp1245584lja; Tue, 27 Feb 2018 02:51:55 -0800 (PST) X-Google-Smtp-Source: AG47ELv/mlhJIKUc5OKb/EV7EP7QfHmma69l40bdjGjrIlMBAYljV2WVw7f3wtxAZpuVHz9ukNx9 X-Received: by 2002:a25:4986:: with SMTP id w128-v6mr8922696yba.131.1519728715238; Tue, 27 Feb 2018 02:51:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519728715; cv=none; d=google.com; s=arc-20160816; b=1Ij8+tBoIIcvVvouoVKnvYD8beC1RHHKAN4zapnLmVrUy40GPth93Ukj9TXKOX/1Ca iYfcOacQ5BRb9WV1GZns62//cLWI2MBo2/vLlFG8oeb67TgxIAQfgazI+B9yr8ix0Jmd Y9Di6rTRnnCWo5RVRb6dKoHyGDr7A5A9JOYz9OSjv1PRy1bm6fdpULF7phnexihGY1z9 gEp+TnE1WiMn46sINjaJDEjSuwpj5yMtEEec64OW2Jo2nDt0OVeBijJ2uHxuEBc61pml z+WJrUm4BlKWdDYRaj46tq6LC3avuwr82HlqCqETgRHR7OaKNXocvzBnWWLFsKrxskL+ JNJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=zj13AenJ6oUb9CSbGAylVOy8XTzH/fVL67zcJq0NUxg=; b=CAwHDFA+/92tfH/vf7IKhy5Q/1YvZa9KRQPELgIY85TrobkCBMdnkqWUAR8RGJS9/D b9ZibX361eebKfuuLWesNW1xv1bLgVg/HksbOa+PKVRrgqmcNjtjq+9780+YZO0+WWYq i93nNSiGTxxiPT6WeAWrnUpjK1KOalST129eYQYaPHijvoOx3JvMWiczqmSqun5h1dq8 yK6reIiB2+nNjl6ZAoMgzvXKcwQkICKBOKX9FlPjlalcUWyQuPx0l/t5+cLOFC6Bi5wJ DPxD8kT/fBVnRTMN9XUfmuSLeBkexlnHXo537uVGpWPQS/BMas4Nmte6P8XslUgf9GYS jMdQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Ql296rb+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2a00:1450:4010:c07::234 Subject: [Qemu-devel] [PATCH 4/5] hw/sii9022: Add support for Silicon Image SII9022 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Corey Minyard , Linus Walleij , qemu-arm@nongnu.org, =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This adds support for emulating the Silicon Image SII9022 DVI/HDMI bridge. It's not very clever right now, it just acknowledges the switch into DDC I2C mode and back. Combining this with the existing DDC I2C emulation gives the right behavior on the Versatile Express emulation passing through the QEMU EDID to the emulated platform. Cc: Peter Maydell Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Update license to GPLv2 or later + SPDX identifier - Instantiate the DDC I2C as part of the class realization so we do not need to add the DDC "on the side" in machines using SII9022. - Switch to using trace events instead of debug prints. --- hw/display/Makefile.objs | 1 + hw/display/sii9022.c | 188 +++++++++++++++++++++++++++++++++++++++++++++++ hw/display/trace-events | 5 ++ 3 files changed, 194 insertions(+) create mode 100644 hw/display/sii9022.c -- 2.14.3 diff --git a/hw/display/Makefile.objs b/hw/display/Makefile.objs index d3a4cb396eb9..3c7c75b94da5 100644 --- a/hw/display/Makefile.objs +++ b/hw/display/Makefile.objs @@ -3,6 +3,7 @@ common-obj-$(CONFIG_VGA_CIRRUS) += cirrus_vga.o common-obj-$(CONFIG_G364FB) += g364fb.o common-obj-$(CONFIG_JAZZ_LED) += jazz_led.o common-obj-$(CONFIG_PL110) += pl110.o +common-obj-$(CONFIG_SII9022) += sii9022.o common-obj-$(CONFIG_SSD0303) += ssd0303.o common-obj-$(CONFIG_SSD0323) += ssd0323.o common-obj-$(CONFIG_XEN) += xenfb.o diff --git a/hw/display/sii9022.c b/hw/display/sii9022.c new file mode 100644 index 000000000000..b019ac0ca880 --- /dev/null +++ b/hw/display/sii9022.c @@ -0,0 +1,188 @@ +/* + * Silicon Image SiI9022 + * + * This is a pretty hollow emulation: all we do is acknowledge that we + * exist (chip ID) and confirm that we get switched over into DDC mode + * so the emulated host can proceed to read out EDID data. All subsequent + * set-up of connectors etc will be acknowledged and ignored. + * + * Copyright (C) 2018 Linus Walleij + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "hw/i2c/i2c.h" +#include "hw/i2c/i2c-ddc.h" +#include "trace.h" + +#define SII9022_SYS_CTRL_DATA 0x1a +#define SII9022_SYS_CTRL_PWR_DWN 0x10 +#define SII9022_SYS_CTRL_AV_MUTE 0x08 +#define SII9022_SYS_CTRL_DDC_BUS_REQ 0x04 +#define SII9022_SYS_CTRL_DDC_BUS_GRTD 0x02 +#define SII9022_SYS_CTRL_OUTPUT_MODE 0x01 +#define SII9022_SYS_CTRL_OUTPUT_HDMI 1 +#define SII9022_SYS_CTRL_OUTPUT_DVI 0 +#define SII9022_REG_CHIPID 0x1b +#define SII9022_INT_ENABLE 0x3c +#define SII9022_INT_STATUS 0x3d +#define SII9022_INT_STATUS_HOTPLUG 0x01; +#define SII9022_INT_STATUS_PLUGGED 0x04; + +#define TYPE_SII9022 "sii9022" +#define SII9022(obj) OBJECT_CHECK(sii9022_state, (obj), TYPE_SII9022) + +typedef struct sii9022_state { + I2CSlave parent_obj; + uint8_t ptr; + bool addr_byte; + bool ddc_req; + bool ddc_skip_finish; + bool ddc; +} sii9022_state; + +static const VMStateDescription vmstate_sii9022 = { + .name = "sii9022", + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_I2C_SLAVE(parent_obj, sii9022_state), + VMSTATE_UINT8(ptr, sii9022_state), + VMSTATE_BOOL(addr_byte, sii9022_state), + VMSTATE_BOOL(ddc_req, sii9022_state), + VMSTATE_BOOL(ddc_skip_finish, sii9022_state), + VMSTATE_BOOL(ddc, sii9022_state), + VMSTATE_END_OF_LIST() + } +}; + +static int sii9022_event(I2CSlave *i2c, enum i2c_event event) +{ + sii9022_state *s = SII9022(i2c); + + switch (event) { + case I2C_START_SEND: + s->addr_byte = true; + break; + case I2C_START_RECV: + break; + case I2C_FINISH: + break; + case I2C_NACK: + break; + } + + return 0; +} + +static int sii9022_rx(I2CSlave *i2c) +{ + sii9022_state *s = SII9022(i2c); + uint8_t res = 0x00; + + switch (s->ptr) { + case SII9022_SYS_CTRL_DATA: + if (s->ddc_req) { + /* Acknowledge DDC bus request */ + res = SII9022_SYS_CTRL_DDC_BUS_GRTD | SII9022_SYS_CTRL_DDC_BUS_REQ; + } + break; + case SII9022_REG_CHIPID: + res = 0xb0; + break; + case SII9022_INT_STATUS: + /* Something is cold-plugged in, no interrupts */ + res = SII9022_INT_STATUS_PLUGGED; + break; + default: + break; + } + + trace_sii9022_read_reg(s->ptr, res); + s->ptr++; + + return res; +} + +static int sii9022_tx(I2CSlave *i2c, uint8_t data) +{ + sii9022_state *s = SII9022(i2c); + + if (s->addr_byte) { + s->ptr = data; + s->addr_byte = false; + return 0; + } + + switch (s->ptr) { + case SII9022_SYS_CTRL_DATA: + if (data & SII9022_SYS_CTRL_DDC_BUS_REQ) { + s->ddc_req = true; + if (data & SII9022_SYS_CTRL_DDC_BUS_GRTD) { + s->ddc = true; + /* Skip this finish since we just switched to DDC */ + s->ddc_skip_finish = true; + trace_sii9022_switch_mode("DDC"); + } + } else { + s->ddc_req = false; + s->ddc = false; + trace_sii9022_switch_mode("normal"); + } + break; + default: + break; + } + + trace_sii9022_write_reg(s->ptr, data); + s->ptr++; + + return 0; +} + +static void sii9022_reset(DeviceState *dev) +{ + sii9022_state *s = SII9022(dev); + + s->ptr = 0; + s->addr_byte = false; +} + +static void sii9022_realize(DeviceState *dev, Error **errp) +{ + I2CBus *bus; + + bus = I2C_BUS(qdev_get_parent_bus(dev)); + i2c_create_slave(bus, TYPE_I2CDDC, 0x50); +} + +static void sii9022_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + I2CSlaveClass *k = I2C_SLAVE_CLASS(klass); + + k->event = sii9022_event; + k->recv = sii9022_rx; + k->send = sii9022_tx; + dc->reset = sii9022_reset; + dc->realize = sii9022_realize; + dc->vmsd = &vmstate_sii9022; +} + +static const TypeInfo sii9022_info = { + .name = TYPE_SII9022, + .parent = TYPE_I2C_SLAVE, + .instance_size = sizeof(sii9022_state), + .class_init = sii9022_class_init, +}; + +static void sii9022_register_types(void) +{ + type_register_static(&sii9022_info); +} + +type_init(sii9022_register_types) diff --git a/hw/display/trace-events b/hw/display/trace-events index da498c1def45..5a48c6cb6a6d 100644 --- a/hw/display/trace-events +++ b/hw/display/trace-events @@ -132,3 +132,8 @@ vga_cirrus_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" vga_cirrus_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" vga_cirrus_read_blt(uint32_t offset, uint32_t val) "offset 0x%x, val 0x%x" vga_cirrus_write_blt(uint32_t offset, uint32_t val) "offset 0x%x, val 0x%x" + +# hw/display/sii9022.c +sii9022_read_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x" +sii9022_write_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x" +sii9022_switch_mode(const char *mode) "mode: %s" From patchwork Tue Feb 27 10:49:03 2018 Content-Type: text/plain; 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X-Received-From: 2a00:1450:4010:c07::243 Subject: [Qemu-devel] [PATCH 5/5] arm/vexpress: Add proper display connector emulation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Corey Minyard , Linus Walleij , qemu-arm@nongnu.org, =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This adds the SiI9022 and EDID I2C devices to the ARM Versatile Express machine, and selects the two I2C devices necessary in the arm-softmmy.mak configuration so everything will build smoothly. I am implementing proper handling of the graphics in the Linux kernel and adding proper emulation of SiI9022 and EDID makes the driver probe as nicely as before, retrieveing the resolutions supported by the "QEMU monitor" and overall just working nice. The assignment of the SiI9022 at address 0x39 and the EDID DDC I2C at address 0x50 is not strictly correct: the DDC I2C is there all the time but in the actual component it only appears once activated inside the SiI9022, so ideally it should be added and removed to the bus by the SiI9022. However for this purpose it works fine to just have it around. Cc: Peter Maydell Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Only add the SII9022 now that it will by itself realize the DDCI2C as part of the bridge. --- default-configs/arm-softmmu.mak | 2 ++ hw/arm/vexpress.c | 6 +++++- 2 files changed, 7 insertions(+), 1 deletion(-) -- 2.14.3 Reviewed-by: Philippe Mathieu-Daudé diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak index ca34cf446242..54f855d07206 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -21,6 +21,8 @@ CONFIG_STELLARIS_INPUT=y CONFIG_STELLARIS_ENET=y CONFIG_SSD0303=y CONFIG_SSD0323=y +CONFIG_DDC=y +CONFIG_SII9022=y CONFIG_ADS7846=y CONFIG_MAX111X=y CONFIG_SSI=y diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index dc5928ae1ab5..9fad79177a19 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -29,6 +29,7 @@ #include "hw/arm/arm.h" #include "hw/arm/primecell.h" #include "hw/devices.h" +#include "hw/i2c/i2c.h" #include "net/net.h" #include "sysemu/sysemu.h" #include "hw/boards.h" @@ -537,6 +538,7 @@ static void vexpress_common_init(MachineState *machine) uint32_t sys_id; DriveInfo *dinfo; pflash_t *pflash0; + I2CBus *i2c; ram_addr_t vram_size, sram_size; MemoryRegion *sysmem = get_system_memory(); MemoryRegion *vram = g_new(MemoryRegion, 1); @@ -628,7 +630,9 @@ static void vexpress_common_init(MachineState *machine) sysbus_create_simple("sp804", map[VE_TIMER01], pic[2]); sysbus_create_simple("sp804", map[VE_TIMER23], pic[3]); - /* VE_SERIALDVI: not modelled */ + dev = sysbus_create_simple("versatile_i2c", map[VE_SERIALDVI], NULL); + i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c"); + i2c_create_slave(i2c, "sii9022", 0x39); sysbus_create_simple("pl031", map[VE_RTC], pic[4]); /* RTC */