From patchwork Thu Mar 30 21:01:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 96326 Delivered-To: patches@linaro.org Received: by 10.140.89.233 with SMTP id v96csp425772qgd; Thu, 30 Mar 2017 14:01:34 -0700 (PDT) X-Received: by 10.99.114.25 with SMTP id n25mr1094518pgc.206.1490907694618; Thu, 30 Mar 2017 14:01:34 -0700 (PDT) Return-Path: Received: from mail-pg0-x234.google.com (mail-pg0-x234.google.com. [2607:f8b0:400e:c05::234]) by mx.google.com with ESMTPS id l64si2949238pgd.72.2017.03.30.14.01.34 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Mar 2017 14:01:34 -0700 (PDT) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::234 as permitted sender) client-ip=2607:f8b0:400e:c05::234; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::234 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by mail-pg0-x234.google.com with SMTP id x125so50222222pgb.0 for ; Thu, 30 Mar 2017 14:01:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=a/t0HmOQ+115oBAkxhmrKlxNEyvHTzmavdsO69kj1y8=; b=i96FMviOx7NMb3YPJAx/bZVgbhLIxKvyL+IKtfksw+T8WbmJx/bI9gP3HtNYxYZKOj hlTB73FGI3ihY9yjNDDn+weGLv3w9l3uZ2KqopJLlfEdDy+SYvzVHMaldBVkoq0t+j7o 0sQ6doVhYQANruJ7kkOMCfgzOomSgoiLnLmdk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=a/t0HmOQ+115oBAkxhmrKlxNEyvHTzmavdsO69kj1y8=; b=ZWP0cv/Ssy+PeszcHaF1mW3MWPHMct0xGccklHaiyniPUubJXbUH3wveFfqk9gffuL U307aiF3Fw+tF93w5uGC0xU1bwjTbXNABqgnBqUePOswWRIdSPKOk/nPEHDRasgPED4a uyjTeYJy/Yv5ROZ6NJIutZ4EZox0N88MLgJppVnwShAfPOAdaB6NTcZ0+TAuwoobENlo yvJNgHshs4cSkM6SyuknninC9v1x4BXd+2zjns5WNwchUqo5eL/QkixZgYUQAIYx4NJs lTruk1u126QkB0al+J4lFDv281R/QOq69FDihJ+Lur9Y00H03wOx3MMyGPwIl7XdTD0E Wkyg== X-Gm-Message-State: AFeK/H113TucBsEg76I4EHjbm5wvBIB7Gcpj0yElYgjWLD5yBy69TMFsEfW0uWyPvDpjfDHYPg4= X-Received: by 10.99.51.200 with SMTP id z191mr1087198pgz.137.1490907694271; Thu, 30 Mar 2017 14:01:34 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([2601:1c2:1002:83f0:4e72:b9ff:fe99:466a]) by smtp.gmail.com with ESMTPSA id y7sm6162626pfk.93.2017.03.30.14.01.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Mar 2017 14:01:33 -0700 (PDT) From: John Stultz To: lkml Cc: Nicolai Stange , Ingo Molnar , Thomas Gleixner , Daniel Lezcano , Richard Cochran , Prarit Bhargava , Stephen Boyd , John Stultz Subject: [PATCH 1/9] clocksource: sh_cmt: Compute rate before registration again Date: Thu, 30 Mar 2017 14:01:16 -0700 Message-Id: <1490907684-11186-2-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> References: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> From: Nicolai Stange With the upcoming NTP correction related rate adjustments to be implemented in the clockevents core, the latter needs to get informed about every rate change of a clockevent device made after its registration. Currently, sh_cmt violates this requirement in that it registers its clockevent device with a dummy rate and sets its final ->mult and ->shift values from its ->set_state_oneshot() and ->set_state_periodic() functions respectively. This patch moves the setting of the clockevent device's ->mult and ->shift values to before its registration. Note that there has been some back and forth regarding this question with respect to the clocksource also provided by this driver: commit f4d7c3565c16 ("clocksource: sh_cmt: compute mult and shift before registration") moves the rate determination from the clocksource's ->enable() function to before its registration. OTOH, the later commit 3593f5fe40a1 ("clocksource: sh_cmt: __clocksource_updatefreq_hz() update") basically reverts this, saying "Without this patch the old code uses clocksource_register() together with a hack that assumes a never changing clock rate." However, I checked all current sh_cmt users in arch/sh as well as in arch/arm/mach-shmobile carefully and right now, none of them changes any rate in any clock tree relevant to sh_cmt after their respective time_init(). Since all sh_cmt instances are created after time_init(), none of them should ever observe any clock rate changes. What's more, both, a clocksource as well as a clockevent device, can immediately get selected for use at their registration and thus, enabled at this point already. So it's probably safer to assume a "never changing clock rate" here. - Move the struct sh_cmt_channel's ->rate member to struct sh_cmt_device: it's a property of the underlying clock which is in turn specific to the sh_cmt_device. - Determine the ->rate value in sh_cmt_setup() at device probing rather than at first usage. - Set the clockevent device's ->mult and ->shift values right before its registration. - Although not strictly necessary for the upcoming clockevent core changes, set the clocksource's rate at its registration for consistency. Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Daniel Lezcano Cc: Richard Cochran Cc: Prarit Bhargava Cc: Stephen Boyd Signed-off-by: Nicolai Stange Signed-off-by: John Stultz --- drivers/clocksource/sh_cmt.c | 45 ++++++++++++++++++++++++-------------------- 1 file changed, 25 insertions(+), 20 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index 28757ed..e3bf3ba 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -103,7 +103,6 @@ struct sh_cmt_channel { unsigned long match_value; unsigned long next_match_value; unsigned long max_match_value; - unsigned long rate; raw_spinlock_t lock; struct clock_event_device ced; struct clocksource cs; @@ -118,6 +117,7 @@ struct sh_cmt_device { void __iomem *mapbase; struct clk *clk; + unsigned long rate; raw_spinlock_t lock; /* Protect the shared start/stop register */ @@ -320,7 +320,7 @@ static void sh_cmt_start_stop_ch(struct sh_cmt_channel *ch, int start) raw_spin_unlock_irqrestore(&ch->cmt->lock, flags); } -static int sh_cmt_enable(struct sh_cmt_channel *ch, unsigned long *rate) +static int sh_cmt_enable(struct sh_cmt_channel *ch) { int k, ret; @@ -340,11 +340,9 @@ static int sh_cmt_enable(struct sh_cmt_channel *ch, unsigned long *rate) /* configure channel, periodic mode and maximum timeout */ if (ch->cmt->info->width == 16) { - *rate = clk_get_rate(ch->cmt->clk) / 512; sh_cmt_write_cmcsr(ch, SH_CMT16_CMCSR_CMIE | SH_CMT16_CMCSR_CKS512); } else { - *rate = clk_get_rate(ch->cmt->clk) / 8; sh_cmt_write_cmcsr(ch, SH_CMT32_CMCSR_CMM | SH_CMT32_CMCSR_CMTOUT_IE | SH_CMT32_CMCSR_CMR_IRQ | @@ -572,7 +570,7 @@ static int sh_cmt_start(struct sh_cmt_channel *ch, unsigned long flag) raw_spin_lock_irqsave(&ch->lock, flags); if (!(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE))) - ret = sh_cmt_enable(ch, &ch->rate); + ret = sh_cmt_enable(ch); if (ret) goto out; @@ -640,10 +638,9 @@ static int sh_cmt_clocksource_enable(struct clocksource *cs) ch->total_cycles = 0; ret = sh_cmt_start(ch, FLAG_CLOCKSOURCE); - if (!ret) { - __clocksource_update_freq_hz(cs, ch->rate); + if (!ret) ch->cs_enabled = true; - } + return ret; } @@ -697,8 +694,7 @@ static int sh_cmt_register_clocksource(struct sh_cmt_channel *ch, dev_info(&ch->cmt->pdev->dev, "ch%u: used as clock source\n", ch->index); - /* Register with dummy 1 Hz value, gets updated in ->enable() */ - clocksource_register_hz(cs, 1); + clocksource_register_hz(cs, ch->cmt->rate); return 0; } @@ -709,19 +705,10 @@ static struct sh_cmt_channel *ced_to_sh_cmt(struct clock_event_device *ced) static void sh_cmt_clock_event_start(struct sh_cmt_channel *ch, int periodic) { - struct clock_event_device *ced = &ch->ced; - sh_cmt_start(ch, FLAG_CLOCKEVENT); - /* TODO: calculate good shift from rate and counter bit width */ - - ced->shift = 32; - ced->mult = div_sc(ch->rate, NSEC_PER_SEC, ced->shift); - ced->max_delta_ns = clockevent_delta2ns(ch->max_match_value, ced); - ced->min_delta_ns = clockevent_delta2ns(0x1f, ced); - if (periodic) - sh_cmt_set_next(ch, ((ch->rate + HZ/2) / HZ) - 1); + sh_cmt_set_next(ch, ((ch->cmt->rate + HZ/2) / HZ) - 1); else sh_cmt_set_next(ch, ch->max_match_value); } @@ -824,6 +811,12 @@ static int sh_cmt_register_clockevent(struct sh_cmt_channel *ch, ced->suspend = sh_cmt_clock_event_suspend; ced->resume = sh_cmt_clock_event_resume; + /* TODO: calculate good shift from rate and counter bit width */ + ced->shift = 32; + ced->mult = div_sc(ch->cmt->rate, NSEC_PER_SEC, ced->shift); + ced->max_delta_ns = clockevent_delta2ns(ch->max_match_value, ced); + ced->min_delta_ns = clockevent_delta2ns(0x1f, ced); + dev_info(&ch->cmt->pdev->dev, "ch%u: used for clock events\n", ch->index); clockevents_register_device(ced); @@ -996,6 +989,18 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev) if (ret < 0) goto err_clk_put; + /* Determine clock rate. */ + ret = clk_enable(cmt->clk); + if (ret < 0) + goto err_clk_unprepare; + + if (cmt->info->width == 16) + cmt->rate = clk_get_rate(cmt->clk) / 512; + else + cmt->rate = clk_get_rate(cmt->clk) / 8; + + clk_disable(cmt->clk); + /* Map the memory resource(s). */ ret = sh_cmt_map_memory(cmt); if (ret < 0) From patchwork Thu Mar 30 21:01:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 96327 Delivered-To: patches@linaro.org Received: by 10.140.89.233 with SMTP id v96csp425787qgd; Thu, 30 Mar 2017 14:01:36 -0700 (PDT) X-Received: by 10.99.157.6 with SMTP id i6mr1131330pgd.87.1490907696276; Thu, 30 Mar 2017 14:01:36 -0700 (PDT) Return-Path: Received: from mail-pg0-x229.google.com (mail-pg0-x229.google.com. [2607:f8b0:400e:c05::229]) by mx.google.com with ESMTPS id 1si2928413plx.288.2017.03.30.14.01.36 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Mar 2017 14:01:36 -0700 (PDT) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::229 as permitted sender) client-ip=2607:f8b0:400e:c05::229; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::229 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by mail-pg0-x229.google.com with SMTP id g2so49611644pge.3 for ; Thu, 30 Mar 2017 14:01:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=dr/y98dcp7LbgH0VUueHyMNWnClNghiXn+8YNCCTSNA=; b=jvNmtSH/qRE5+TlPMFK3QnVgMbaEmFvI1HMOpuBMr2Ja8dO9anjMcell6HXA4eXSpu 73Hs2+4EcOnNgsOVE0fStEnG5TcRvgmiuzXrUglRver3Wi3H2nI/t6d+OUrLXcc3E6Bz GgIOeZ5r+ozx6VX/V3qMcdnMhJC/iiFuEbVq4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=dr/y98dcp7LbgH0VUueHyMNWnClNghiXn+8YNCCTSNA=; b=OpkJGEm9kZoI7w8kJueHyYTfIbFQPGkXkk1jU4Os9ed+Z3DR2WnX9GhiaT3UnnnabJ 1/lGQmyeBAEVV9GYc+kGsO9Rjsjwu4eBdCpU4+mrE0hj9OwHYOvViRN3frFEXLiLoHwg lfdHIcEyrm4deD0IshcBBxFe4VjLcnLLlKyb2cyLnagdlxkeik0/rok72YH2qG5SPoBp fcqyZLyCJti6cDpWXpTzb8j3NA+m2OvsrlM44sjQH+vaNZJ7+tAOJwo/Y1liC25k+OVK DaFbYEIph3AF9UPWJztFMfgMVZh14akNPM/lwBrRrNgrTp4jYC6rX1817u9Fijo8rYvs Xq3A== X-Gm-Message-State: AFeK/H3SPdAb/5ITZjR7PPmijHXuvlkAW0F984Djk5mmcgxjO3yfVEZpM95Zc5qD/Yt4ydNt0LE= X-Received: by 10.99.109.12 with SMTP id i12mr1082634pgc.91.1490907695908; Thu, 30 Mar 2017 14:01:35 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([2601:1c2:1002:83f0:4e72:b9ff:fe99:466a]) by smtp.gmail.com with ESMTPSA id y7sm6162626pfk.93.2017.03.30.14.01.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Mar 2017 14:01:34 -0700 (PDT) From: John Stultz To: lkml Cc: Nicolai Stange , Ingo Molnar , Thomas Gleixner , Daniel Lezcano , Richard Cochran , Prarit Bhargava , Stephen Boyd , John Stultz Subject: [PATCH 2/9] clocksource: sh_tmu: Compute rate before registration again Date: Thu, 30 Mar 2017 14:01:17 -0700 Message-Id: <1490907684-11186-3-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> References: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> From: Nicolai Stange With the upcoming NTP correction related rate adjustments to be implemented in the clockevents core, the latter needs to get informed about every rate change of a clockevent device made after its registration. Currently, sh_tmu violates this requirement in that it registers its clockevent device with a dummy rate and sets its final rate through clockevents_config() called from its ->set_state_oneshot() and ->set_state_periodic() functions respectively. This patch moves the setting of the clockevent device's rate to its registration. Note that there has been some back and forth regarding this question with respect to the clocksource also provided by this driver: commit 66f49121ffa4 ("clocksource: sh_tmu: compute mult and shift before registration") moves the rate determination from the clocksource's ->enable() function to before its registration. OTOH, the later commit 0aeac458d9eb ("clocksource: sh_tmu: __clocksource_updatefreq_hz() update") basically reverts this, saying "Without this patch the old code uses clocksource_register() together with a hack that assumes a never changing clock rate." However, I checked all current sh_tmu users in arch/sh as well as in arch/arm/mach-shmobile carefully and right now, none of them changes any rate in any clock tree relevant to sh_tmu after their respective time_init(). Since all sh_tmu instances are created after time_init(), none of them should ever observe any clock rate changes. What's more, both, a clocksource as well as a clockevent device, can immediately get selected for use at their registration and thus, enabled at this point already. So it's probably safer to assume a "never changing clock rate" here. - Move the struct sh_tmu_channel's ->rate member to struct sh_tmu_device: it's a property of the underlying clock which is in turn specific to the sh_tmu_device. - Determine the ->rate value in sh_tmu_setup() at device probing rather than at first usage. - Set the clockevent device's rate at its registration. - Although not strictly necessary for the upcoming clockevent core changes, set the clocksource's rate at its registration for consistency. Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Daniel Lezcano Cc: Richard Cochran Cc: Prarit Bhargava Cc: Stephen Boyd Signed-off-by: Nicolai Stange Signed-off-by: John Stultz --- drivers/clocksource/sh_tmu.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c index 1fbf2aa..31d8816 100644 --- a/drivers/clocksource/sh_tmu.c +++ b/drivers/clocksource/sh_tmu.c @@ -46,7 +46,6 @@ struct sh_tmu_channel { void __iomem *base; int irq; - unsigned long rate; unsigned long periodic; struct clock_event_device ced; struct clocksource cs; @@ -59,6 +58,7 @@ struct sh_tmu_device { void __iomem *mapbase; struct clk *clk; + unsigned long rate; enum sh_tmu_model model; @@ -165,7 +165,6 @@ static int __sh_tmu_enable(struct sh_tmu_channel *ch) sh_tmu_write(ch, TCNT, 0xffffffff); /* configure channel to parent clock / 4, irq off */ - ch->rate = clk_get_rate(ch->tmu->clk) / 4; sh_tmu_write(ch, TCR, TCR_TPSC_CLK4); /* enable channel */ @@ -271,10 +270,8 @@ static int sh_tmu_clocksource_enable(struct clocksource *cs) return 0; ret = sh_tmu_enable(ch); - if (!ret) { - __clocksource_update_freq_hz(cs, ch->rate); + if (!ret) ch->cs_enabled = true; - } return ret; } @@ -334,8 +331,7 @@ static int sh_tmu_register_clocksource(struct sh_tmu_channel *ch, dev_info(&ch->tmu->pdev->dev, "ch%u: used as clock source\n", ch->index); - /* Register with dummy 1 Hz value, gets updated in ->enable() */ - clocksource_register_hz(cs, 1); + clocksource_register_hz(cs, ch->tmu->rate); return 0; } @@ -346,14 +342,10 @@ static struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced) static void sh_tmu_clock_event_start(struct sh_tmu_channel *ch, int periodic) { - struct clock_event_device *ced = &ch->ced; - sh_tmu_enable(ch); - clockevents_config(ced, ch->rate); - if (periodic) { - ch->periodic = (ch->rate + HZ/2) / HZ; + ch->periodic = (ch->tmu->rate + HZ/2) / HZ; sh_tmu_set_next(ch, ch->periodic, 1); } } @@ -435,7 +427,7 @@ static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch, dev_info(&ch->tmu->pdev->dev, "ch%u: used for clock events\n", ch->index); - clockevents_config_and_register(ced, 1, 0x300, 0xffffffff); + clockevents_config_and_register(ced, ch->tmu->rate, 0x300, 0xffffffff); ret = request_irq(ch->irq, sh_tmu_interrupt, IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING, @@ -561,6 +553,14 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev) if (ret < 0) goto err_clk_put; + /* Determine clock rate. */ + ret = clk_enable(tmu->clk); + if (ret < 0) + goto err_clk_unprepare; + + tmu->rate = clk_get_rate(tmu->clk) / 4; + clk_disable(tmu->clk); + /* Map the memory resource. */ ret = sh_tmu_map_memory(tmu); if (ret < 0) { From patchwork Thu Mar 30 21:01:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 96328 Delivered-To: patches@linaro.org Received: by 10.140.89.233 with SMTP id v96csp425806qgd; Thu, 30 Mar 2017 14:01:37 -0700 (PDT) X-Received: by 10.99.112.87 with SMTP id a23mr1113437pgn.7.1490907697785; Thu, 30 Mar 2017 14:01:37 -0700 (PDT) Return-Path: Received: from mail-pg0-x236.google.com (mail-pg0-x236.google.com. [2607:f8b0:400e:c05::236]) by mx.google.com with ESMTPS id u123si2930838pgc.280.2017.03.30.14.01.37 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Mar 2017 14:01:37 -0700 (PDT) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::236 as permitted sender) client-ip=2607:f8b0:400e:c05::236; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::236 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by mail-pg0-x236.google.com with SMTP id x125so50223455pgb.0 for ; Thu, 30 Mar 2017 14:01:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NaEMBw5an7fELpQZPIdsqKOS9fnLVthCAGi34evtNg4=; b=XzvVBg6pqZPxtTOvIqE5AuigO970Tivahl6YbE2KxEVo0q3YSryts3JQqiEfzNkKbE /Et8BBfoWhzXhxdPwPJxHmz/Q3DGFT+Emx6tTVLSsKegO/i8A0gCK9Ab0sg6AjWImGIM D9KagDceIWtW+6WXccpuNx32W+nwS0g9ddNPk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=NaEMBw5an7fELpQZPIdsqKOS9fnLVthCAGi34evtNg4=; b=LFdNUmHHyYgwq7k/XwhK/9IkchhwnOTVkt9BRftsfJfE2lZgz8w1lw6h+aILGWWxnu dF2HssQMwJ+uVg5JWgvfGwRkPicAD7xHUtCb3VKdqAJJG/zAX4B91FZsVcmk4uIFe4di yKDRyyUPYlPomBJd+q4H7ChqqOGWZcW/pzSoTIZgX+LC+uxeD9PsxYaQRR5ejzshSCwH iQellb41rQj/YY86oTzZMX2dHIbl0Cnf0xCtmXXq9a5cbgIM9coz+L9ALXhiFezLuIpj pQfuHWswmV+4zIo7ZzCgRuwp9DlUuXGueANL1uw0IsbCwTSsV594yY/q899IwP6HcN32 yaGw== X-Gm-Message-State: AFeK/H12HY6kIQhUwgdw5cJGVaro3amABtpoSDUCuBhQc7b73iRXDKf/FLYNk8cn/vgszDf82NY= X-Received: by 10.98.86.152 with SMTP id h24mr1180854pfj.184.1490907697461; Thu, 30 Mar 2017 14:01:37 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([2601:1c2:1002:83f0:4e72:b9ff:fe99:466a]) by smtp.gmail.com with ESMTPSA id y7sm6162626pfk.93.2017.03.30.14.01.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Mar 2017 14:01:36 -0700 (PDT) From: John Stultz To: lkml Cc: Nicolai Stange , Ingo Molnar , Thomas Gleixner , Daniel Lezcano , Richard Cochran , Prarit Bhargava , Stephen Boyd , John Stultz Subject: [PATCH 3/9] clocksource: em_sti: Split clock prepare and enable steps Date: Thu, 30 Mar 2017 14:01:18 -0700 Message-Id: <1490907684-11186-4-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> References: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> From: Nicolai Stange Currently, the em_sti driver prepares and enables the needed clock in em_sti_enable(), potentially called through its clockevent device's ->set_state_oneshot(). However, the clk_prepare() step may sleep whereas tick_program_event() and thus, ->set_state_oneshot(), can be called in atomic context. Split the clk_prepare_enable() in em_sti_enable() into two steps: - prepare the clock at device probing via clk_prepare() - and enable it in em_sti_enable() via clk_enable(). Slightly reorder resource initialization in em_sti_probe() in order to facilitate error handling in later patches. Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Daniel Lezcano Cc: Richard Cochran Cc: Prarit Bhargava Cc: Stephen Boyd Signed-off-by: Nicolai Stange Signed-off-by: John Stultz --- drivers/clocksource/em_sti.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/em_sti.c b/drivers/clocksource/em_sti.c index aff87df..6c0955a 100644 --- a/drivers/clocksource/em_sti.c +++ b/drivers/clocksource/em_sti.c @@ -78,7 +78,7 @@ static int em_sti_enable(struct em_sti_priv *p) int ret; /* enable clock */ - ret = clk_prepare_enable(p->clk); + ret = clk_enable(p->clk); if (ret) { dev_err(&p->pdev->dev, "cannot enable clock\n"); return ret; @@ -107,7 +107,7 @@ static void em_sti_disable(struct em_sti_priv *p) em_sti_write(p, STI_INTENCLR, 3); /* stop clock */ - clk_disable_unprepare(p->clk); + clk_disable(p->clk); } static u64 em_sti_count(struct em_sti_priv *p) @@ -303,6 +303,7 @@ static int em_sti_probe(struct platform_device *pdev) struct em_sti_priv *p; struct resource *res; int irq; + int ret; p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL); if (p == NULL) @@ -323,6 +324,13 @@ static int em_sti_probe(struct platform_device *pdev) if (IS_ERR(p->base)) return PTR_ERR(p->base); + if (devm_request_irq(&pdev->dev, irq, em_sti_interrupt, + IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING, + dev_name(&pdev->dev), p)) { + dev_err(&pdev->dev, "failed to request low IRQ\n"); + return -ENOENT; + } + /* get hold of clock */ p->clk = devm_clk_get(&pdev->dev, "sclk"); if (IS_ERR(p->clk)) { @@ -330,11 +338,10 @@ static int em_sti_probe(struct platform_device *pdev) return PTR_ERR(p->clk); } - if (devm_request_irq(&pdev->dev, irq, em_sti_interrupt, - IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING, - dev_name(&pdev->dev), p)) { - dev_err(&pdev->dev, "failed to request low IRQ\n"); - return -ENOENT; + ret = clk_prepare(p->clk); + if (ret < 0) { + dev_err(&pdev->dev, "cannot prepare clock\n"); + return ret; } raw_spin_lock_init(&p->lock); From patchwork Thu Mar 30 21:01:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 96329 Delivered-To: patches@linaro.org Received: by 10.140.89.233 with SMTP id v96csp425822qgd; Thu, 30 Mar 2017 14:01:39 -0700 (PDT) X-Received: by 10.84.139.195 with SMTP id 61mr1289304plr.109.1490907699370; Thu, 30 Mar 2017 14:01:39 -0700 (PDT) Return-Path: Received: from mail-pg0-x231.google.com (mail-pg0-x231.google.com. [2607:f8b0:400e:c05::231]) by mx.google.com with ESMTPS id f25si2933891pga.275.2017.03.30.14.01.39 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Mar 2017 14:01:39 -0700 (PDT) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::231 as permitted sender) client-ip=2607:f8b0:400e:c05::231; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::231 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by mail-pg0-x231.google.com with SMTP id x125so50224034pgb.0 for ; Thu, 30 Mar 2017 14:01:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Sks8Sagi24pL/smluG770Iu4P0/TW2iAOHsWFzinTPk=; b=LDRPZHylcdglvTj0YDNS9an9n30hDL+xIXSxQo90oKvgr21vHfAIeVAUvFeKDmZisw c3kz1kLEr+PIHo1g8ZYB/laE3sriqBvvPAdK8/BksYriw5stVAKxtc3k5StdJPqO+3lY 43VbN9R5St2G2xyq/AdeQrc5ULX0j0TAlQ29o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Sks8Sagi24pL/smluG770Iu4P0/TW2iAOHsWFzinTPk=; b=QjiS92q/WmYpQhYyyfz3VcIMyT/FZbDIPTrUiNyL+Kj8C2vpBRVbld9XlepoELatWn X9MPWbu81Z/cdEzCxgoDGJGOjf30GYwmCay1p2y2QCJY+7l9KU/a/oFlBrtWzZNBs8g1 ThbS+LxpDJD8cDgHaxAc/7b8r2hZs3H7fhhtEcq7VCo4RJg5tJck8+1TZwH5FEnJY5VC xnWWdcyG1thB0JZCYY/VdCQ03hcQgJ/pZ8AJrYa2U0JXFzKWVBIuI3c+iE0T8nFNY2rM Rsg48IGLF4tbpR/16YkU2iAIZbLo4GUlTTsArxXoaZd72aKMZ5R+TfwH+pjHRgI2okY8 keWA== X-Gm-Message-State: AFeK/H3mKF29v2UwApWi3h4AzUtU5M0VVnQWzTbtX6Jgbn4XGzet9S0/DBjvE2Ozq/JIDGT+Ys8= X-Received: by 10.98.214.4 with SMTP id r4mr1111231pfg.185.1490907699058; Thu, 30 Mar 2017 14:01:39 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([2601:1c2:1002:83f0:4e72:b9ff:fe99:466a]) by smtp.gmail.com with ESMTPSA id y7sm6162626pfk.93.2017.03.30.14.01.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Mar 2017 14:01:37 -0700 (PDT) From: John Stultz To: lkml Cc: Nicolai Stange , Ingo Molnar , Thomas Gleixner , Daniel Lezcano , Richard Cochran , Prarit Bhargava , Stephen Boyd , John Stultz Subject: [PATCH 4/9] clocksource: em_sti: Compute rate before registration Date: Thu, 30 Mar 2017 14:01:19 -0700 Message-Id: <1490907684-11186-5-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> References: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> From: Nicolai Stange With the upcoming NTP correction related rate adjustments to be implemented in the clockevents core, the latter needs to get informed about every rate change of a clockevent device made after its registration. Currently, em_sti violates this requirement in that it registers its clockevent device with a dummy rate and sets its final rate through clockevents_config() called from its ->set_state_oneshot(). This patch moves the setting of the clockevent device's rate to its registration. I checked all current em_sti users in arch/arm/mach-shmobile and right now, none of them changes any rate in any clock tree relevant to em_sti after their respective time_init(). Since all em_sti instances are created after time_init(), none of them should ever observe any clock rate changes. - Determine the ->rate value in em_sti_probe() at device probing rather than at first usage. - Set the clockevent device's rate at its registration. - Although not strictly necessary for the upcoming clockevent core changes, set the clocksource's rate at its registration for consistency. Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Daniel Lezcano Cc: Richard Cochran Cc: Prarit Bhargava Cc: Stephen Boyd Signed-off-by: Nicolai Stange Signed-off-by: John Stultz --- drivers/clocksource/em_sti.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/em_sti.c b/drivers/clocksource/em_sti.c index 6c0955a..bc48cbf 100644 --- a/drivers/clocksource/em_sti.c +++ b/drivers/clocksource/em_sti.c @@ -84,9 +84,6 @@ static int em_sti_enable(struct em_sti_priv *p) return ret; } - /* configure channel, periodic mode and maximum timeout */ - p->rate = clk_get_rate(p->clk); - /* reset the counter */ em_sti_write(p, STI_SET_H, 0x40000000); em_sti_write(p, STI_SET_L, 0x00000000); @@ -205,13 +202,9 @@ static u64 em_sti_clocksource_read(struct clocksource *cs) static int em_sti_clocksource_enable(struct clocksource *cs) { - int ret; struct em_sti_priv *p = cs_to_em_sti(cs); - ret = em_sti_start(p, USER_CLOCKSOURCE); - if (!ret) - __clocksource_update_freq_hz(cs, p->rate); - return ret; + return em_sti_start(p, USER_CLOCKSOURCE); } static void em_sti_clocksource_disable(struct clocksource *cs) @@ -240,8 +233,7 @@ static int em_sti_register_clocksource(struct em_sti_priv *p) dev_info(&p->pdev->dev, "used as clock source\n"); - /* Register with dummy 1 Hz value, gets updated in ->enable() */ - clocksource_register_hz(cs, 1); + clocksource_register_hz(cs, p->rate); return 0; } @@ -263,7 +255,6 @@ static int em_sti_clock_event_set_oneshot(struct clock_event_device *ced) dev_info(&p->pdev->dev, "used for oneshot clock events\n"); em_sti_start(p, USER_CLOCKEVENT); - clockevents_config(&p->ced, p->rate); return 0; } @@ -294,8 +285,7 @@ static void em_sti_register_clockevent(struct em_sti_priv *p) dev_info(&p->pdev->dev, "used for clock events\n"); - /* Register with dummy 1 Hz value, gets updated in ->set_state_oneshot() */ - clockevents_config_and_register(ced, 1, 2, 0xffffffff); + clockevents_config_and_register(ced, p->rate, 2, 0xffffffff); } static int em_sti_probe(struct platform_device *pdev) @@ -344,6 +334,15 @@ static int em_sti_probe(struct platform_device *pdev) return ret; } + ret = clk_enable(p->clk); + if (ret < 0) { + dev_err(&p->pdev->dev, "cannot enable clock\n"); + clk_unprepare(p->clk); + return ret; + } + p->rate = clk_get_rate(p->clk); + clk_disable(p->clk); + raw_spin_lock_init(&p->lock); em_sti_register_clockevent(p); em_sti_register_clocksource(p); From patchwork Thu Mar 30 21:01:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 96330 Delivered-To: patches@linaro.org Received: by 10.140.89.233 with SMTP id v96csp425835qgd; Thu, 30 Mar 2017 14:01:41 -0700 (PDT) X-Received: by 10.98.207.68 with SMTP id b65mr1112485pfg.12.1490907701022; Thu, 30 Mar 2017 14:01:41 -0700 (PDT) Return-Path: Received: from mail-pg0-x22e.google.com (mail-pg0-x22e.google.com. [2607:f8b0:400e:c05::22e]) by mx.google.com with ESMTPS id s23si2939494plk.178.2017.03.30.14.01.40 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Mar 2017 14:01:41 -0700 (PDT) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::22e as permitted sender) client-ip=2607:f8b0:400e:c05::22e; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::22e as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by mail-pg0-x22e.google.com with SMTP id 81so50248354pgh.2 for ; Thu, 30 Mar 2017 14:01:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fD2OqPqSpubE5NhVvsdsmud5OLintw4XXjCsp/fxwLc=; b=PGKtTjkZl78G51/bzthBZDefknBAeyKi+Ur04d+6MAwjCxQQWEzKBLGvPCVmFRUQOE Ru58p87rIRdehoNDzWj5plpRf9in7eyB2rhTIAKVH6hYMYPm4tb6LH5rdAf0W5K9E9sJ oMJnGjEilPW8LCxZrMVOhyOZDJ4fjTUejdPXw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fD2OqPqSpubE5NhVvsdsmud5OLintw4XXjCsp/fxwLc=; b=k1Z8GdA4glbxo3jkCUTPeebD6agVohn7sTOJX2T1jugOdsvivRHRpo/QNXHbm7iRr9 YubtGlb62JCxu0gwrsXkNgT5RGVTK+TlsCakrvubD0a6jD/YSV5/hbS5Gi2F1T979a20 G7L4vxAgfrWQBs+yt0mtula4u6EtAr1DyWZuIc/Ny77axM8dEtzsfl3DGvhUXICqMnNj +/+AGRYUJFCGGRH9VvUEqpJXoi2PDetOqlfrgKIsF0Zp94LyeZjw2Ydez5nd9RCJHrSV djwNdySg29ZQn750V988YMdZZbqfb7ZSs7yWQDZQM3uzMJkvLVYxCnhhyp2BbuHWQ1j9 ujqw== X-Gm-Message-State: AFeK/H3uxEvIhRNqcNyu7P2/2QNB2fF72AN5y35O1Nj4tuZu6Ds5a0hnwb0My/Kt7UWnkv4ARLI= X-Received: by 10.99.211.21 with SMTP id b21mr1206722pgg.48.1490907700706; Thu, 30 Mar 2017 14:01:40 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([2601:1c2:1002:83f0:4e72:b9ff:fe99:466a]) by smtp.gmail.com with ESMTPSA id y7sm6162626pfk.93.2017.03.30.14.01.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Mar 2017 14:01:39 -0700 (PDT) From: John Stultz To: lkml Cc: Nicolai Stange , Ingo Molnar , Thomas Gleixner , Daniel Lezcano , Richard Cochran , Prarit Bhargava , Stephen Boyd , John Stultz Subject: [PATCH 5/9] clocksource: h8300_timer8: Don't reset rate in ->set_state_oneshot() Date: Thu, 30 Mar 2017 14:01:20 -0700 Message-Id: <1490907684-11186-6-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> References: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> From: Nicolai Stange With the upcoming NTP correction related rate adjustments to be implemented in the clockevents core, the latter needs to get informed about every rate change of a clockevent device made after its registration. Currently, h8300_timer8 violates this requirement in that it registers its clockevent device with the correct rate, but resets its ->mult and ->rate values in timer8_clock_event_start(), called from its ->set_state_oneshot() function. It seems like commit 4633f4cac85a ("clocksource/drivers/h8300: Cleanup startup and remove module code."), which introduced the rate initialization at registration, missed to remove the manual setting of ->mult and ->shift from timer8_clock_event_start(). Purge the setting of ->mult, ->shift, ->min_delta_ns and ->max_delta_ns from timer8_clock_event_start(). Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Daniel Lezcano Cc: Richard Cochran Cc: Prarit Bhargava Cc: Stephen Boyd Signed-off-by: Nicolai Stange Signed-off-by: John Stultz --- drivers/clocksource/h8300_timer8.c | 8 -------- 1 file changed, 8 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c index 546bb18..804c489 100644 --- a/drivers/clocksource/h8300_timer8.c +++ b/drivers/clocksource/h8300_timer8.c @@ -101,15 +101,7 @@ static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced) static void timer8_clock_event_start(struct timer8_priv *p, unsigned long delta) { - struct clock_event_device *ced = &p->ced; - timer8_start(p); - - ced->shift = 32; - ced->mult = div_sc(p->rate, NSEC_PER_SEC, ced->shift); - ced->max_delta_ns = clockevent_delta2ns(0xffff, ced); - ced->min_delta_ns = clockevent_delta2ns(0x0001, ced); - timer8_set_next(p, delta); } From patchwork Thu Mar 30 21:01:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 96331 Delivered-To: patches@linaro.org Received: by 10.140.89.233 with SMTP id v96csp425848qgd; Thu, 30 Mar 2017 14:01:42 -0700 (PDT) X-Received: by 10.98.194.88 with SMTP id l85mr1122627pfg.55.1490907702561; Thu, 30 Mar 2017 14:01:42 -0700 (PDT) Return-Path: Received: from mail-pg0-x235.google.com (mail-pg0-x235.google.com. [2607:f8b0:400e:c05::235]) by mx.google.com with ESMTPS id e13si2948789pln.78.2017.03.30.14.01.42 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Mar 2017 14:01:42 -0700 (PDT) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::235 as permitted sender) client-ip=2607:f8b0:400e:c05::235; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::235 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by mail-pg0-x235.google.com with SMTP id 81so50248919pgh.2 for ; Thu, 30 Mar 2017 14:01:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=oTLjDdzXbH4hb7snV/iMtvIPyl82IRQQEWYW0uXRMYI=; b=NEULY3Zevif2yEbaNqbK6+b1XTJDyJzBHD9ote5kb7jbD0ggtv2ePAMaXQTWpvrpKy 4bV6Jm/KUcl7rstzSsU0TOIJ/arBH8JHEkZgZi4nwoxiB9F2ox0D/yMWpnEfV5gqY1mj 4zpXz++dJscfPt4FZxOI2DsPDYqeJHvWi/JHQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=oTLjDdzXbH4hb7snV/iMtvIPyl82IRQQEWYW0uXRMYI=; b=CsdP0xy5H0G/yYYLGcB0KPkSWUQR1Ai+eUdJYMmFaxNXGdo/JtW08LlMJ+EOMl9ZS6 O/3NXZJTCtTQCzBgRPkx3fw3rhzC5MCE9DlzuoQQg/sng7ZdQurMZlNcDQ/UuhZhUf6x w/6h9Q5oAUxAu57c3Yzk047Fc6B9ZcAeAllBGt9qWKEll82R3V4mQhlofcPZPRdqJhnK taUBaQl+y89ZhsYQnGY7WvxXdCO9IugSl07WEiB3UbTo0don3sSzcp4KOaU9W/8XGvTa zuRIyo3SdWqlTNluD6C1gDQryslsMWun36nC5B0tjvNqr3NzlVsAz4NbjBa3/T362jTK o5xQ== X-Gm-Message-State: AFeK/H0O/4/iMfmvnLkP6hxf3DJpDdNNne70v3qB8kCOWDxGtlcYc9m5vXNErBVCqFbNOZM8C6A= X-Received: by 10.99.107.72 with SMTP id g69mr1117557pgc.149.1490907702269; Thu, 30 Mar 2017 14:01:42 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([2601:1c2:1002:83f0:4e72:b9ff:fe99:466a]) by smtp.gmail.com with ESMTPSA id y7sm6162626pfk.93.2017.03.30.14.01.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Mar 2017 14:01:41 -0700 (PDT) From: John Stultz To: lkml Cc: Nicolai Stange , Ingo Molnar , Thomas Gleixner , Daniel Lezcano , Richard Cochran , Prarit Bhargava , Stephen Boyd , John Stultz Subject: [PATCH 6/9] clockevents: Make clockevents_config() static Date: Thu, 30 Mar 2017 14:01:21 -0700 Message-Id: <1490907684-11186-7-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> References: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> From: Nicolai Stange A clockevent device's rate should be configured before or at registration and changed afterwards through clockevents_update_freq() only. For the configuration at registration, we already have clockevents_config_and_register(). Right now, there are no clockevents_config() users outside of the clockevents core. To mitigiate the risk of drivers errorneously reconfiguring their rates through clockevents_config() *after* device registration, make clockevents_config() static. Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Daniel Lezcano Cc: Richard Cochran Cc: Prarit Bhargava Cc: Stephen Boyd Signed-off-by: Nicolai Stange Signed-off-by: John Stultz --- include/linux/clockchips.h | 1 - kernel/time/clockevents.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) -- 2.7.4 diff --git a/include/linux/clockchips.h b/include/linux/clockchips.h index 5d3053c..eef1569 100644 --- a/include/linux/clockchips.h +++ b/include/linux/clockchips.h @@ -182,7 +182,6 @@ extern u64 clockevent_delta2ns(unsigned long latch, struct clock_event_device *e extern void clockevents_register_device(struct clock_event_device *dev); extern int clockevents_unbind_device(struct clock_event_device *ced, int cpu); -extern void clockevents_config(struct clock_event_device *dev, u32 freq); extern void clockevents_config_and_register(struct clock_event_device *dev, u32 freq, unsigned long min_delta, unsigned long max_delta); diff --git a/kernel/time/clockevents.c b/kernel/time/clockevents.c index 97ac095..4237e07 100644 --- a/kernel/time/clockevents.c +++ b/kernel/time/clockevents.c @@ -468,7 +468,7 @@ void clockevents_register_device(struct clock_event_device *dev) } EXPORT_SYMBOL_GPL(clockevents_register_device); -void clockevents_config(struct clock_event_device *dev, u32 freq) +static void clockevents_config(struct clock_event_device *dev, u32 freq) { u64 sec; From patchwork Thu Mar 30 21:01:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 96332 Delivered-To: patches@linaro.org Received: by 10.140.89.233 with SMTP id v96csp425859qgd; Thu, 30 Mar 2017 14:01:44 -0700 (PDT) X-Received: by 10.99.132.72 with SMTP id k69mr1124859pgd.97.1490907704089; Thu, 30 Mar 2017 14:01:44 -0700 (PDT) Return-Path: Received: from mail-pg0-x236.google.com (mail-pg0-x236.google.com. [2607:f8b0:400e:c05::236]) by mx.google.com with ESMTPS id g2si2946272plj.120.2017.03.30.14.01.43 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Mar 2017 14:01:44 -0700 (PDT) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::236 as permitted sender) client-ip=2607:f8b0:400e:c05::236; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::236 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by mail-pg0-x236.google.com with SMTP id 21so50290143pgg.1 for ; Thu, 30 Mar 2017 14:01:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=U7lLtO81Pgb4hC00iacKP0qF3M6aiKh7TAV3cPH9zZ8=; b=YX0Ej1ygViVT+L74/SwkhVCySrw1YItIVZke3rfeBq/KcGSFH3byhBuxvBPWH0fjbH LDLs76Si6HQKWqJbtRvrneJf/s5gLXexJ/nRTPvVnIgj49kTqftNdkiGMd4JZDv3uggf +DZ9ntPZm4GKF4QikngIAgxT+AcGnnhG+yTVo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=U7lLtO81Pgb4hC00iacKP0qF3M6aiKh7TAV3cPH9zZ8=; b=pEt19Yw6r137yaarAlAGNiRoAWFhbpl4P16QXjrR5HWQZoYc/TDFaBA0UTyH+yHWAX 2etq5iB5lkihpjtt80ek33zEzohFDaor+t2Tyjz4GrpEOVPrANsU1dWXIGF4VqS6zA+U byQkFiNEH0+ad3I4dMP1cHSsw+gqfPSw26Mfv4QsB1LzYlTY5vYD8kce4YAvtqtZCLtn oaq0sieIRvtpdiil5sB04fTwpYCz5UZMpfXlPdsh7Dpxt0ImRHaczMWNIYwUO70kRXSq c/o0K0PlCp6WPZZc3avReAYLzfyaUUiAnFwYb3pChYSA9YkJHfPoTXznqiG/Trw7WFBc lsxw== X-Gm-Message-State: AFeK/H0ZliyjNmBfi5+dF47KqbN3HZc2P+4pnpAZuLXHUMK/pU+E8MkhE1w1tXu2Gcvk1dI39Ic= X-Received: by 10.99.121.78 with SMTP id u75mr1111118pgc.202.1490907703797; Thu, 30 Mar 2017 14:01:43 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([2601:1c2:1002:83f0:4e72:b9ff:fe99:466a]) by smtp.gmail.com with ESMTPSA id y7sm6162626pfk.93.2017.03.30.14.01.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Mar 2017 14:01:42 -0700 (PDT) From: John Stultz To: lkml Cc: John Stultz , Ingo Molnar , Thomas Gleixner , Daniel Lezcano , Richard Cochran , Prarit Bhargava , Stephen Boyd Subject: [PATCH 7/9] MAINTAINERS: Add Stephen Boyd as timekeeping reviewer Date: Thu, 30 Mar 2017 14:01:22 -0700 Message-Id: <1490907684-11186-8-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> References: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> After showing expertise and presenting on the timekeeping subsystem at ELC[1], Stephen clearly should be included in the maintainer list. [1] https://www.youtube.com/watch?v=Puv4mW55bF8 Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Daniel Lezcano Cc: Richard Cochran Cc: Prarit Bhargava Cc: Stephen Boyd Acked-by: Stephen Boyd Signed-off-by: John Stultz --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) -- 2.7.4 diff --git a/MAINTAINERS b/MAINTAINERS index c776906..68b1a14 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11099,6 +11099,7 @@ F: drivers/power/supply/bq27xxx_battery_i2c.c TIMEKEEPING, CLOCKSOURCE CORE, NTP, ALARMTIMER M: John Stultz M: Thomas Gleixner +R: Stephen Boyd L: linux-kernel@vger.kernel.org T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core S: Supported From patchwork Thu Mar 30 21:01:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 96333 Delivered-To: patches@linaro.org Received: by 10.140.89.233 with SMTP id v96csp425871qgd; Thu, 30 Mar 2017 14:01:45 -0700 (PDT) X-Received: by 10.99.50.70 with SMTP id y67mr1096205pgy.109.1490907705841; Thu, 30 Mar 2017 14:01:45 -0700 (PDT) Return-Path: Received: from mail-pg0-x22b.google.com (mail-pg0-x22b.google.com. [2607:f8b0:400e:c05::22b]) by mx.google.com with ESMTPS id f70si2958269pfa.18.2017.03.30.14.01.45 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Mar 2017 14:01:45 -0700 (PDT) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::22b as permitted sender) client-ip=2607:f8b0:400e:c05::22b; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::22b as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by mail-pg0-x22b.google.com with SMTP id 21so50290761pgg.1 for ; Thu, 30 Mar 2017 14:01:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=JFz4S9Tk0ZYKF/pw2llgqF+rHMmar8hSLOpN7bi+tFY=; b=KTMQ0TQefFMGAkSffT2WUQFnayKWjFWoV/i4Npw0Ma3y9qmUWznLIPDhdhKMbpVGJW N0I1izDwVvlSmlY6uaWk0sK1zyloK4ifJU3mfeS6ot0mxbkxtxelcPzK3t7uUKsCS0O4 TyuG7kFMiVhh28yrNwWYLaE2GrzSyK6njLvo4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JFz4S9Tk0ZYKF/pw2llgqF+rHMmar8hSLOpN7bi+tFY=; b=t2vQcu4RHQtktIzKY416sH2j0hmfslWAuFxXBBLjAzcibbeIrPFBiA9v+oWxEFzvfQ 1W7nfkBNNiS8fUBqstFbQGqCR0CBgc5G/EfLAKXQ44Z1vdvqRQxnzUpEQcidKavEXfTZ 56E2llz55YnjaC/eq+kTPnkTA873jWncckOVaP8NETdPUe/sXCCQS9h4pajBzBwvN8uP ZjjdsuX/XknRh+XwrkOcSIj07jtXve/Dp8OIL1+YDusVnlPvgpP3dZ2PUz/WI55oh/Xu X8Qq6mtb/E0DTITHgj8QNdwMvmmZQCRK8+wrY1Kcq3F1jLdtof12BC5a5M2dUFmYQXXk MjBw== X-Gm-Message-State: AFeK/H2CfLyTg4JRxfwSRE90vbkYOdVKS7e3lz0S0Q9FJEhrjlKxWynAR73uewoWvwb0alirmLc= X-Received: by 10.99.39.71 with SMTP id n68mr1137438pgn.85.1490907705576; Thu, 30 Mar 2017 14:01:45 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([2601:1c2:1002:83f0:4e72:b9ff:fe99:466a]) by smtp.gmail.com with ESMTPSA id y7sm6162626pfk.93.2017.03.30.14.01.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Mar 2017 14:01:44 -0700 (PDT) From: John Stultz To: lkml Cc: David Engraf , Ingo Molnar , Thomas Gleixner , Daniel Lezcano , Richard Cochran , Prarit Bhargava , Stephen Boyd , John Stultz Subject: [PATCH 8/9] timers, sched_clock: Update timeout for clock wrap Date: Thu, 30 Mar 2017 14:01:23 -0700 Message-Id: <1490907684-11186-9-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> References: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> From: David Engraf The scheduler clock framework may not use the correct timeout for the clock wrap. This happens when a new clock driver calls sched_clock_register() after the kernel called sched_clock_postinit(). In this case the clock wrap timeout is too long thus sched_clock_poll() is called too late and the clock already wrapped. On my ARM system the scheduler was no longer scheduling any other task than the idle task because the sched_clock() wrapped. Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Daniel Lezcano Cc: Richard Cochran Cc: Prarit Bhargava Cc: Stephen Boyd Signed-off-by: David Engraf Signed-off-by: John Stultz --- kernel/time/sched_clock.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.7.4 diff --git a/kernel/time/sched_clock.c b/kernel/time/sched_clock.c index ea6b610..2d8f05a 100644 --- a/kernel/time/sched_clock.c +++ b/kernel/time/sched_clock.c @@ -206,6 +206,11 @@ sched_clock_register(u64 (*read)(void), int bits, unsigned long rate) update_clock_read_data(&rd); + if (sched_clock_timer.function != NULL) { + /* update timeout for clock wrap */ + hrtimer_start(&sched_clock_timer, cd.wrap_kt, HRTIMER_MODE_REL); + } + r = rate; if (r >= 4000000) { r /= 1000000; From patchwork Thu Mar 30 21:01:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 96334 Delivered-To: patches@linaro.org Received: by 10.140.89.233 with SMTP id v96csp425882qgd; Thu, 30 Mar 2017 14:01:47 -0700 (PDT) X-Received: by 10.84.163.75 with SMTP id n11mr1277153plg.186.1490907707441; Thu, 30 Mar 2017 14:01:47 -0700 (PDT) Return-Path: Received: from mail-pg0-x230.google.com (mail-pg0-x230.google.com. [2607:f8b0:400e:c05::230]) by mx.google.com with ESMTPS id q9si2932385pli.252.2017.03.30.14.01.47 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Mar 2017 14:01:47 -0700 (PDT) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::230 as permitted sender) client-ip=2607:f8b0:400e:c05::230; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::230 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by mail-pg0-x230.google.com with SMTP id x125so50227024pgb.0 for ; Thu, 30 Mar 2017 14:01:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=VZFJpnwAw2ThsT8tcfunYCctEGAaNNP6qveSBTD0FH4=; b=B6A57W6in0hLeZ2ZuATbB95nkAO7ebWbRxc9v3HjIGJhZcD6Hp+WfFUVk+mhQS/LUo AXJmVDQL3N3P+9noRWqylxRjSNNyT187zU36hBVFSrCTlCAmWx1uTHm4YPmQjoymtGDC XvF6cPovtaN3v8cbD14/AcdNRJ8pj4++LymTA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=VZFJpnwAw2ThsT8tcfunYCctEGAaNNP6qveSBTD0FH4=; b=do/oM6VKpRuTyVjlFV/58XUGSJ2VziicSPUQ9adLy1K+vVWVDeaalstcj/WMhKc2RC gmaVYqN80XBOinDEo1ubbzy0L+VnFP3Uc/QVqREIPwTv8s+9HAUpLAI/MjdeJhVqnLT8 oJZ8M2y9bs49r9itX6kZh2enM2MVYt/nqxajmdWxViEwGdsThVbty+2nFoqoqFC/OVn9 T/MAJIbA3smIx+9qvohSaGebqyTb+GRZQsFA2vsgdApewXuLfTDAwPeI6SGVf01lDsEc iX74q+YKaUol+q1O+/QZbdA1MX6ASW5bmqqYV5M3q/Q7K+/mNnSw71GUTOjsx7aA3x+4 3hHw== X-Gm-Message-State: AFeK/H08Q7FN/fuNubNf3MjVrNOHgX7a3nY0ttCELfQRRTRjotn1WMSUyFKRrEcBqLgKI4qujUM= X-Received: by 10.84.216.81 with SMTP id f17mr1306774plj.170.1490907707114; Thu, 30 Mar 2017 14:01:47 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([2601:1c2:1002:83f0:4e72:b9ff:fe99:466a]) by smtp.gmail.com with ESMTPSA id y7sm6162626pfk.93.2017.03.30.14.01.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Mar 2017 14:01:46 -0700 (PDT) From: John Stultz To: lkml Cc: Tom Hromatka , Ingo Molnar , Thomas Gleixner , Daniel Lezcano , Richard Cochran , Prarit Bhargava , Stephen Boyd , John Stultz Subject: [PATCH 9/9] sysrq: Reset the watchdog timers while displaying high-resolution timers Date: Thu, 30 Mar 2017 14:01:24 -0700 Message-Id: <1490907684-11186-10-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> References: <1490907684-11186-1-git-send-email-john.stultz@linaro.org> From: Tom Hromatka On systems with a large number of CPUs, running sysrq- can cause watchdog timeouts. There are two slow sections of code in the sysrq- path in timer_list.c. 1. print_active_timers() - This function is called by print_cpu() and contains a slow goto loop. On a machine with hundreds of CPUs, this loop took approximately 100ms for the first CPU in a NUMA node. (Subsequent CPUs in the same node ran much quicker.) The total time to print all of the CPUs is ultimately long enough to trigger the soft lockup watchdog. 2. print_tickdevice() - This function outputs a large amount of textual information. This function also took approximately 100ms per CPU. Since sysrq- is not a performance critical path, there should be no harm in touching the nmi watchdog in both slow sections above. Touching it in just one location was insufficient on systems with hundreds of CPUs as occasional timeouts were still observed during testing. This issue was observed on an Oracle T7 machine with 128 CPUs, but I anticipate it may affect other systems with similarly large numbers of CPUs. Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Daniel Lezcano Cc: Richard Cochran Cc: Prarit Bhargava Cc: Stephen Boyd Signed-off-by: Tom Hromatka Reviewed-by: Rob Gardner Signed-off-by: John Stultz --- kernel/time/timer_list.c | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.7.4 diff --git a/kernel/time/timer_list.c b/kernel/time/timer_list.c index ff8d5c1..0e7f542 100644 --- a/kernel/time/timer_list.c +++ b/kernel/time/timer_list.c @@ -16,6 +16,7 @@ #include #include #include +#include #include @@ -86,6 +87,9 @@ print_active_timers(struct seq_file *m, struct hrtimer_clock_base *base, next_one: i = 0; + + touch_nmi_watchdog(); + raw_spin_lock_irqsave(&base->cpu_base->lock, flags); curr = timerqueue_getnext(&base->active); @@ -197,6 +201,8 @@ print_tickdevice(struct seq_file *m, struct tick_device *td, int cpu) { struct clock_event_device *dev = td->evtdev; + touch_nmi_watchdog(); + SEQ_printf(m, "Tick Device: mode: %d\n", td->mode); if (cpu < 0) SEQ_printf(m, "Broadcast device\n");