From patchwork Wed Jan 27 12:00:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 371510 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp193036jam; Wed, 27 Jan 2021 04:04:26 -0800 (PST) X-Google-Smtp-Source: ABdhPJw2skm3rydrdG+Ye5x4fJCOxMXSw10HKt8CUG7kru0PYN+62p9TnCi515ocJ9+pdV+LPy40 X-Received: by 2002:a05:6402:206c:: with SMTP id bd12mr8839720edb.10.1611749066551; Wed, 27 Jan 2021 04:04:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611749066; cv=none; d=google.com; s=arc-20160816; b=lhXDRPn2EgheEX3Ky6ApOg15qZNa+Dk431vatlFEKHjemKrcMbOBjZyE7Pirzambo+ MDETRxtIhXrKa6xAdm5JiyJHjSpkucamB1uocqW8/nWXhgLtSWyWkKU9sf533sTm0oyt Kdd4bNprBhiWr9CaHpRmLo1tPmsuaLQ5WJaUqNAr9KUgZxhD2fDUbMO1eUv/npL1FFBv JAcNqP42lkenjL04TuxQ82LX4z87jtj2NoTC68A5nzrVwGjb4VYBSXwoNcY5Juv7ndGX CODqn8m8a1qsgnPeS2Ledj7pUjy7yrbicPQcZmDYnEc0WQW/0k7sTkZYWRj/jhXREQRD XkWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=n6qpfNhmWBqkeJN91OhBb7YTYJJXiu6U3+arPvH9B/0=; b=yufNlm95oTXFku5ud5hOOanrtPV+h77TVG12Gdvgsq4pZzM+5vfkjQoGQq9z6Apop9 brgHVWCfmSD109su6aUF8og5ycQAr9CsZrU7RAYrq1JlCq+R2ZsTlsx3/5z2O0FX81pn d/FSfYj2FgW6nZMokq8LCLiGNtqQLrluvv6D5nrHGuQ3SGJC8sVQuVcYNnSzPj72qEwA gZDFmIvY0nKowKYQCkuBAC2fjE8/W6z6CKLeptQ67O1mGs/ck04qIooVdBKsbUukhn/n IGcRe0SKJ035TOn2/i2BjRQkoov+20mhtQ5U+wN0wrBG3TFhautzweE3X7YCxlaNU58y R/aQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id pw15si732531ejb.567.2021.01.27.04.04.26; Wed, 27 Jan 2021 04:04:26 -0800 (PST) Received-SPF: pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235101AbhA0MEA (ORCPT + 13 others); Wed, 27 Jan 2021 07:04:00 -0500 Received: from foss.arm.com ([217.140.110.172]:42336 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237445AbhA0MBi (ORCPT ); Wed, 27 Jan 2021 07:01:38 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2891B1042; Wed, 27 Jan 2021 04:00:51 -0800 (PST) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0B5B43F68F; Wed, 27 Jan 2021 04:00:49 -0800 (PST) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Cc: coresight@lists.linaro.org, linux-kernel@vger.kernel.org, Suzuki K Poulose , stable@vger.kernel.org, Mathieu Poirier , Leo Yan , Mike Leach Subject: [PATCH v2] coresight: etm4x: Handle accesses to TRCSTALLCTLR Date: Wed, 27 Jan 2021 12:00:32 +0000 Message-Id: <20210127120032.3611851-1-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20210126145614.3607093-1-suzuki.poulose@arm.com> References: <20210126145614.3607093-1-suzuki.poulose@arm.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org TRCSTALLCTLR register is only implemented if TRCIDR3.STALLCTL == 0b1 Make sure the driver touches the register only it is implemented. Cc: stable@vger.kernel.org Cc: Mathieu Poirier Cc: Leo Yan Cc: Mike Leach Signed-off-by: Suzuki K Poulose --- Changes since v1: - No change to the patch, fixed the stable email address and added usual reviewers. --- drivers/hwtracing/coresight/coresight-etm4x-core.c | 9 ++++++--- drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 3 +++ 2 files changed, 9 insertions(+), 3 deletions(-) -- 2.24.1 diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index b40e3c2bf818..814b49dae0c7 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -367,7 +367,8 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) etm4x_relaxed_write32(csa, 0x0, TRCAUXCTLR); etm4x_relaxed_write32(csa, config->eventctrl0, TRCEVENTCTL0R); etm4x_relaxed_write32(csa, config->eventctrl1, TRCEVENTCTL1R); - etm4x_relaxed_write32(csa, config->stall_ctrl, TRCSTALLCTLR); + if (drvdata->stallctl) + etm4x_relaxed_write32(csa, config->stall_ctrl, TRCSTALLCTLR); etm4x_relaxed_write32(csa, config->ts_ctrl, TRCTSCTLR); etm4x_relaxed_write32(csa, config->syncfreq, TRCSYNCPR); etm4x_relaxed_write32(csa, config->ccctlr, TRCCCCTLR); @@ -1545,7 +1546,8 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) state->trcauxctlr = etm4x_read32(csa, TRCAUXCTLR); state->trceventctl0r = etm4x_read32(csa, TRCEVENTCTL0R); state->trceventctl1r = etm4x_read32(csa, TRCEVENTCTL1R); - state->trcstallctlr = etm4x_read32(csa, TRCSTALLCTLR); + if (drvdata->stallctl) + state->trcstallctlr = etm4x_read32(csa, TRCSTALLCTLR); state->trctsctlr = etm4x_read32(csa, TRCTSCTLR); state->trcsyncpr = etm4x_read32(csa, TRCSYNCPR); state->trcccctlr = etm4x_read32(csa, TRCCCCTLR); @@ -1657,7 +1659,8 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) etm4x_relaxed_write32(csa, state->trcauxctlr, TRCAUXCTLR); etm4x_relaxed_write32(csa, state->trceventctl0r, TRCEVENTCTL0R); etm4x_relaxed_write32(csa, state->trceventctl1r, TRCEVENTCTL1R); - etm4x_relaxed_write32(csa, state->trcstallctlr, TRCSTALLCTLR); + if (drvdata->stallctl) + etm4x_relaxed_write32(csa, state->trcstallctlr, TRCSTALLCTLR); etm4x_relaxed_write32(csa, state->trctsctlr, TRCTSCTLR); etm4x_relaxed_write32(csa, state->trcsyncpr, TRCSYNCPR); etm4x_relaxed_write32(csa, state->trcccctlr, TRCCCCTLR); diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index 1c490bcef3ad..cd9249fbf913 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -296,6 +296,9 @@ static ssize_t mode_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; + if ((val & ETM_MODE_ISTALL_EN) && !drvdata->stallctl) + return -EINVAL; + spin_lock(&drvdata->spinlock); config->mode = val & ETMv4_MODE_ALL;