From patchwork Mon Mar 5 18:03:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liviu Dudau X-Patchwork-Id: 130737 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp2974637lja; Mon, 5 Mar 2018 10:03:22 -0800 (PST) X-Google-Smtp-Source: AG47ELvy3iuBVhetgsvewcR6OQNkBB+FQUgU7HWBLdTW3V6MzqSjz4WmNg02RDmrDnpVl9P782zm X-Received: by 2002:a17:902:b418:: with SMTP id x24-v6mr13740841plr.320.1520273002836; Mon, 05 Mar 2018 10:03:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1520273002; cv=none; d=google.com; s=arc-20160816; b=e7cITdVosCQaxC06HOxNQQ6bCTzN8aTBYgqHSKFuWJ7aZTmO8m1BzLZqROC5FpVKTh sJt5bSWy/g7HNX4KLJioswJU1lHgh7Vnzd3ETYG5FN5x65GeVCyg/jB4Z4qinlKIHe9H nZS0D9JJWnX0rDCWHWYzES17CYYH+oz7WZS9zG2T0Njm170X5TIgneXyv6wVGF2xPOPE UDiJb9Jdo3r/S3jnqMl2lz4T/xWVGvJcDHasBnJAbEe8E3uLeAFk0G1tusuOlWgJXovV 23eAaq7kntLVzSRnvx/JoFoh6AwYKMrv8F9O87mJvk2RaltXljqPPmGUshP1HbIsJC8S 4e6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:references:in-reply-to:message-id:date:subject :to:from:delivered-to:arc-authentication-results; bh=TAXwF7AvMfPml0G9S9NDBY3rUm44uIXHvme/6h2q/KQ=; b=t7hgYlFQbjwNCSvHrxy+mQd8ATTxrKJ7XXb51D/3AD54llgDH3dS65G8DEH0hFsM8L uVKB+Xa9U/jDxzDpPOU1Y61jScL630RDwMg2vhkzVqiuFLlhfWqAGlScKbsvyMcy1TEK gHNT6le74FLDBuDKWDy1RkCc9p9+vAvvvGFv0FegVe7Rc7ZAsUebtxF/4L95SSgAl5A8 FDVupdbt8r706hkfLmVLmUNWAcMGDg5wBjEnMxSYybt4fato0wg1nh7h1BwOL5MaRy8T GQJ9uwZef9W3WaJzchVHmKpmo2HOuaqsNWmdMcUxEcRRAV0ABC04Och0oab+AOzCDud/ UwjQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id l2si8588004pgs.276.2018.03.05.10.03.22 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 05 Mar 2018 10:03:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B25416E44D; Mon, 5 Mar 2018 18:03:21 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from cam-smtp0.cambridge.arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by gabe.freedesktop.org (Postfix) with ESMTPS id 057DE6E44D for ; Mon, 5 Mar 2018 18:03:19 +0000 (UTC) Received: from e110455-lin.cambridge.arm.com (e110455-lin.cambridge.arm.com [10.2.131.15]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id w25I3Gh4023406; Mon, 5 Mar 2018 18:03:16 GMT From: Liviu Dudau To: Brian Starkey Subject: [PATCH v3] drm/mali-dp: Fix malidp_atomic_commit_hw_done() for event sending. Date: Mon, 5 Mar 2018 18:03:16 +0000 Message-Id: <20180305180316.12654-1-Liviu.Dudau@arm.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180301174913.10875-1-Liviu.Dudau@arm.com> References: <20180301174913.10875-1-Liviu.Dudau@arm.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Liviu Dudau , Alexandru-Cosmin Gheorghe , Mali DP Maintainers , LKML , DRI devel MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Mali DP hardware has a 'go' bit (config_valid) for making the new scene parameters active at the next page flip. The problem with the current code is that the driver first sets this bit and then proceeds to wait for confirmation from the hardware that the configuration has been updated before arming the vblank event. As config_valid is actually asserted by the hardware after the vblank event, during the prefetch phase, when we get to arming the vblank event we are going to send it at the next vblank, in effect halving the vblank rate from the userspace perspective. Fix it by sending the userspace event from the IRQ handler, when we handle the config_valid interrupt, which syncs with the time when the hardware is active with the new parameters. v2: Brian reminded me that interrupts won't fire when CRTC is off, so we need to do the sending ourselves. v3: crtc->enabled is the wrong flag to use here, as when we get an atomic commit that turns off the CRTC it will still be enabled until after the commit is done. Use the crtc->state->active for test. Reported-by: Alexandru-Cosmin Gheorghe Signed-off-by: Liviu Dudau Tested-by: Alexandru Gheorghe --- drivers/gpu/drm/arm/malidp_drv.c | 32 +++++++++++++++++--------------- drivers/gpu/drm/arm/malidp_drv.h | 1 + drivers/gpu/drm/arm/malidp_hw.c | 12 +++++++++--- 3 files changed, 27 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c index d88a3b9d59cc..3c628e43bf25 100644 --- a/drivers/gpu/drm/arm/malidp_drv.c +++ b/drivers/gpu/drm/arm/malidp_drv.c @@ -185,25 +185,29 @@ static int malidp_set_and_wait_config_valid(struct drm_device *drm) static void malidp_atomic_commit_hw_done(struct drm_atomic_state *state) { - struct drm_pending_vblank_event *event; struct drm_device *drm = state->dev; struct malidp_drm *malidp = drm->dev_private; - if (malidp->crtc.enabled) { - /* only set config_valid if the CRTC is enabled */ - if (malidp_set_and_wait_config_valid(drm)) - DRM_DEBUG_DRIVER("timed out waiting for updated configuration\n"); - } + malidp->event = malidp->crtc.state->event; + malidp->crtc.state->event = NULL; - event = malidp->crtc.state->event; - if (event) { - malidp->crtc.state->event = NULL; + if (malidp->crtc.state->active) { + /* + * if we have an event to deliver to userspace, make sure + * the vblank is enabled as we are sending it from the IRQ + * handler. + */ + if (malidp->event) + drm_crtc_vblank_get(&malidp->crtc); + /* only set config_valid if the CRTC is enabled */ + if (malidp_set_and_wait_config_valid(drm) < 0) + DRM_DEBUG_DRIVER("timed out waiting for updated configuration\n"); + } else if (malidp->event) { + /* CRTC inactive means vblank IRQ is disabled, send event directly */ spin_lock_irq(&drm->event_lock); - if (drm_crtc_vblank_get(&malidp->crtc) == 0) - drm_crtc_arm_vblank_event(&malidp->crtc, event); - else - drm_crtc_send_vblank_event(&malidp->crtc, event); + drm_crtc_send_vblank_event(&malidp->crtc, malidp->event); + malidp->event = NULL; spin_unlock_irq(&drm->event_lock); } drm_atomic_helper_commit_hw_done(state); @@ -232,8 +236,6 @@ static void malidp_atomic_commit_tail(struct drm_atomic_state *state) malidp_atomic_commit_hw_done(state); - drm_atomic_helper_wait_for_vblanks(drm, state); - pm_runtime_put(drm->dev); drm_atomic_helper_cleanup_planes(drm, state); diff --git a/drivers/gpu/drm/arm/malidp_drv.h b/drivers/gpu/drm/arm/malidp_drv.h index e0d12c9fc6b8..c2375bb49619 100644 --- a/drivers/gpu/drm/arm/malidp_drv.h +++ b/drivers/gpu/drm/arm/malidp_drv.h @@ -22,6 +22,7 @@ struct malidp_drm { struct malidp_hw_device *dev; struct drm_crtc crtc; wait_queue_head_t wq; + struct drm_pending_vblank_event *event; atomic_t config_valid; u32 core_id; }; diff --git a/drivers/gpu/drm/arm/malidp_hw.c b/drivers/gpu/drm/arm/malidp_hw.c index 2bfb542135ac..8abd335ec313 100644 --- a/drivers/gpu/drm/arm/malidp_hw.c +++ b/drivers/gpu/drm/arm/malidp_hw.c @@ -782,9 +782,15 @@ static irqreturn_t malidp_de_irq(int irq, void *arg) /* first handle the config valid IRQ */ dc_status = malidp_hw_read(hwdev, hw->map.dc_base + MALIDP_REG_STATUS); if (dc_status & hw->map.dc_irq_map.vsync_irq) { - /* we have a page flip event */ - atomic_set(&malidp->config_valid, 1); malidp_hw_clear_irq(hwdev, MALIDP_DC_BLOCK, dc_status); + /* do we have a page flip event? */ + if (malidp->event != NULL) { + spin_lock(&drm->event_lock); + drm_crtc_send_vblank_event(&malidp->crtc, malidp->event); + malidp->event = NULL; + spin_unlock(&drm->event_lock); + } + atomic_set(&malidp->config_valid, 1); ret = IRQ_WAKE_THREAD; } @@ -794,7 +800,7 @@ static irqreturn_t malidp_de_irq(int irq, void *arg) mask = malidp_hw_read(hwdev, MALIDP_REG_MASKIRQ); status &= mask; - if (status & de->vsync_irq) + if ((status & de->vsync_irq) && malidp->crtc.enabled) drm_crtc_handle_vblank(&malidp->crtc); malidp_hw_clear_irq(hwdev, MALIDP_DE_BLOCK, status);