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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:23:35 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 01/23] configure: Fix --enable-tcg-interpreter Date: Wed, 27 Jan 2021 22:23:09 -1000 Message-Id: <20210128082331.196801-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The configure option was backward, and we failed to pass the value on to meson. Fixes: 23a77b2d18b Signed-off-by: Richard Henderson --- configure | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Tested-by: Stefan Weil diff --git a/configure b/configure index dcc5ea7d63..ad35e26168 100755 --- a/configure +++ b/configure @@ -1119,9 +1119,9 @@ for opt do ;; --enable-whpx) whpx="enabled" ;; - --disable-tcg-interpreter) tcg_interpreter="true" + --disable-tcg-interpreter) tcg_interpreter="false" ;; - --enable-tcg-interpreter) tcg_interpreter="false" + --enable-tcg-interpreter) tcg_interpreter="true" ;; --disable-cap-ng) cap_ng="disabled" ;; @@ -6374,6 +6374,7 @@ NINJA=$ninja $meson setup \ -Dvhost_user_blk_server=$vhost_user_blk_server \ -Dfuse=$fuse -Dfuse_lseek=$fuse_lseek -Dguest_agent_msi=$guest_agent_msi \ $(if test "$default_features" = no; then echo "-Dauto_features=disabled"; fi) \ + -Dtcg_interpreter=$tcg_interpreter \ $cross_arg \ "$PWD" "$source_path" From patchwork Thu Jan 28 08:23:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372532 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp647340ejb; Thu, 28 Jan 2021 00:27:06 -0800 (PST) X-Google-Smtp-Source: ABdhPJzRYGrWchcuaCqG0GoPTUvqUdhlhSrFTLsqBAqerDnDLSoNwAlSVtFbJAe5cOvQbzJ/s6dS X-Received: by 2002:a25:2f41:: with SMTP id v62mr4407469ybv.473.1611822426139; Thu, 28 Jan 2021 00:27:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611822426; cv=none; d=google.com; s=arc-20160816; b=JMbeV1Beukn9OfRHntkVgz9rLzyuO6n487WyPKgF/mmqNQKlzW8wP4LSytawFEatDb w3KyVmzK4LSDSU/+zTQ/WpsVdKn7yFaaFTYSFf25rHFh/WnQsdgOwWKHvu9dUbvwCxVs 4LTio3ThFllt5JNztbFPYQ0e6IwICbivyJjB64z00OLVl7SjP21NrzkyG+WNzraY5CI6 yMNlU7VhGa6jckB9GFKpzjTK5ihA2n2NS7f4tm2+LklPW/7OaA81IR8xp+nLNlftQ9Kz v83BFBh0TjmucyYXyeVdA1kmazwn09Qpwl2V7sGdpP+OwJqLIbn8PlsKtx66lV69hGJ5 pMQw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=uPRkIqdPM6Tvu9IfyvOETaxBe+ufv4j8HJV64QNku9g=; b=oJJl33y+d4cRPtUqO7adkUJx2CcfcKsRsrl7fNL6EQbIMU0LAjGtEw5H0j4p35w8+v /0oUadWEd8z7jp6q72IM7DBrw4PLmxLNJD9XxMqAVrVt+QdAYI7SamUJJLpRh3g1hWrp PoqR8KDo7x/3FfKFKpUe3NqYyK0XEr3gxOmwU4kgl2ekpj8eQob2oT5DW/3CjCV9RfLB OXr+Vk+0gN6X0YiMwfSrz9ELw8STgkLnKv4oHJUgbUNWpkJA9MTAxX9NGFpsi1AP1ssp bt5dKPNX0sjzC2SBJJqLsQMF51MHPZablANhZqK71HrFK6oigDOV/PQw3KHIRLGT+fuW NwQQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nFVkHam5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:23:38 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 02/23] tcg: Manage splitwx in tc_ptr_to_region_tree by hand Date: Wed, 27 Jan 2021 22:23:10 -1000 Message-Id: <20210128082331.196801-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The use in tcg_tb_lookup is given a random pc that comes from the pc of a signal handler. Do not assert that the pointer is already within the code gen buffer at all, much less the writable mirror of it. Fixes: db0c51a3803 Signed-off-by: Richard Henderson --- For TCI, this indicates a bug in handle_cpu_signal, in that we are taking PC from the host signal frame. Which is, nearly, unrelated to TCI at all. The TCI "pc" is tci_tb_ptr (fixed in the next patch to at least be thread-local). We update this only on calls, since we don't expect SEGV during the interpretation loop. Which works ok for softmmu, in which we pass down pc by hand to the helpers, but is not ok for user-only, where we simply perform the raw memory operation. I don't know how to fix this, exactly. Probably by storing to tci_tb_ptr before each qemu_ld/qemu_st operation, with barriers. Then Doing the Right Thing in handle_cpu_signal. And perhaps by clearing tci_tb_ptr whenever we're not expecting a SEGV on behalf of the guest (and thus anything left is a qemu host bug). r~ --- tcg/tcg.c | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) -- 2.25.1 diff --git a/tcg/tcg.c b/tcg/tcg.c index 9e1b0d73c7..78701cf359 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -407,11 +407,21 @@ static void tcg_region_trees_init(void) } } -static struct tcg_region_tree *tc_ptr_to_region_tree(const void *cp) +static struct tcg_region_tree *tc_ptr_to_region_tree(const void *p) { - void *p = tcg_splitwx_to_rw(cp); size_t region_idx; + /* + * Like tcg_splitwx_to_rw, with no assert. The pc may come from + * a signal handler over which the caller has no control. + */ + if (!in_code_gen_buffer(p)) { + p -= tcg_splitwx_diff; + if (!in_code_gen_buffer(p)) { + return NULL; + } + } + if (p < region.start_aligned) { region_idx = 0; } else { @@ -430,6 +440,7 @@ void tcg_tb_insert(TranslationBlock *tb) { struct tcg_region_tree *rt = tc_ptr_to_region_tree(tb->tc.ptr); + g_assert(rt != NULL); qemu_mutex_lock(&rt->lock); g_tree_insert(rt->tree, &tb->tc, tb); qemu_mutex_unlock(&rt->lock); @@ -439,6 +450,7 @@ void tcg_tb_remove(TranslationBlock *tb) { struct tcg_region_tree *rt = tc_ptr_to_region_tree(tb->tc.ptr); + g_assert(rt != NULL); qemu_mutex_lock(&rt->lock); g_tree_remove(rt->tree, &tb->tc); qemu_mutex_unlock(&rt->lock); @@ -453,8 +465,13 @@ TranslationBlock *tcg_tb_lookup(uintptr_t tc_ptr) { struct tcg_region_tree *rt = tc_ptr_to_region_tree((void *)tc_ptr); TranslationBlock *tb; - struct tb_tc s = { .ptr = (void *)tc_ptr }; + struct tb_tc s; + if (rt == NULL) { + return NULL; + } + + s.ptr = (void *)tc_ptr; qemu_mutex_lock(&rt->lock); tb = g_tree_lookup(rt->tree, &s); qemu_mutex_unlock(&rt->lock); From patchwork Thu Jan 28 08:23:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372529 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp645790ejb; Thu, 28 Jan 2021 00:24:05 -0800 (PST) X-Google-Smtp-Source: ABdhPJwCExNX7F0URdl2MfW3jpPqYMjFjNXd8UzXKQRImTwY6Czfa2ULPn/vzLdMlqo1spyOyHyp X-Received: by 2002:a25:6914:: with SMTP id e20mr22955791ybc.321.1611822244845; Thu, 28 Jan 2021 00:24:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611822244; cv=none; d=google.com; s=arc-20160816; b=I2NmQAfNK1Acfs5RhLfvg00NktfzN54jaG5d+/2+uYnsApmdHVvWu4+FiUl7YokQyb vKSx6lfGEbl8FcJb0BD2vFmbrZC+GXhlIV7ocXucosq/bm7MizGguNZTH6i0GE+Njhe4 1oEhvIzKuWEP4dPrmShL2BvZhwCh+sFgXAY0nuoGQkTYgORC11ZBZ8PQv2uBBfD0egO6 wQd4GojKXm+5RF4Uwvc/Y4oCjGktIvpnNvx8YE4ME+aiav7pmOc+1YtEgpFhhmuWUeWE 1xrT1dSklHxm5L9o8t4Z6BSEdyu3/AdFd9Opb7mpZi6t/CdjzXz/KWzMU+AYbKGHh1sC pXVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=RcEW49jm5cwG5H+YCNoBE8sdtPqM5Tz+Y2fGrDe8qGg=; b=twi4y0wjzhtOtRnDOol2hbCnu/vHd+qof6obgD2qTogKu4GUyZsRV8yzIBPZqJyVDC WMMi20f9EDwCGNvrNLm2i/zUpmjoH9uCBDmMJL2qu4IEgNEAHYYzLM8bjMtX8Y/XvnIF rcGjgbYQNYTjXXzEANkmPd4cMA8F4Cw0n6ie3Ip1Ka1+6kNfCzYoXE9ynlJ58UUl/X8j 8XRc4HQhPAh/3ATdMvjZ1PuNbQiEfZwVOLpqvX34+iEeqDJE1h3y659mGUmzyoh2CGk5 65ASd+Km8NDIPochQy2jd/hAeAwLmWEUm05YRx3rXfmd1x8Val+wbexdtGbOksNKsmVJ FkAw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cxlXSSgi; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:23:40 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 03/23] exec: Make tci_tb_ptr thread-local Date: Wed, 27 Jan 2021 22:23:11 -1000 Message-Id: <20210128082331.196801-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Each thread must have its own pc, even under TCI. Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 2 +- tcg/tcg-common.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) -- 2.25.1 diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 125000bcf7..f933c74c44 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -544,7 +544,7 @@ void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr); /* GETPC is the true target of the return instruction that we'll execute. */ #if defined(CONFIG_TCG_INTERPRETER) -extern uintptr_t tci_tb_ptr; +extern __thread uintptr_t tci_tb_ptr; # define GETPC() tci_tb_ptr #else # define GETPC() \ diff --git a/tcg/tcg-common.c b/tcg/tcg-common.c index 7e1992e79e..b183db84c7 100644 --- a/tcg/tcg-common.c +++ b/tcg/tcg-common.c @@ -26,7 +26,7 @@ #include "tcg/tcg.h" #if defined(CONFIG_TCG_INTERPRETER) -uintptr_t tci_tb_ptr; +__thread uintptr_t tci_tb_ptr; #endif TCGOpDef tcg_op_defs[] = { From patchwork Thu Jan 28 08:23:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372534 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp648614ejb; Thu, 28 Jan 2021 00:29:40 -0800 (PST) X-Google-Smtp-Source: ABdhPJwsMujq72G0bSwo784sVUlmLQbbuMqJPzg8moMXBYtQyGothuMuJR3BwyVewcxK4ppXJXp5 X-Received: by 2002:a25:2102:: with SMTP id h2mr2287008ybh.486.1611822579995; Thu, 28 Jan 2021 00:29:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611822579; cv=none; d=google.com; s=arc-20160816; b=t8K/Ku3iX7kKVubDBR1A1xWCruqqgvk5ErHX/nKAp2MaJPbtBQ5YTDCi3Fscw7QiJj jifFnOCqNLP/sS5n0JcvdXeyspt7DbOqlB7iT/URytBvIUieL5n0C4y/d174hkPEpcy4 sA/+TFTJ7mZjgjRGyizo9gQFE3XwyF/Xj2xzK0kbPJyqjd5PrAV/AVf2px08qxsHDM74 pBGLVx6TOX3bNFCH9ZPcmL1hN760CJ6CkI//Tq0vJbb8aHeyZmHOAuwgjeBb6XGwEqz9 gQx0GMyYyuVjkYhQ1wIZZNI111Vdb3kSsgjvp77O1y9FfnLo9tNPY/0+1oB5BRf7B8V4 ZtgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ef0r5gdQfikjl87vGZNBaWDeqf7Ic5J6b7LYEuBGeCg=; b=1CWH7js76jcTimnkZjB81kSsDl0crDXMalJuNK0nLfeyAU73Ysic5vNgFVKZCsHvDi Y8VwifH+0SYbeaW4eaaUalY5rFlaS3t3tJ6rVcc37KhBCnLasZ4plabJ/A6RGwuTfVFC SSjV1LMDO7WOmK09eRRswfVijHWp3HY/kG76wvtHVhS9e2ZAO6MuW35Xbw0492rp4Uoi 0d93HELN3W+gzgSSNZ4cA8oiJriMw5JlzRkjcFBix/9K7LB5hKoutb74amHwy53eYRDE ECyW34Cupa8VM0zLpP6PsanqYV7Di23i/YOPRx8j1+N4oYGrAbcGNc3Ez5k4azJ+5+fc dnqw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wf0mcJtq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:23:41 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 04/23] tcg/tci: Implement INDEX_op_ld16s_i32 Date: Wed, 27 Jan 2021 22:23:12 -1000 Message-Id: <20210128082331.196801-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Stefan Weil That TCG opcode is used by debian-buster (arm64) running ffmpeg: qemu-aarch64 /usr/bin/ffmpeg -i theora.mkv theora.webm Reported-by: Alex Bennée Signed-off-by: Stefan Weil Message-Id: <20210128024814.2056958-1-sw@weilnetz.de> Signed-off-by: Richard Henderson --- tcg/tci.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) -- 2.25.1 Reviewed-by: Alex Bennée Tested-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 2311aa7d3a..2edb47506e 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -614,7 +614,10 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, TODO(); break; case INDEX_op_ld16s_i32: - TODO(); + t0 = *tb_ptr++; + t1 = tci_read_r(regs, &tb_ptr); + t2 = tci_read_s32(&tb_ptr); + tci_write_reg(regs, t0, *(int16_t *)(t1 + t2)); break; case INDEX_op_ld_i32: t0 = *tb_ptr++; From patchwork Thu Jan 28 08:23:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372533 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp648602ejb; Thu, 28 Jan 2021 00:29:38 -0800 (PST) X-Google-Smtp-Source: ABdhPJxxNZODkQm/O60cTBxq1N2/Wz5KGc4TLk70FWZx1ZJ3cg9HCRFEnmiC7FU//3sr9M/+TOo9 X-Received: by 2002:a25:e6c8:: with SMTP id d191mr10133735ybh.358.1611822578554; Thu, 28 Jan 2021 00:29:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611822578; cv=none; d=google.com; s=arc-20160816; b=WkNvFDLwIUvaquBz2ZITDwNk6nejF7YCSbydB7vhMEGoFyeftmgCnxDl0Ou2F7Eg8g xuIyIvUwwZLozjtVpHkykA43Rrkvfv7fLhDMVp1jQp7IPRZKLUZ9yX+1PH6IP3tyx1x7 sSS0Go7TDB97xUOn/v3vEDQlD8hrx5hCjVeFrG3FXQs+5JwFNKYSFAoQpW1UnHmrV5F8 t6+p2GuDLK4Q1cZoKR1CT9v7rt9b0rPD/bfRbBrFPE5TdaC4aueDcndu7IWx54rylabH IWnOA+GyTnhG40aK1PayBw3EHeQG7ZMQKDoiuw3w7Cv4Qh2NQ/Lmux8Jpsc6/KlCxl5C o/Hw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=7upBAxh+r6e67PJNYJC15zDRNacBwT3vrKSjjXc1s0Q=; b=R5vd+qMQCxtylKD6eNB0RjXZ0D2msS4fnXKDfdl/WC6LmgdOkv9RQhukE+cH/N8WNE DkgJNNh8vdd5M+cAaVb/yNAaiP6XQ6I22WOJXioklGBkXjw0GBZ2HAKCKChb8MWy5Us5 rdNA5ifHs9V5YmsMReuO0SceqMnJ6Cquu1YJcpzeBUcs1iQBU5ER+YEQ2LYhbxC7oBlz +sW4nlSFWx4+NsnhZskYq57YCfZWqtHpVw4zam/GfBIe0MLPQVeh/RhPXXrEesja4KLW kHpo++AklvK7I8EQ5i0HIVzSgnaZYepLXzor7LqRp+UL89NasEzqg9HnLLWIVSgMx6/5 iZBQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jGAh5On0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:23:43 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 05/23] tcg/tci: Implement INDEX_op_ld8s_i64 Date: Wed, 27 Jan 2021 22:23:13 -1000 Message-Id: <20210128082331.196801-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Stefan Weil That TCG opcode is used by debian-buster (arm64) running ffmpeg: qemu-aarch64 /usr/bin/ffmpeg -i theora.mkv theora.webm Reported-by: Alex Bennée Signed-off-by: Stefan Weil Message-Id: <20210128020425.2055454-1-sw@weilnetz.de> Signed-off-by: Richard Henderson --- tcg/tci.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) -- 2.25.1 Reviewed-by: Alex Bennée Tested-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 2edb47506e..0e1b8e8383 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -882,7 +882,10 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2)); break; case INDEX_op_ld8s_i64: - TODO(); + t0 = *tb_ptr++; + t1 = tci_read_r(regs, &tb_ptr); + t2 = tci_read_s32(&tb_ptr); + tci_write_reg(regs, t0, *(int8_t *)(t1 + t2)); break; case INDEX_op_ld16u_i64: t0 = *tb_ptr++; From patchwork Thu Jan 28 08:23:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372537 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp648876ejb; Thu, 28 Jan 2021 00:30:10 -0800 (PST) X-Google-Smtp-Source: ABdhPJz1nm3yd9kkAo53o7jYlk+ouhcKHpv0cBHpPP1vowh2i7NNE4ewwvSB42hW8ja32yqOqggp X-Received: by 2002:a25:8203:: with SMTP id q3mr22204122ybk.86.1611822610625; Thu, 28 Jan 2021 00:30:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611822610; cv=none; d=google.com; s=arc-20160816; b=vXakAn/QDQQULpNRp8+86VdFsCAsra4yRlPQaW1r+dMQUU4/4c2SwYylCCW/NIBCj7 XMFZKEJrDZUkiqxkNtQAoPQdGGx5wTjyJoHOG96vG68IiTEBhUr24nQ1GW7NmxHgD8Uw PeKHGrIgrdf4KmbhkbyhCAdCwXIBqUZdNQ6qB/sF0rRxDkaKZQc+5YcZFRhHgIj8iVsl 3osrzlLhCpEmp7gWU69Ht1wSLAupYPzKGAWyMpUNumUFAVAxZf5vY/uCtVZNkHJNiDrc nFTcTJ77FCvcXaUQ3DDVLycXmrpdggBuDukLC3E57AM5FAzGLpHDiBbxI/1k19B1pwGf t9dg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=IFXwe7/lgpsoi7BHwGAB+iNJY2cLRCPx5UvuWr2ycbA=; b=Nf2ZyrRc5ukuS2L8OfA8N4y6AzfA3p1YrcDH7frUaXP5DjM2xINiTiM+9W4ZGfOqy6 Ke1pTksyn+gVJ2jlWk5BW+sgf4JHgkwSmyX5FUJVeF9gtua+SPMwmnX0Dh/+72bxSrLt Jg7YKDYAhq4dDiPsclD5ObuaqaqNoNn4JY3J/6JiqupGwSxsSP88YDi3N9HD3beFTLRR ClUAERDzZAyjvg2JS9UEBLx9k4lCnCAF+lgq9HriC8Wn2HDWXondP/cB0sM8ZYBacmml K0x2OrY96h6HFh1SzwOzppDrJn8IQ2IOaqmu8L81058GjMfBWO8IIn+jRrnfWPhYM1UW hZeQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=oI7GU2WD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:23:45 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 06/23] tcg/tci: Inline tci_write_reg32s into the only caller Date: Wed, 27 Jan 2021 22:23:14 -1000 Message-Id: <20210128082331.196801-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- tcg/tci.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 0e1b8e8383..438d712ea8 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -115,14 +115,6 @@ tci_write_reg(tcg_target_ulong *regs, TCGReg index, tcg_target_ulong value) regs[index] = value; } -#if TCG_TARGET_REG_BITS == 64 -static void -tci_write_reg32s(tcg_target_ulong *regs, TCGReg index, int32_t value) -{ - tci_write_reg(regs, index, value); -} -#endif - static void tci_write_reg8(tcg_target_ulong *regs, TCGReg index, uint8_t value) { tci_write_reg(regs, index, value); @@ -906,7 +898,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = *tb_ptr++; t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); - tci_write_reg32s(regs, t0, *(int32_t *)(t1 + t2)); + tci_write_reg(regs, t0, *(int32_t *)(t1 + t2)); break; case INDEX_op_ld_i64: t0 = *tb_ptr++; From patchwork Thu Jan 28 08:23:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372530 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp645871ejb; Thu, 28 Jan 2021 00:24:15 -0800 (PST) X-Google-Smtp-Source: ABdhPJyidG5gV7hmPjn8wHT+WnHJFOcg4BKutm5FEAYOCMt+i+Wzmnmhj6SAKBhI/7KC/7xzwgp6 X-Received: by 2002:a25:7c43:: with SMTP id x64mr23471543ybc.267.1611822255309; Thu, 28 Jan 2021 00:24:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611822255; cv=none; d=google.com; s=arc-20160816; b=Dn5aIxumQdXbOOpTIhWtmir+vT/AdyrkuX137ZXkA9z5V5R512L8SB84MvLFRQe9iY FkBf7wLWolbIHneskTCZY2SUtn4CgotbGkzV0VedTuXomBTVvgBiHPOeGmNxgawIK6mU hKgYIKRKQGvvLG+hywzLhRj5Bfq6/cQ48lBh+8qNW3yX4F+MY5wOvV948RGURRs0kVwy FJdzBTgPDZFfqT7XUVU+iL3nAWBqRHTS7k/i9Qnw14+gijMZgNjKg8fVMfxRLTE1QnTC njlaEsWB2+ZYdHQ465GsyOdIBM8cmvmd04ETTypWNAgqWtDc15yXdOnZbXvABbpxgLW0 JMzA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=l0eUP1VaXHMBkk451t+GkbylYNcWplkEv/ZGs0ScxGk=; b=prDd8nSCfhuk4fnFP/l1JEZL5/sg3LOhL/DgCznIVTRf7PN6wInSINeh4K7U4bqK8Y PHakWUMZrulo/Tx/IPktUFhCUqYWSXo0gxqdU4mVcCWpnaIHv+3QkhTTEyJ+RTMsyq/M OSTk03jvqQFMVRKoVPuIN+hk2flqARvKeFA7TCUCy+t+3yCs4XVCZHLNkgHRWQZynVKX KtsJxr5/ypCxZgGxdbi/wnDJ7H9gW8IWTn7CEytaCRWI27gxMjSXrGfDzX2MmajW5b7v /WXzEGyLCi/G1irtBzQCYDvh+l0Gc8R+/2dO9cMZl1Fo7q22Z7OQhVXf6el3v/DYx19j jhUw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="PRSI/+xA"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:23:46 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 07/23] tcg/tci: Inline tci_write_reg8 into its callers Date: Wed, 27 Jan 2021 22:23:15 -1000 Message-Id: <20210128082331.196801-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- tcg/tci.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 438d712ea8..7797558b2a 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -115,11 +115,6 @@ tci_write_reg(tcg_target_ulong *regs, TCGReg index, tcg_target_ulong value) regs[index] = value; } -static void tci_write_reg8(tcg_target_ulong *regs, TCGReg index, uint8_t value) -{ - tci_write_reg(regs, index, value); -} - static void tci_write_reg16(tcg_target_ulong *regs, TCGReg index, uint16_t value) { @@ -597,7 +592,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = *tb_ptr++; t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); - tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2)); + tci_write_reg(regs, t0, *(uint8_t *)(t1 + t2)); break; case INDEX_op_ld8s_i32: TODO(); @@ -871,7 +866,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = *tb_ptr++; t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); - tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2)); + tci_write_reg(regs, t0, *(uint8_t *)(t1 + t2)); break; case INDEX_op_ld8s_i64: t0 = *tb_ptr++; From patchwork Thu Jan 28 08:23:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372541 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp652925ejb; Thu, 28 Jan 2021 00:37:14 -0800 (PST) X-Google-Smtp-Source: ABdhPJw+VYbud3BjupSFb8WnRuVSqZhMah+Rp7kLNWDfoWio7BbUC6ZE6JHz4TY5iubsG35GkqFu X-Received: by 2002:a25:357:: with SMTP id 84mr23273406ybd.256.1611823033873; Thu, 28 Jan 2021 00:37:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611823033; cv=none; d=google.com; s=arc-20160816; b=hOEslUlYralKL1uKCGwUtN14d9Jiya7WwJY3A1Ab+iqCA6fProBYVN03T94QehIm1h oyVEQk0Ah9WIh1iozRC3RdL1IrBbzPWMWRoGDGaXqVk1ZPLS3Np9esPyGxCCSbGd57YP FF426WUX/HLGMqaQ1dhQISbNfZFp+x65ZWCLNgC70Y3tf1ZFMxAKsnHsRUdzDuWNpOB/ NQgVEBc+ItMgEMyjYUYhAdmI5pmtcV+4mkPLCpvn8rUKX2eBiLmDdRB6e4O7jc+kQ6rE QuZ1v4R5ZEHkVCNFMWqEuaLf+2HBZa5OkgrYoGpOkaEqJLVw3g2WVxyO7t95fuPwKKIm JFKg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=cOgrGYJ9ocKkQI1BJmncTz7ux/wby7mu15LsccKn+9k=; b=NIFwLi6Dy4NQnExnNELwdGvCCGPCBPoeMPMJR0LpfHb2lpVM43nQSMq9Qu3/a55JyO iyJxgqGpiUSKBSWns4Ate9uRXY3qdzr+hCVLoGQFgQd1xRTMkeIeE7qE/rM8lTj/7+jj sb2g/KWf8mlpMk5pfSulVbR0BceIMrjL5rMgH3qePnhSBIpKEc9lZvcic169icPL5CZZ BJBgcAnS/Lh7kBRTTFJd/vFmQ21zuH5Y+Rwp4rvIOPXzjREDEuyTvG6QNXEIXC5fPlBR TF/8v4yfOxBf4ldJTknrerhKqRO043iz7LbooMFgGVyN7s8Y6cMZSubahFf6sIXEonDa jy9A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HTvH6tlt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:23:47 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 08/23] tcg/tci: Inline tci_write_reg16 into the only caller Date: Wed, 27 Jan 2021 22:23:16 -1000 Message-Id: <20210128082331.196801-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- tcg/tci.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 7797558b2a..0b27f26cfb 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -115,12 +115,6 @@ tci_write_reg(tcg_target_ulong *regs, TCGReg index, tcg_target_ulong value) regs[index] = value; } -static void -tci_write_reg16(tcg_target_ulong *regs, TCGReg index, uint16_t value) -{ - tci_write_reg(regs, index, value); -} - static void tci_write_reg32(tcg_target_ulong *regs, TCGReg index, uint32_t value) { @@ -878,7 +872,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = *tb_ptr++; t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); - tci_write_reg16(regs, t0, *(uint16_t *)(t1 + t2)); + tci_write_reg(regs, t0, *(uint16_t *)(t1 + t2)); break; case INDEX_op_ld16s_i64: TODO(); From patchwork Thu Jan 28 08:23:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372535 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp648848ejb; Thu, 28 Jan 2021 00:30:08 -0800 (PST) X-Google-Smtp-Source: ABdhPJy/F7cS48qs4dPUTEFaY0zTJsfCuhWUkhCCq37gQWr/pg9hMdfm0zrighEXSiOBu8Ny8slU X-Received: by 2002:a25:6191:: with SMTP id v139mr10446088ybb.396.1611822607938; Thu, 28 Jan 2021 00:30:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611822607; cv=none; d=google.com; s=arc-20160816; b=xFQDH1a3VwWsWibmPWm8IgmBwPtZpyyryPVc4RoE/YXhOxg9z7g6bQ9XaL9GyZ0qJC wqF0ZJ2FGiwI7CsP/BAe7SmJ6nLBWiqbHyTj/S+r4C/nk4VxX9ZQi9iErY+pHp5MNMRc C85FtHfWWytl8wJzbA23Txg54dfrjAuL2EHErFZYpezL02P/uVGzzJASEfJH0przuVZ+ vi/thbOAhMPd3DTsoVWLJ03/yLa1ancykwksqitcMJkRGRKEBt4QcN57Vn9Az/kwrS+9 FVBbH2g9rp0i/kVHXJsgmB4tvNhMV2A071SVtnxWzipAqGlQWfUbNg6QpK1Itd65WzqW 35JA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=pvG/cWlHNORYY/HDoMp4ct94G02BusWJclWGSoO3BcE=; b=jG6zE2Ymq9d0C7BqlgYVATzATzNXll+JOb3w4nK/MsmH/9aLrHatM6Fv2ZAp/gAj2X bsow9vuWSMeEMrKzImPYKgiXfVMdHZOuqCN91yunqD20h/Ig0+/+pNNPza3IK2m2Hdyd EVVQRfnFTVZ4z1iGUAuKH4qYd4CCQ2FZmKL8kPJBc1q1It/0EnyCnAJeJ3H4DEr8H/OI 6T57E1pqFc+xXCDRQlD0mHeQfxs8fQHG9tEk8al1NsCAnqG5ZXnmcDtnoarGdWnaJbqo rEqrLmuXwk/+Ajc3WkDtk6e3n4Cwwo98Fh5Gu9sotvJdPqcdpAluuxhz7UeNQRfbpjTZ lkNw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FTEEHUgf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:23:49 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 09/23] tcg/tci: Inline tci_write_reg32 into all callers Date: Wed, 27 Jan 2021 22:23:17 -1000 Message-Id: <20210128082331.196801-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" For a 64-bit TCI, the upper bits of a 32-bit operation are undefined (much like a native ppc64 32-bit operation). It simplifies everything if we don't force-extend the result. Signed-off-by: Richard Henderson --- tcg/tci.c | 66 +++++++++++++++++++++++++------------------------------ 1 file changed, 30 insertions(+), 36 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 0b27f26cfb..f75971dd5e 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -115,12 +115,6 @@ tci_write_reg(tcg_target_ulong *regs, TCGReg index, tcg_target_ulong value) regs[index] = value; } -static void -tci_write_reg32(tcg_target_ulong *regs, TCGReg index, uint32_t value) -{ - tci_write_reg(regs, index, value); -} - #if TCG_TARGET_REG_BITS == 32 static void tci_write_reg64(tcg_target_ulong *regs, uint32_t high_index, uint32_t low_index, uint64_t value) @@ -550,7 +544,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t1 = tci_read_r32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); condition = *tb_ptr++; - tci_write_reg32(regs, t0, tci_compare32(t1, t2, condition)); + tci_write_reg(regs, t0, tci_compare32(t1, t2, condition)); break; #if TCG_TARGET_REG_BITS == 32 case INDEX_op_setcond2_i32: @@ -558,7 +552,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tmp64 = tci_read_r64(regs, &tb_ptr); v64 = tci_read_ri64(regs, &tb_ptr); condition = *tb_ptr++; - tci_write_reg32(regs, t0, tci_compare64(tmp64, v64, condition)); + tci_write_reg(regs, t0, tci_compare64(tmp64, v64, condition)); break; #elif TCG_TARGET_REG_BITS == 64 case INDEX_op_setcond_i64: @@ -572,12 +566,12 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, case INDEX_op_mov_i32: t0 = *tb_ptr++; t1 = tci_read_r32(regs, &tb_ptr); - tci_write_reg32(regs, t0, t1); + tci_write_reg(regs, t0, t1); break; case INDEX_op_tci_movi_i32: t0 = *tb_ptr++; t1 = tci_read_i32(&tb_ptr); - tci_write_reg32(regs, t0, t1); + tci_write_reg(regs, t0, t1); break; /* Load/store operations (32 bit). */ @@ -604,7 +598,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = *tb_ptr++; t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); - tci_write_reg32(regs, t0, *(uint32_t *)(t1 + t2)); + tci_write_reg(regs, t0, *(uint32_t *)(t1 + t2)); break; case INDEX_op_st8_i32: t0 = tci_read_r8(regs, &tb_ptr); @@ -632,44 +626,44 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); - tci_write_reg32(regs, t0, t1 + t2); + tci_write_reg(regs, t0, t1 + t2); break; case INDEX_op_sub_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); - tci_write_reg32(regs, t0, t1 - t2); + tci_write_reg(regs, t0, t1 - t2); break; case INDEX_op_mul_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); - tci_write_reg32(regs, t0, t1 * t2); + tci_write_reg(regs, t0, t1 * t2); break; #if TCG_TARGET_HAS_div_i32 case INDEX_op_div_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); - tci_write_reg32(regs, t0, (int32_t)t1 / (int32_t)t2); + tci_write_reg(regs, t0, (int32_t)t1 / (int32_t)t2); break; case INDEX_op_divu_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); - tci_write_reg32(regs, t0, t1 / t2); + tci_write_reg(regs, t0, t1 / t2); break; case INDEX_op_rem_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); - tci_write_reg32(regs, t0, (int32_t)t1 % (int32_t)t2); + tci_write_reg(regs, t0, (int32_t)t1 % (int32_t)t2); break; case INDEX_op_remu_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); - tci_write_reg32(regs, t0, t1 % t2); + tci_write_reg(regs, t0, t1 % t2); break; #elif TCG_TARGET_HAS_div2_i32 case INDEX_op_div2_i32: @@ -681,19 +675,19 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); - tci_write_reg32(regs, t0, t1 & t2); + tci_write_reg(regs, t0, t1 & t2); break; case INDEX_op_or_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); - tci_write_reg32(regs, t0, t1 | t2); + tci_write_reg(regs, t0, t1 | t2); break; case INDEX_op_xor_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); - tci_write_reg32(regs, t0, t1 ^ t2); + tci_write_reg(regs, t0, t1 ^ t2); break; /* Shift/rotate operations (32 bit). */ @@ -702,32 +696,32 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); - tci_write_reg32(regs, t0, t1 << (t2 & 31)); + tci_write_reg(regs, t0, t1 << (t2 & 31)); break; case INDEX_op_shr_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); - tci_write_reg32(regs, t0, t1 >> (t2 & 31)); + tci_write_reg(regs, t0, t1 >> (t2 & 31)); break; case INDEX_op_sar_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); - tci_write_reg32(regs, t0, ((int32_t)t1 >> (t2 & 31))); + tci_write_reg(regs, t0, ((int32_t)t1 >> (t2 & 31))); break; #if TCG_TARGET_HAS_rot_i32 case INDEX_op_rotl_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); - tci_write_reg32(regs, t0, rol32(t1, t2 & 31)); + tci_write_reg(regs, t0, rol32(t1, t2 & 31)); break; case INDEX_op_rotr_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); t2 = tci_read_ri32(regs, &tb_ptr); - tci_write_reg32(regs, t0, ror32(t1, t2 & 31)); + tci_write_reg(regs, t0, ror32(t1, t2 & 31)); break; #endif #if TCG_TARGET_HAS_deposit_i32 @@ -738,7 +732,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tmp16 = *tb_ptr++; tmp8 = *tb_ptr++; tmp32 = (((1 << tmp8) - 1) << tmp16); - tci_write_reg32(regs, t0, (t1 & ~tmp32) | ((t2 << tmp16) & tmp32)); + tci_write_reg(regs, t0, (t1 & ~tmp32) | ((t2 << tmp16) & tmp32)); break; #endif case INDEX_op_brcond_i32: @@ -790,56 +784,56 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, case INDEX_op_ext8s_i32: t0 = *tb_ptr++; t1 = tci_read_r8s(regs, &tb_ptr); - tci_write_reg32(regs, t0, t1); + tci_write_reg(regs, t0, t1); break; #endif #if TCG_TARGET_HAS_ext16s_i32 case INDEX_op_ext16s_i32: t0 = *tb_ptr++; t1 = tci_read_r16s(regs, &tb_ptr); - tci_write_reg32(regs, t0, t1); + tci_write_reg(regs, t0, t1); break; #endif #if TCG_TARGET_HAS_ext8u_i32 case INDEX_op_ext8u_i32: t0 = *tb_ptr++; t1 = tci_read_r8(regs, &tb_ptr); - tci_write_reg32(regs, t0, t1); + tci_write_reg(regs, t0, t1); break; #endif #if TCG_TARGET_HAS_ext16u_i32 case INDEX_op_ext16u_i32: t0 = *tb_ptr++; t1 = tci_read_r16(regs, &tb_ptr); - tci_write_reg32(regs, t0, t1); + tci_write_reg(regs, t0, t1); break; #endif #if TCG_TARGET_HAS_bswap16_i32 case INDEX_op_bswap16_i32: t0 = *tb_ptr++; t1 = tci_read_r16(regs, &tb_ptr); - tci_write_reg32(regs, t0, bswap16(t1)); + tci_write_reg(regs, t0, bswap16(t1)); break; #endif #if TCG_TARGET_HAS_bswap32_i32 case INDEX_op_bswap32_i32: t0 = *tb_ptr++; t1 = tci_read_r32(regs, &tb_ptr); - tci_write_reg32(regs, t0, bswap32(t1)); + tci_write_reg(regs, t0, bswap32(t1)); break; #endif #if TCG_TARGET_HAS_not_i32 case INDEX_op_not_i32: t0 = *tb_ptr++; t1 = tci_read_r32(regs, &tb_ptr); - tci_write_reg32(regs, t0, ~t1); + tci_write_reg(regs, t0, ~t1); break; #endif #if TCG_TARGET_HAS_neg_i32 case INDEX_op_neg_i32: t0 = *tb_ptr++; t1 = tci_read_r32(regs, &tb_ptr); - tci_write_reg32(regs, t0, -t1); + tci_write_reg(regs, t0, -t1); break; #endif #if TCG_TARGET_REG_BITS == 64 @@ -881,7 +875,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = *tb_ptr++; t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); - tci_write_reg32(regs, t0, *(uint32_t *)(t1 + t2)); + tci_write_reg(regs, t0, *(uint32_t *)(t1 + t2)); break; case INDEX_op_ld32s_i64: t0 = *tb_ptr++; From patchwork Thu Jan 28 08:23:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372542 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp653035ejb; Thu, 28 Jan 2021 00:37:25 -0800 (PST) X-Google-Smtp-Source: ABdhPJyAy4TE3qlbjQnm+1MPwvDpGoEBjnFDIw0xlxpLz5kCYqnFDUVS6xznwJKLhbKPDA0oHMT+ X-Received: by 2002:a25:2e06:: with SMTP id u6mr20507452ybu.158.1611823045703; Thu, 28 Jan 2021 00:37:25 -0800 (PST) ARC-Seal: i=1; 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:23:51 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 10/23] tcg/tci: Inline tci_write_reg64 into 64-bit callers Date: Wed, 27 Jan 2021 22:23:18 -1000 Message-Id: <20210128082331.196801-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Note that we had two functions of the same name: a 32-bit version which took two register numbers and a 64-bit version which was a no-op wrapper for tcg_write_reg. After this, we are left with only the 32-bit version. Signed-off-by: Richard Henderson --- tcg/tci.c | 60 +++++++++++++++++++++++++------------------------------ 1 file changed, 27 insertions(+), 33 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index f75971dd5e..864771d91b 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -122,12 +122,6 @@ static void tci_write_reg64(tcg_target_ulong *regs, uint32_t high_index, tci_write_reg(regs, low_index, value); tci_write_reg(regs, high_index, value >> 32); } -#elif TCG_TARGET_REG_BITS == 64 -static void -tci_write_reg64(tcg_target_ulong *regs, TCGReg index, uint64_t value) -{ - tci_write_reg(regs, index, value); -} #endif #if TCG_TARGET_REG_BITS == 32 @@ -560,7 +554,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t1 = tci_read_r64(regs, &tb_ptr); t2 = tci_read_ri64(regs, &tb_ptr); condition = *tb_ptr++; - tci_write_reg64(regs, t0, tci_compare64(t1, t2, condition)); + tci_write_reg(regs, t0, tci_compare64(t1, t2, condition)); break; #endif case INDEX_op_mov_i32: @@ -840,12 +834,12 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, case INDEX_op_mov_i64: t0 = *tb_ptr++; t1 = tci_read_r64(regs, &tb_ptr); - tci_write_reg64(regs, t0, t1); + tci_write_reg(regs, t0, t1); break; case INDEX_op_tci_movi_i64: t0 = *tb_ptr++; t1 = tci_read_i64(&tb_ptr); - tci_write_reg64(regs, t0, t1); + tci_write_reg(regs, t0, t1); break; /* Load/store operations (64 bit). */ @@ -887,7 +881,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = *tb_ptr++; t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); - tci_write_reg64(regs, t0, *(uint64_t *)(t1 + t2)); + tci_write_reg(regs, t0, *(uint64_t *)(t1 + t2)); break; case INDEX_op_st8_i64: t0 = tci_read_r8(regs, &tb_ptr); @@ -921,19 +915,19 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = *tb_ptr++; t1 = tci_read_ri64(regs, &tb_ptr); t2 = tci_read_ri64(regs, &tb_ptr); - tci_write_reg64(regs, t0, t1 + t2); + tci_write_reg(regs, t0, t1 + t2); break; case INDEX_op_sub_i64: t0 = *tb_ptr++; t1 = tci_read_ri64(regs, &tb_ptr); t2 = tci_read_ri64(regs, &tb_ptr); - tci_write_reg64(regs, t0, t1 - t2); + tci_write_reg(regs, t0, t1 - t2); break; case INDEX_op_mul_i64: t0 = *tb_ptr++; t1 = tci_read_ri64(regs, &tb_ptr); t2 = tci_read_ri64(regs, &tb_ptr); - tci_write_reg64(regs, t0, t1 * t2); + tci_write_reg(regs, t0, t1 * t2); break; #if TCG_TARGET_HAS_div_i64 case INDEX_op_div_i64: @@ -952,19 +946,19 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = *tb_ptr++; t1 = tci_read_ri64(regs, &tb_ptr); t2 = tci_read_ri64(regs, &tb_ptr); - tci_write_reg64(regs, t0, t1 & t2); + tci_write_reg(regs, t0, t1 & t2); break; case INDEX_op_or_i64: t0 = *tb_ptr++; t1 = tci_read_ri64(regs, &tb_ptr); t2 = tci_read_ri64(regs, &tb_ptr); - tci_write_reg64(regs, t0, t1 | t2); + tci_write_reg(regs, t0, t1 | t2); break; case INDEX_op_xor_i64: t0 = *tb_ptr++; t1 = tci_read_ri64(regs, &tb_ptr); t2 = tci_read_ri64(regs, &tb_ptr); - tci_write_reg64(regs, t0, t1 ^ t2); + tci_write_reg(regs, t0, t1 ^ t2); break; /* Shift/rotate operations (64 bit). */ @@ -973,32 +967,32 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = *tb_ptr++; t1 = tci_read_ri64(regs, &tb_ptr); t2 = tci_read_ri64(regs, &tb_ptr); - tci_write_reg64(regs, t0, t1 << (t2 & 63)); + tci_write_reg(regs, t0, t1 << (t2 & 63)); break; case INDEX_op_shr_i64: t0 = *tb_ptr++; t1 = tci_read_ri64(regs, &tb_ptr); t2 = tci_read_ri64(regs, &tb_ptr); - tci_write_reg64(regs, t0, t1 >> (t2 & 63)); + tci_write_reg(regs, t0, t1 >> (t2 & 63)); break; case INDEX_op_sar_i64: t0 = *tb_ptr++; t1 = tci_read_ri64(regs, &tb_ptr); t2 = tci_read_ri64(regs, &tb_ptr); - tci_write_reg64(regs, t0, ((int64_t)t1 >> (t2 & 63))); + tci_write_reg(regs, t0, ((int64_t)t1 >> (t2 & 63))); break; #if TCG_TARGET_HAS_rot_i64 case INDEX_op_rotl_i64: t0 = *tb_ptr++; t1 = tci_read_ri64(regs, &tb_ptr); t2 = tci_read_ri64(regs, &tb_ptr); - tci_write_reg64(regs, t0, rol64(t1, t2 & 63)); + tci_write_reg(regs, t0, rol64(t1, t2 & 63)); break; case INDEX_op_rotr_i64: t0 = *tb_ptr++; t1 = tci_read_ri64(regs, &tb_ptr); t2 = tci_read_ri64(regs, &tb_ptr); - tci_write_reg64(regs, t0, ror64(t1, t2 & 63)); + tci_write_reg(regs, t0, ror64(t1, t2 & 63)); break; #endif #if TCG_TARGET_HAS_deposit_i64 @@ -1009,7 +1003,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tmp16 = *tb_ptr++; tmp8 = *tb_ptr++; tmp64 = (((1ULL << tmp8) - 1) << tmp16); - tci_write_reg64(regs, t0, (t1 & ~tmp64) | ((t2 << tmp16) & tmp64)); + tci_write_reg(regs, t0, (t1 & ~tmp64) | ((t2 << tmp16) & tmp64)); break; #endif case INDEX_op_brcond_i64: @@ -1027,28 +1021,28 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, case INDEX_op_ext8u_i64: t0 = *tb_ptr++; t1 = tci_read_r8(regs, &tb_ptr); - tci_write_reg64(regs, t0, t1); + tci_write_reg(regs, t0, t1); break; #endif #if TCG_TARGET_HAS_ext8s_i64 case INDEX_op_ext8s_i64: t0 = *tb_ptr++; t1 = tci_read_r8s(regs, &tb_ptr); - tci_write_reg64(regs, t0, t1); + tci_write_reg(regs, t0, t1); break; #endif #if TCG_TARGET_HAS_ext16s_i64 case INDEX_op_ext16s_i64: t0 = *tb_ptr++; t1 = tci_read_r16s(regs, &tb_ptr); - tci_write_reg64(regs, t0, t1); + tci_write_reg(regs, t0, t1); break; #endif #if TCG_TARGET_HAS_ext16u_i64 case INDEX_op_ext16u_i64: t0 = *tb_ptr++; t1 = tci_read_r16(regs, &tb_ptr); - tci_write_reg64(regs, t0, t1); + tci_write_reg(regs, t0, t1); break; #endif #if TCG_TARGET_HAS_ext32s_i64 @@ -1057,7 +1051,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, case INDEX_op_ext_i32_i64: t0 = *tb_ptr++; t1 = tci_read_r32s(regs, &tb_ptr); - tci_write_reg64(regs, t0, t1); + tci_write_reg(regs, t0, t1); break; #if TCG_TARGET_HAS_ext32u_i64 case INDEX_op_ext32u_i64: @@ -1065,41 +1059,41 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, case INDEX_op_extu_i32_i64: t0 = *tb_ptr++; t1 = tci_read_r32(regs, &tb_ptr); - tci_write_reg64(regs, t0, t1); + tci_write_reg(regs, t0, t1); break; #if TCG_TARGET_HAS_bswap16_i64 case INDEX_op_bswap16_i64: t0 = *tb_ptr++; t1 = tci_read_r16(regs, &tb_ptr); - tci_write_reg64(regs, t0, bswap16(t1)); + tci_write_reg(regs, t0, bswap16(t1)); break; #endif #if TCG_TARGET_HAS_bswap32_i64 case INDEX_op_bswap32_i64: t0 = *tb_ptr++; t1 = tci_read_r32(regs, &tb_ptr); - tci_write_reg64(regs, t0, bswap32(t1)); + tci_write_reg(regs, t0, bswap32(t1)); break; #endif #if TCG_TARGET_HAS_bswap64_i64 case INDEX_op_bswap64_i64: t0 = *tb_ptr++; t1 = tci_read_r64(regs, &tb_ptr); - tci_write_reg64(regs, t0, bswap64(t1)); + tci_write_reg(regs, t0, bswap64(t1)); break; #endif #if TCG_TARGET_HAS_not_i64 case INDEX_op_not_i64: t0 = *tb_ptr++; t1 = tci_read_r64(regs, &tb_ptr); - tci_write_reg64(regs, t0, ~t1); + tci_write_reg(regs, t0, ~t1); break; #endif #if TCG_TARGET_HAS_neg_i64 case INDEX_op_neg_i64: t0 = *tb_ptr++; t1 = tci_read_r64(regs, &tb_ptr); - tci_write_reg64(regs, t0, -t1); + tci_write_reg(regs, t0, -t1); break; #endif #endif /* TCG_TARGET_REG_BITS == 64 */ From patchwork Thu Jan 28 08:23:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372538 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp650961ejb; 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:23:52 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 11/23] tcg/tci: Merge INDEX_op_ld8u_{i32,i64} Date: Wed, 27 Jan 2021 22:23:19 -1000 Message-Id: <20210128082331.196801-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- tcg/tci.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 864771d91b..019035d52f 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -571,6 +571,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, /* Load/store operations (32 bit). */ case INDEX_op_ld8u_i32: + case INDEX_op_ld8u_i64: t0 = *tb_ptr++; t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); @@ -844,12 +845,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, /* Load/store operations (64 bit). */ - case INDEX_op_ld8u_i64: - t0 = *tb_ptr++; - t1 = tci_read_r(regs, &tb_ptr); - t2 = tci_read_s32(&tb_ptr); - tci_write_reg(regs, t0, *(uint8_t *)(t1 + t2)); - break; case INDEX_op_ld8s_i64: t0 = *tb_ptr++; t1 = tci_read_r(regs, &tb_ptr); From patchwork Thu Jan 28 08:23:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372546 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp654889ejb; Thu, 28 Jan 2021 00:40:48 -0800 (PST) X-Google-Smtp-Source: ABdhPJy5jZQksBSLE4TtVzow8i+1IjTgoiJ8oqroerbP3jk3JOhAGLux7BCN6Y2gqoVgPRCBaN0L X-Received: by 2002:a25:718b:: with SMTP id m133mr3250433ybc.412.1611823248596; Thu, 28 Jan 2021 00:40:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611823248; cv=none; d=google.com; s=arc-20160816; b=BXnZKxhmgaYVwfWKFpejjvRBVTdbfKyX/e6RKJpwNAbWNvPfU8spRK+126RoMV9ILM LGaKJ58MSh4OYTX6AfuaUgmR9iAtNhHIbWagWqJaEmQLBOgw3PAJOrUp9cx2YfkSz+wT l34dITsBEmWKwD95VpY3iLC+DolcFjV2jtjOniu//pUzwkjOoso8mWQEBYsuRQCSUt+P cl/NwYztp22/73rWCMmerE9vt+sjLT2M7ssI/idYQ0RoNajSG/A3ju4w52/byPdowpxC A5auqhCipR34nsRU9NUl9OLNvMQkBfvT/BlAS/zYJGAw+nezrqHHrm0zQyQVM/ya6Xes d4Jg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=lFaT0dC4rp7zkvcUUlivssdk4QAkUEVBjOL/yrkJyPY=; b=Cjz6ewJbXrTwu7Kt1nZ86oy2kyF13H/fPzberLh93NZI+jdtMeLtOM1beDtDYvXSjF 2cSpgiIb4aB01DGGeQg50q5Jw0v23n5zmV3xwAPbdE/AkHymlDbWTuBCg0ELJeNvAajH oyeQcqr+8U41nkQ/Sap2iWMKnjELoOHsGoM2Q6n3dEdz9jK98OC6vyEW7r9n9MmKg5o5 xsAyf1F+wVX6NalMTM5bMFTcCDjDjyXRG6U1CT+0T5My5o2xKtesL/c+OVEG9Qfbfy8J glQJWah/pAONJkIg8y3KdjJA1Jjtz29weQFXcC/FhW7s7qDYR7IM13wSLSXEFjJI1yrI ZX6A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LHHgzj0j; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:23:54 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 12/23] tcg/tci: Merge INDEX_op_ld8s_{i32,i64} Date: Wed, 27 Jan 2021 22:23:20 -1000 Message-Id: <20210128082331.196801-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::536; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Eliminating a TODO for ld8s_i32. Signed-off-by: Richard Henderson --- tcg/tci.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 019035d52f..7d11982eb2 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -578,7 +578,11 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tci_write_reg(regs, t0, *(uint8_t *)(t1 + t2)); break; case INDEX_op_ld8s_i32: - TODO(); + case INDEX_op_ld8s_i64: + t0 = *tb_ptr++; + t1 = tci_read_r(regs, &tb_ptr); + t2 = tci_read_s32(&tb_ptr); + tci_write_reg(regs, t0, *(int8_t *)(t1 + t2)); break; case INDEX_op_ld16u_i32: TODO(); @@ -845,12 +849,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, /* Load/store operations (64 bit). */ - case INDEX_op_ld8s_i64: - t0 = *tb_ptr++; - t1 = tci_read_r(regs, &tb_ptr); - t2 = tci_read_s32(&tb_ptr); - tci_write_reg(regs, t0, *(int8_t *)(t1 + t2)); - break; case INDEX_op_ld16u_i64: t0 = *tb_ptr++; t1 = tci_read_r(regs, &tb_ptr); From patchwork Thu Jan 28 08:23:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372540 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp652892ejb; Thu, 28 Jan 2021 00:37:12 -0800 (PST) X-Google-Smtp-Source: ABdhPJwdD7pDveIvf/e5ZsXp3n0EdyURlE2Xhu9h9Y2FA7hv7qbiFxw9blHekWDbJ1KUkTSHhwnX X-Received: by 2002:a25:4fd6:: with SMTP id d205mr8314104ybb.145.1611823032114; Thu, 28 Jan 2021 00:37:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611823032; cv=none; d=google.com; s=arc-20160816; b=paiqzcUb7HmGLyXtakVoqtlB4sf7Oy4dDUy3y4Zwrw8y0bcergHtGSRjX8h+rYOvco yZoAm+T61QHzYzdh8RmBp9uyWeOdJz2w7m9rzK6tfV2EGDE5m7yuuvRZk+T82MWYg1Dx MFAQJXHRS+o5X0lGXBaFo6IOGsxj3lw8HuqtHpwrG75/em+hndreJmT19dZhCaEHyWe8 lzTnDLbB2LNmoKI3QxQZhL1OpQPIa6FE0kdZHRs8MO9TyBw87b3kt7ZuSjUUWct57dEU gblaPYRBFQjRcu15ohsFJm2U2iqGlEmdYq2Bu3PUqxH2voGmk69KO0Rxjz+LBOIx8F2E MhHQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=hRd34LGil31wVPd8eDU4MGOPOaZrbwDGq6Woxhcr11M=; b=Kf6rQZ1Tl3aZRVMkNA5WYNX6sudxWJ7U7MBV9r9EY3T+qweUWvrgjU7KqueOHQWuFi DQ+Wc77SCSgu4/N2WW+pA1Vp3UL41bkZhJp6bOe6UzIYlSIJHbAM250A3Df/Maqt0oVF ypzqezq9agRa//lc60zBbcHP8Mu18d9ANkalVFnIjZcU0MJ8sozUuLdb3aa5SM53q1h1 jqat8CgiEQGbQaRkhxO1P7coh1KaQTwBlQt0uIwJCiCW3WP5RJd2ZvxfevtM0XWbXqmB oOHLwvw7oDaCkE0CPDabXUrEQGs5vv3a6RXw0gO0f3991y1GlOKRLcYPkzqSbqsVVrNG PB2w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=W0WQfTed; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:23:55 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 13/23] tcg/tci: Merge INDEX_op_ld16u_{i32,i64} Date: Wed, 27 Jan 2021 22:23:21 -1000 Message-Id: <20210128082331.196801-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::530; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Eliminating a TODO for ld16u_i32. Signed-off-by: Richard Henderson --- tcg/tci.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 7d11982eb2..d197803dca 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -585,7 +585,11 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tci_write_reg(regs, t0, *(int8_t *)(t1 + t2)); break; case INDEX_op_ld16u_i32: - TODO(); + case INDEX_op_ld16u_i64: + t0 = *tb_ptr++; + t1 = tci_read_r(regs, &tb_ptr); + t2 = tci_read_s32(&tb_ptr); + tci_write_reg(regs, t0, *(uint16_t *)(t1 + t2)); break; case INDEX_op_ld16s_i32: t0 = *tb_ptr++; @@ -849,12 +853,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, /* Load/store operations (64 bit). */ - case INDEX_op_ld16u_i64: - t0 = *tb_ptr++; - t1 = tci_read_r(regs, &tb_ptr); - t2 = tci_read_s32(&tb_ptr); - tci_write_reg(regs, t0, *(uint16_t *)(t1 + t2)); - break; case INDEX_op_ld16s_i64: TODO(); break; From patchwork Thu Jan 28 08:23:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372547 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp655910ejb; Thu, 28 Jan 2021 00:42:55 -0800 (PST) X-Google-Smtp-Source: ABdhPJyH1V26Ms4u51LbJkj8MzL6LHYXkM+IpArhuzmO3HJ7obsd04J9zWdY7kmqxLrBRnVJLEmb X-Received: by 2002:a25:bbcf:: with SMTP id c15mr21149600ybk.418.1611823375334; Thu, 28 Jan 2021 00:42:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611823375; cv=none; d=google.com; s=arc-20160816; b=evuGNwzGkoaDqyChtD+Sv/q/rDw078aV6f3KKXkf9rm0UWJZy+r8E2CBvk6vYmcZKV evOZpnO9otf/725eE28G5gO2sK/nI69o8k43wC4PShhZ027rMzj6DultjPTcOezdRR0T QdGLtSr9arssGNPFgzidPVLCRhVDZrD8IEyKRJWoMStgaJb5BmdEi4HWuUJLSTh1GqJK w5VmAiLpX0rwRP1YFW9OYfHtRqYQFXxCfvsXBo6dV85mh/MZm1FL7kAKNyT5um4vNqdO MKNyaFik0K2RPAi+pDDnxpWsHKlEMYjtc29FNQ7hAis2COxCtnPcZk3eoaQfSVeO4I0C 18rg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Q83BJIWsR5r5VZKO+D5Uu4FbRZzfyeYfyyPPiEe0tU8=; b=adiPlk9WiG2d/K/KlZVmhMHEoATbC8tNZPX9D8pjzRbsgTiX1guRLeAyEEIwcUSPT/ /3enFroLIqH1lvfHMJV3tz28Xq/aVp/ptNcK51J0cVskoA5oo1i4aXqpL8QkSsWXy6g6 ZO1f5+2CXdvS8Pafi3UARVfJOfpKf2SDEjJyje+9XTHK5xVGBIvwti9A3kFhrdlQwIJH /nM3z37zeGXQdG5/qOcmLo/mrnJbP/f07US6ak/vHsoyRBu6s7fMhtmWNujdA9cTlcrB SS+ZjQfbpDg9V8kEtnVwdIwrwRxkPvRxjXkgumzxMnjC1cJTfkZah6foPdSoMo4x1Oda Pd2A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=y1Nc7WCP; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:23:57 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 14/23] tcg/tci: Merge INDEX_op_ld16s_{i32,i64} Date: Wed, 27 Jan 2021 22:23:22 -1000 Message-Id: <20210128082331.196801-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Eliminating a TODO for ld16s_i64. Signed-off-by: Richard Henderson --- tcg/tci.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index d197803dca..95625701bb 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -592,6 +592,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tci_write_reg(regs, t0, *(uint16_t *)(t1 + t2)); break; case INDEX_op_ld16s_i32: + case INDEX_op_ld16s_i64: t0 = *tb_ptr++; t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); @@ -853,9 +854,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, /* Load/store operations (64 bit). */ - case INDEX_op_ld16s_i64: - TODO(); - break; case INDEX_op_ld32u_i64: t0 = *tb_ptr++; t1 = tci_read_r(regs, &tb_ptr); From patchwork Thu Jan 28 08:23:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372548 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp657279ejb; Thu, 28 Jan 2021 00:45:37 -0800 (PST) X-Google-Smtp-Source: ABdhPJyr2tX8h3HqFMcV5m4mmofQf2z0kt/JHZJ7VrxCnzCpURMhCDifTdZmPM2ZZfouKvFEqbn5 X-Received: by 2002:a25:bc52:: with SMTP id d18mr22369256ybk.331.1611823537019; Thu, 28 Jan 2021 00:45:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611823537; cv=none; d=google.com; s=arc-20160816; b=v5TADHdIb2abLoWA8EgEuTGqgniswoJMADEAWOFoh/xANcgZql5I+dyF8PSUX5VGyH dvy3LxtYHwu1C9IC5hZaYrlZUeFAc6NbVgHOy9WL+6ZrsCsAm0dHBkvZtR6mpO8UlNW4 FvRB6ooEtJzP5w6blivy5QGAZwDYoS6UZuoIECSDUh5qB4q7CecEyK34eu4Q00DxeC4O SNvC/Xj2iLTxnVbaYWOwZVPQNw4wZ+9lhVhq5OAcEKygRYvcJGRxrbctolD2ng+EAp/X ffYR9dpO1I1xFRaWmsLz+4M0wjb5T8BjxpsZUOYRs8BV7dM/wW0FukYNjpTYvLHnVDRn yTdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=rBCcLumWniM/+fC/4eU8EcpSrpup7jHrRf0ZPnvW8R4=; b=dLCgNm55U2FA4oJBrEWmvrxfAjrxcfzV19INPZxT12/Q8WQtEDyPuWCpWORQ1SrqW6 KZUGDY5ZE4CUiStse83BiCAn5db8vJOBEjfIu7FZiiHrU4MnZQ0iPQFyMfncKImpkC6Y TqUOxMRenX26yy9xqGx3jkjZP//neSeMx3VDPI961V0UX3lP6zsR5O5DcRuyaEyrIgeL OVhAwa1zfzB6rsIdOZ3OFbZ2TGAau3tMYrMqDTon8jQBjComSXRLJtva2pk8yygzOtyI Kl6MEaf1PNsdu5VVkNzUNrXgactz/EqOAPGJ738c/a9/Mq4iXxhkSngSUApm+GQ6Oo7P uI8Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=D9HkyJHD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:23:58 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 15/23] tcg/tci: Merge INDEX_op_{ld_i32,ld32u_i64} Date: Wed, 27 Jan 2021 22:23:23 -1000 Message-Id: <20210128082331.196801-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- tcg/tci.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 95625701bb..233fc0604e 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -599,6 +599,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tci_write_reg(regs, t0, *(int16_t *)(t1 + t2)); break; case INDEX_op_ld_i32: + case INDEX_op_ld32u_i64: t0 = *tb_ptr++; t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); @@ -854,12 +855,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, /* Load/store operations (64 bit). */ - case INDEX_op_ld32u_i64: - t0 = *tb_ptr++; - t1 = tci_read_r(regs, &tb_ptr); - t2 = tci_read_s32(&tb_ptr); - tci_write_reg(regs, t0, *(uint32_t *)(t1 + t2)); - break; case INDEX_op_ld32s_i64: t0 = *tb_ptr++; t1 = tci_read_r(regs, &tb_ptr); From patchwork Thu Jan 28 08:23:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372536 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp648849ejb; Thu, 28 Jan 2021 00:30:08 -0800 (PST) X-Google-Smtp-Source: ABdhPJxJ/hduFYDr1FVQEHKN1F6D8etLwLRGfCE7QQw5NbD3LdQSdOmh0EYi1pyhkVeTjMolUPGf X-Received: by 2002:a25:1d86:: with SMTP id d128mr4543894ybd.278.1611822607947; Thu, 28 Jan 2021 00:30:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611822607; cv=none; d=google.com; s=arc-20160816; b=QhYXsxHhQJLuRHmkxXtKf1pKUAiWtA4Hsfld6T8Glud0rg5jSxqeD/rv0KaTmUpCt7 1J7E5Ywi6IKrvbInK+fskf286I36MB4hRddJr67vm4ed2LRFLie7hOTrKcwEbHIdypqk ZB4yITn3xZ88jf0DMuIx5NdgS/HoKGXZ7UTlZnfnFeM9kv0qsO2DlXl1aaj6qXENFzaf 73Sw4jhJkV+nJ3TeBLfd0ZGdw9bP2dsTtkgfttjTNSCf2Zndp5+EVguC+GQtA7Jr4Mii BdvIEG0+Ui5084uwR9NVPzWMWBUVoKwbECsEN2/HvkrvL0MC37sRx7BxWFXiMGpzScuT rSLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=PGD2Hxxva1v/CL+/7AMsseVrS1hfbb671q8VvUewR3Q=; b=MBpU5MxvWc8xKWrrS7Y5Heudf1nkCPTUjctAV1+a87+xtxfP9bFk1qfLl7ESOwJBqg B4T45NnpMfCEqktIJMtRz0dBNZ/CMr9BQ9k1uphI+fJau5d1HU5sm5DC/6vvJ1gE8d8X mQaAZ7woylKveNPy7rn0TRw/ueQ7mngIJuH56BmAz9wcYASUxKBGU5BaxYGxbSDywwNR LfElkHyfBBw7ZTEtMsCe6/UZqbpJofX5Nt60eyicuXzbE6HSACRwaNgfnJgKTabDGekJ ap1TdhgcPE2syoyrD65GQUt9tkRJBytPpZyZo0iqGkuLX2AoiWfFemNc7fmGrJ34HxKn 9hCw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kbJIjotX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.23.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:24:00 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 16/23] tcg/tci: Merge INDEX_op_st8_{i32,i64} Date: Wed, 27 Jan 2021 22:23:24 -1000 Message-Id: <20210128082331.196801-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- tcg/tci.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 233fc0604e..0978a5c554 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -606,6 +606,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tci_write_reg(regs, t0, *(uint32_t *)(t1 + t2)); break; case INDEX_op_st8_i32: + case INDEX_op_st8_i64: t0 = tci_read_r8(regs, &tb_ptr); t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); @@ -867,12 +868,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t2 = tci_read_s32(&tb_ptr); tci_write_reg(regs, t0, *(uint64_t *)(t1 + t2)); break; - case INDEX_op_st8_i64: - t0 = tci_read_r8(regs, &tb_ptr); - t1 = tci_read_r(regs, &tb_ptr); - t2 = tci_read_s32(&tb_ptr); - *(uint8_t *)(t1 + t2) = t0; - break; case INDEX_op_st16_i64: t0 = tci_read_r16(regs, &tb_ptr); t1 = tci_read_r(regs, &tb_ptr); From patchwork Thu Jan 28 08:23:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372549 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp1030059jam; Thu, 28 Jan 2021 00:48:04 -0800 (PST) X-Google-Smtp-Source: ABdhPJx8PTInzF5P/JCX75UcpwXdQ3y0mybgg3ZRz/UbhCSag9uw0xfqQvUa3JN6jxtXIAQRi9ay X-Received: by 2002:a25:6f85:: with SMTP id k127mr22372576ybc.127.1611823683748; Thu, 28 Jan 2021 00:48:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611823683; cv=none; d=google.com; s=arc-20160816; b=xES9uZnQGCLHHb13LyBhRsElP9vEqWUvYB2brg33KUgb9xVGMTneOfvJUSfY3uWra2 fCxXlXq7EZHqoO0etsVoIsaTpmgl9rCjOHyyOCR6pa+RsV26tNqK2wssHgoV2OhzW7if zrVuMOLwuvpdbHLut3AX4uTJa8I+AyWPEVC3LcBxz1EJ/yuib49itmIx8SnypI3cIGpY gsskxzcr4zHS+RU7ppMxq/kp3a+uaILShSxlsDEtJf/0t5JhTsZCFAKw8WJuB9d7ft/y 98u0WD3KzxyBTcsmcQdtwb0cfcp9L0UdwJLZq5FvXrjE30zyPcbyY4r4Lj0pUPLgTLaD +ZMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=huDZUDnwZEbcEx1xTqJKL+fBHu7QT2Tcumuy/oBbgvo=; b=waK2bQupQC3wMZmmtelmi0vERJcQIrrize2S37dkh5DOPvkxws6Er/0xxbDvcl0Zlf pVkILde2Aj2ZzYM1h/LrgVuPICqDqhj9sDEyYxQ0Og2P2OTo/oRT5SpQX3tZ0rgJUVKk PPw6BvxqowXsPL8GqsgDSFjrywhId5NLHij5cu6TC84hlook1ctx03mNrMyAZGZ6j6AF 17Itpwale8dW/5An2DZaFQFdhm6sR6z+UlziIo/s4f2q8by7ruYcLS31dx/BeKEJBBT1 PtmluWqkTdVYyIB2BuUyDsQHpCnSvdUEXZ3img/qxsqr6SscVFLY+NDOUvXQqJksYA91 dM4Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=d1HYdIxN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.24.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:24:01 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 17/23] tcg/tci: Merge INDEX_op_st16_{i32,i64} Date: Wed, 27 Jan 2021 22:23:25 -1000 Message-Id: <20210128082331.196801-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- tcg/tci.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 0978a5c554..67875636a5 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -613,6 +613,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, *(uint8_t *)(t1 + t2) = t0; break; case INDEX_op_st16_i32: + case INDEX_op_st16_i64: t0 = tci_read_r16(regs, &tb_ptr); t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); @@ -868,12 +869,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t2 = tci_read_s32(&tb_ptr); tci_write_reg(regs, t0, *(uint64_t *)(t1 + t2)); break; - case INDEX_op_st16_i64: - t0 = tci_read_r16(regs, &tb_ptr); - t1 = tci_read_r(regs, &tb_ptr); - t2 = tci_read_s32(&tb_ptr); - *(uint16_t *)(t1 + t2) = t0; - break; case INDEX_op_st32_i64: t0 = tci_read_r32(regs, &tb_ptr); t1 = tci_read_r(regs, &tb_ptr); From patchwork Thu Jan 28 08:23:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372550 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp1030524jam; Thu, 28 Jan 2021 00:49:08 -0800 (PST) X-Google-Smtp-Source: ABdhPJwEMeOf6Ge7z7dQvQSsC11tjCFgrQuERy6ZImff9sy4+LkNVMfOiZ9ok+qdJTHUlFy+xB2l X-Received: by 2002:a05:6902:6b0:: with SMTP id j16mr20645472ybt.169.1611823747892; Thu, 28 Jan 2021 00:49:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611823747; cv=none; d=google.com; s=arc-20160816; b=TAWRsaWVBkevb6250jPibWyXfhDeGzhlNU+BIRAJhyD5Pmuli3aMH4f8B+24p1nbqX C9IxM9RsSRf1vC9vtHDPIUC5n9gM7DjDncG+0fz5C4ohTI5Hu7Jizdlna9MGdkqxhK2Q loYM4nIPyR3udmHiGG6AJnhTO16YkSlU4Qp7mGBvOVtLZQtAtyTPeyacK++6FHofR7bT xfgs3k1mzX6OlZAr8UXlTlARP5FJYj/3ZGHeIg3qGH/LH+U6DSZSweTtCS0LlfkDYIeL D/68ibphxOE3sSDXekrbk3DMMabwRvY76XEImufaUFcJ5z9n2yTtX0rG/iTFandPwuZP fjjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=I2gmOz73yZNbJmL9p/xulaMICRegraILH4xJB4rgp4E=; b=dLUWS6fcoeTTLX0ke4h0qLOtViBqpkMP5nMC5sIoe7G0R19u/TAYQt/CW6VHfaO6M1 GdzqAPyCRUNa3erHk/A59lNLbUGqsKgkxAeBm/yqEY9k3xZNzOkHBH5pAfm0DaVgwrRH 2CNJZcdulpZWOlXRztEOlorCEW/68goNe9oPzmrpN2qRl41lHcLBd9o08gukyQDlV0Y1 EIWcNm97MmXIOs+TtzL4kBdSsSblmSro7u/LLB6DF/s5VNksX37BZM1bq1rIYDcfyFXy W9BEMLUyELw67ZwsOXOvyaUIRH04SG0xa/1dr0wRhvPAEk3E7SwJkMOx1iEtQCi8Q4k+ yl+g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HrEGWN1e; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.24.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:24:03 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 18/23] tcg/tci: Move stack bounds check to compile-time Date: Wed, 27 Jan 2021 22:23:26 -1000 Message-Id: <20210128082331.196801-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The existing check was incomplete: (1) Only applied to two of the 7 stores, and not to the loads at all. (2) Only checked the upper, but not the lower bound of the stack. Doing this at compile time means that we don't need to do it at runtime as well. Signed-off-by: Richard Henderson --- tcg/tci.c | 2 -- tcg/tci/tcg-target.c.inc | 13 +++++++++++++ 2 files changed, 13 insertions(+), 2 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 67875636a5..c4c303f874 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -623,7 +623,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = tci_read_r32(regs, &tb_ptr); t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); - tci_assert(t1 != sp_value || (int32_t)t2 < 0); *(uint32_t *)(t1 + t2) = t0; break; @@ -879,7 +878,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = tci_read_r64(regs, &tb_ptr); t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); - tci_assert(t1 != sp_value || (int32_t)t2 < 0); *(uint64_t *)(t1 + t2) = t0; break; diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 15981265db..a60fa524a4 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -484,10 +484,20 @@ static void tci_out_label(TCGContext *s, TCGLabel *label) } } +static void stack_bounds_check(TCGReg base, target_long offset) +{ + if (base == TCG_REG_CALL_STACK) { + tcg_debug_assert(offset < 0); + tcg_debug_assert(offset >= -(CPU_TEMP_BUF_NLONGS * sizeof(long))); + } +} + static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1, intptr_t arg2) { uint8_t *old_code_ptr = s->code_ptr; + + stack_bounds_check(arg1, arg2); if (type == TCG_TYPE_I32) { tcg_out_op_t(s, INDEX_op_ld_i32); tcg_out_r(s, ret); @@ -623,6 +633,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, case INDEX_op_st16_i64: case INDEX_op_st32_i64: case INDEX_op_st_i64: + stack_bounds_check(args[1], args[2]); tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_debug_assert(args[2] == (int32_t)args[2]); @@ -825,6 +836,8 @@ static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1, intptr_t arg2) { uint8_t *old_code_ptr = s->code_ptr; + + stack_bounds_check(arg1, arg2); if (type == TCG_TYPE_I32) { tcg_out_op_t(s, INDEX_op_st_i32); tcg_out_r(s, arg); From patchwork Thu Jan 28 08:23:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372539 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp651092ejb; Thu, 28 Jan 2021 00:34:00 -0800 (PST) X-Google-Smtp-Source: ABdhPJxnJ9iKFrp8e1AZUMxWPcpnYihxUbozvDMJCG+fZSitJsrdsXCk44Wuas6eNtDysDKs66l4 X-Received: by 2002:a25:880a:: with SMTP id c10mr21771829ybl.456.1611822840582; Thu, 28 Jan 2021 00:34:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611822840; cv=none; d=google.com; s=arc-20160816; b=wgk4ilfyqYTCZ4/ngpbP+8ZpOgzBjA0WbRzCyb3Ai0gily5w5462se70L5kjv64Xbh n96Oi1AZUHhnyeahJuyu/z1ca7ptO8oA2bNEF6g1VtyO6X5UNRGufDyVOo7wyf3M75r8 i2MPWrSUKKvUHmM7AhKUiDFyb/GUWZqSp+WBId73KKJ/9OjmbZOP1if8oe746vQj8zYf 62EvWM1aH91rXoJPMYaUS0zsx4EmTj6Uf4t4nnYgo3s81Jb4ZbE47q9Nb3xj0wp1vT9e IPjM3qm7cvTMB+/f3d3aOm+Zd5qU9bdqPBNiduoNUC+Cw0LcHx56Gzt9UqDU9Ad4SK2e WwgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=bbk4RsHUJRWlg1yK2n4vH59KVtgZMjLMkLkrn0UF89s=; b=DTDweP/aM/Woloh+OpVDQxgJar0PhpkVPI/zc6WdRDS1BHBO9xA96fmpVh+W6NqHmG qa8PBVvY6kEavLeUVtPTg4rINh429TXbdty3dEUIgaqXxvvXZjGUNyOfa7uSi3Kzxwq1 PPrycZy5i0/T3OUdECN0WMkG+rkfQifho6ARj0Rlah7n+x1tmjpkSNB7RbqGiTTVc1mY WnY2JgY3hguSVN+0sGhFgTydMKRH97A0P88TthjQaUI1ovaQP70/MBFBbeAHgJSg+ahY yHDbwK9zkLEJKWpKSE0Y0ZR4E/5q+ZUvAUdzsl6bqpoxhNJMtReRZFnkhsFMbB/R5zCy yJ2A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=c+KLjKXr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.24.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:24:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 19/23] tcg/tci: Merge INDEX_op_{st_i32,st32_i64} Date: Wed, 27 Jan 2021 22:23:27 -1000 Message-Id: <20210128082331.196801-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- tcg/tci.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index c4c303f874..66b90f8489 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -620,6 +620,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, *(uint16_t *)(t1 + t2) = t0; break; case INDEX_op_st_i32: + case INDEX_op_st32_i64: t0 = tci_read_r32(regs, &tb_ptr); t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); @@ -868,12 +869,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t2 = tci_read_s32(&tb_ptr); tci_write_reg(regs, t0, *(uint64_t *)(t1 + t2)); break; - case INDEX_op_st32_i64: - t0 = tci_read_r32(regs, &tb_ptr); - t1 = tci_read_r(regs, &tb_ptr); - t2 = tci_read_s32(&tb_ptr); - *(uint32_t *)(t1 + t2) = t0; - break; case INDEX_op_st_i64: t0 = tci_read_r64(regs, &tb_ptr); t1 = tci_read_r(regs, &tb_ptr); From patchwork Thu Jan 28 08:23:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372551 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp1031243jam; Thu, 28 Jan 2021 00:50:32 -0800 (PST) X-Google-Smtp-Source: ABdhPJxjwazn0W/c64SzDR5BxX2Gr7THpNs82DOzOEzP3wyO+PAcvthAAMgiSnj4/VbF80KZJ/lH X-Received: by 2002:a25:bbcf:: with SMTP id c15mr21180178ybk.418.1611823832448; Thu, 28 Jan 2021 00:50:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611823832; cv=none; d=google.com; s=arc-20160816; b=y8Lt4ZqePVLGESAQBU3uk/43zuKAIYwwl1Vu7CIRrndodNLdlx/oUmfnZFHKvqqXnD e/h2hS4r9+sHyh6n1l5oWCAC736iFHoOFv1YM2DGRX2KeoOXou2grTgV4xHC7URHiefg n8GOHj0Vc0CvwFvMS0KhR24q4JmqstLmm/OU1uRMJuGQ7TUW2Uq35sydotamm5KccYZR cI3IhYpYmKvxu6VwedkQuchr3ba0HXQP7meMTVzTCgWrgatdQbRFTIinpLaFTVP8Pkxh UUg7AZ0kk79CoeUNQi9qy5dhS5I5kcm1+Xk9A/x2lVQjlJlQy9q38PSKm2k5/JMymYDF Fv/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=J7kDIVNOxEBDaoT7WAnXMrsfZZNCOoe99UtUD6AohMg=; b=wK083r4t2sHlzlKMONaj+iNZAdzy9u3VQiIYdlFH4aUjNvJ4bcgzGkH5qZ1fYaWKow rMoKeqVLkcrFwFWfiX0oPlOTVfTbxh+u9sF2vztJ7cC9ro+eiwqFNeF7o/AbbebGnNVU tCn8R8NcYjq7LT6MRQpXfZexFGXIfREsGJebBYpLixLUnswM+DfX6F2yolLMPw6dW+CC Fiw3H3ymTKtM5BZ7+XbbGfeGH2zgggOVdTOnOzCWEmPGG3CZ2frnZ99bhXgFAsCxjBYV 4vGw5SD73p/eaL4YqvwD8PsGNQ5P3HLVtZjK1fbbwk9ARaskuazrkQEHzCabpa2pai3L S7Cg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=n3Uy2F0i; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.24.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:24:06 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 20/23] tcg/tci: Use g_assert_not_reached Date: Wed, 27 Jan 2021 22:23:28 -1000 Message-Id: <20210128082331.196801-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Three TODO instances are never happen cases. Other uses of tcg_abort are also indicating unreachable cases. Signed-off-by: Richard Henderson --- tcg/tci.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) -- 2.25.1 Reviewed-by: Stefan Weil Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 66b90f8489..2ce67a8fd3 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -360,7 +360,7 @@ static bool tci_compare32(uint32_t u0, uint32_t u1, TCGCond condition) result = (u0 > u1); break; default: - TODO(); + g_assert_not_reached(); } return result; } @@ -402,7 +402,7 @@ static bool tci_compare64(uint64_t u0, uint64_t u1, TCGCond condition) result = (u0 > u1); break; default: - TODO(); + g_assert_not_reached(); } return result; } @@ -1109,7 +1109,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tmp32 = qemu_ld_beul; break; default: - tcg_abort(); + g_assert_not_reached(); } tci_write_reg(regs, t0, tmp32); break; @@ -1158,7 +1158,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tmp64 = qemu_ld_beq; break; default: - tcg_abort(); + g_assert_not_reached(); } tci_write_reg(regs, t0, tmp64); if (TCG_TARGET_REG_BITS == 32) { @@ -1186,7 +1186,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, qemu_st_bel(t0); break; default: - tcg_abort(); + g_assert_not_reached(); } break; case INDEX_op_qemu_st_i64: @@ -1216,7 +1216,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, qemu_st_beq(tmp64); break; default: - tcg_abort(); + g_assert_not_reached(); } break; case INDEX_op_mb: @@ -1224,8 +1224,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, smp_mb(); break; default: - TODO(); - break; + g_assert_not_reached(); } tci_assert(tb_ptr == old_code_ptr + op_size); } From patchwork Thu Jan 28 08:23:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372544 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp653488ejb; Thu, 28 Jan 2021 00:38:15 -0800 (PST) X-Google-Smtp-Source: ABdhPJxiK/aqvKwM/C/+SBl9KX+qNGVISlBcG1BCKGFNbLhR2p4HAqcIATAW6VmKhxF5ncCDNF/D X-Received: by 2002:a25:8307:: with SMTP id s7mr24946162ybk.219.1611823095749; Thu, 28 Jan 2021 00:38:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611823095; cv=none; d=google.com; s=arc-20160816; b=twMCt8AJhroJUIowal2jurfVEirCCAfoT4SBw7tB8TzJ3jfjxY30WPRdH+URGjFSOG QOsPLZ3PpNTC0YEZXejJCBcD2UDGtg4AEZ3PlsGzWCtCXs8Ety6zjIO12XJRKVKb+CwY +T6+knVrq54gB8lz7rW+Y/GmL+UmHsU+PXr2g+j12qu65xGak2yCYAwENI2N/wQoV96Q 2JbAf2V2eGBlgo7H5ngIH1yRu3eY+UD/Ac5OM2az/O+lvbGt2lro/JZhAgl7/7mrsBK6 a4Mv0RyhJchip6rwz1h8HZFBeX2SOIpCDMNrkLCl54qBWKBiEEwc9iZYaG9m4jc0NEo3 CF9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=m2ze6FL+5Rg8ehBHjUThMYSDxbo0AgwLwhZ3Mex+2Fk=; b=LFMWTQVfY/qu9pcRu6wRRFpmHpjEmwQ08phc6Q7GacA21otfmTnFVdBgW1Aedk4XCP jC1mFIt+1S4yrb3mW+9gq/KJKqsuzpOXyq4zGEXLJ9gojqm0+jH3j5qgk6BmpnEyoVr0 chnYBxHAWLdWcy/xNEkWS3M7jilh9aZjWby9gUDSEzGXCTrUKvGXWjQSsnVWHtQTxT1l OQuNrMRU/1ajsWZcnFN5MgdL+5Am57zfLY+y8vrOuQM7p4ZhzDeldlrCEiYdeJfXdjYw gzVk7LGJVPW3H6UOhEPHthoNUXZG/V4aZZxeadAdCy+cOdVO928qdwoG4buFVT/kWh3N DNJQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hRJWj2Tu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.24.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:24:07 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 21/23] tcg/tci: Remove dead code for TCG_TARGET_HAS_div2_* Date: Wed, 27 Jan 2021 22:23:29 -1000 Message-Id: <20210128082331.196801-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We do not simultaneously support div and div2 -- it's one or the other. TCI is already using div, so remove div2. Signed-off-by: Richard Henderson --- tcg/tci.c | 12 ------------ tcg/tci/tcg-target.c.inc | 16 ---------------- 2 files changed, 28 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 2ce67a8fd3..32931ea611 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -647,7 +647,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t2 = tci_read_ri32(regs, &tb_ptr); tci_write_reg(regs, t0, t1 * t2); break; -#if TCG_TARGET_HAS_div_i32 case INDEX_op_div_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); @@ -672,12 +671,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t2 = tci_read_ri32(regs, &tb_ptr); tci_write_reg(regs, t0, t1 % t2); break; -#elif TCG_TARGET_HAS_div2_i32 - case INDEX_op_div2_i32: - case INDEX_op_divu2_i32: - TODO(); - break; -#endif case INDEX_op_and_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); @@ -903,11 +896,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, case INDEX_op_remu_i64: TODO(); break; -#elif TCG_TARGET_HAS_div2_i64 - case INDEX_op_div2_i64: - case INDEX_op_divu2_i64: - TODO(); - break; #endif case INDEX_op_and_i64: t0 = *tb_ptr++; diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index a60fa524a4..842807ff2e 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -71,15 +71,10 @@ static const TCGTargetOpDef tcg_target_op_defs[] = { { INDEX_op_add_i32, { R, RI, RI } }, { INDEX_op_sub_i32, { R, RI, RI } }, { INDEX_op_mul_i32, { R, RI, RI } }, -#if TCG_TARGET_HAS_div_i32 { INDEX_op_div_i32, { R, R, R } }, { INDEX_op_divu_i32, { R, R, R } }, { INDEX_op_rem_i32, { R, R, R } }, { INDEX_op_remu_i32, { R, R, R } }, -#elif TCG_TARGET_HAS_div2_i32 - { INDEX_op_div2_i32, { R, R, "0", "1", R } }, - { INDEX_op_divu2_i32, { R, R, "0", "1", R } }, -#endif /* TODO: Does R, RI, RI result in faster code than R, R, RI? If both operands are constants, we can optimize. */ { INDEX_op_and_i32, { R, RI, RI } }, @@ -156,9 +151,6 @@ static const TCGTargetOpDef tcg_target_op_defs[] = { { INDEX_op_divu_i64, { R, R, R } }, { INDEX_op_rem_i64, { R, R, R } }, { INDEX_op_remu_i64, { R, R, R } }, -#elif TCG_TARGET_HAS_div2_i64 - { INDEX_op_div2_i64, { R, R, "0", "1", R } }, - { INDEX_op_divu2_i64, { R, R, "0", "1", R } }, #endif { INDEX_op_and_i64, { R, RI, RI } }, #if TCG_TARGET_HAS_andc_i64 @@ -705,10 +697,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, case INDEX_op_remu_i64: /* Optional (TCG_TARGET_HAS_div_i64). */ TODO(); break; - case INDEX_op_div2_i64: /* Optional (TCG_TARGET_HAS_div2_i64). */ - case INDEX_op_divu2_i64: /* Optional (TCG_TARGET_HAS_div2_i64). */ - TODO(); - break; case INDEX_op_brcond_i64: tcg_out_r(s, args[0]); tcg_out_ri64(s, const_args[1], args[1]); @@ -748,10 +736,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, tcg_out_ri32(s, const_args[1], args[1]); tcg_out_ri32(s, const_args[2], args[2]); break; - case INDEX_op_div2_i32: /* Optional (TCG_TARGET_HAS_div2_i32). */ - case INDEX_op_divu2_i32: /* Optional (TCG_TARGET_HAS_div2_i32). */ - TODO(); - break; #if TCG_TARGET_REG_BITS == 32 case INDEX_op_add2_i32: case INDEX_op_sub2_i32: From patchwork Thu Jan 28 08:23:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372543 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp653041ejb; Thu, 28 Jan 2021 00:37:26 -0800 (PST) X-Google-Smtp-Source: ABdhPJzSGn7/cuwOYd3uCtTWf1XDaIFg4w3VJ+MT5AIxPKbNUu0FZ1hoPQsr4j50nJ4ZD/I6uoJe X-Received: by 2002:a25:af8c:: with SMTP id g12mr22799086ybh.33.1611823046161; Thu, 28 Jan 2021 00:37:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611823046; cv=none; d=google.com; s=arc-20160816; b=L8TFq9bwMM3sbf5HkrXgz5ilkv3SpIkrg15XJu1Cs9jmuvdO94Xa3nmeKyJ3+rZqvr YggH90rzveUpdHTADeom/CJqahicJH3OK+jpvKBsE1z9eN/xFyawvQ7gGTzkw5MiGYzX CURHHShcI+WaHUfxIdIkAbMOQGA3tMtFQsNjl4hSA9PqnMkv1mOPASehhafoJXeP3VfJ i77b5Ly5oVFFf5Szz40F2+FKUcS2WXee14IorRUqoLJ+i2O6Vqg3Q6Y2YYmrig070ad4 Y1CV5q9cDxUW8b5T65VBjigD7OZPlXeEJAl/k6NYJCNQRiaI6UMYEGEmmEkewTiSpwZ+ esZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=xJrZEGVQR1/tg7o98CXOJgjBnTA9yUqVpyK8VFJm0nw=; b=LuSAbVHGjUl0b3rIS89LGE75khIeKBFDFTgy0Rfu9VSw3QGzUFF+K87Ew/D1YmAwEs qDrDORPcruhsPJOlokm3ks9tl1jmMzE515hTel4ub4V4gRua/E9GINfpXYO8u4BCPsCA R+0P9ysTDuzh6QAnSaEvclZmV5XZCFFNJBf4+f6n6T59Zwsgmd+imBYBEH/wJacnvbTY 4AcQRCX7utDHDFVXmNF68QhhbkpGKCjalsLspW6n50tcmwa4FgI6kyGtPOhrYIhj/+G0 XNBrSeB/SvOVYr7a4iJlklLbK4YtKBPcGCcLRio9y23hdW1sMdwEqzpQ3nXZzDxdWh3L T8tA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="St/YIEY6"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.24.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:24:09 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 22/23] tcg/tci: Implement 64-bit division Date: Wed, 27 Jan 2021 22:23:30 -1000 Message-Id: <20210128082331.196801-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52c; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Trivially implemented like other arithmetic. Tested via check-tcg and the ppc64 target. Signed-off-by: Richard Henderson --- tcg/tci/tcg-target.h | 4 ++-- tcg/tci.c | 28 ++++++++++++++++++++++------ tcg/tci/tcg-target.c.inc | 12 ++++-------- 3 files changed, 28 insertions(+), 16 deletions(-) -- 2.25.1 Reviewed-by: Stefan Weil Reviewed-by: Alex Bennée diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index bb784e018e..7fc349a3de 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -100,8 +100,8 @@ #define TCG_TARGET_HAS_extract_i64 0 #define TCG_TARGET_HAS_sextract_i64 0 #define TCG_TARGET_HAS_extract2_i64 0 -#define TCG_TARGET_HAS_div_i64 0 -#define TCG_TARGET_HAS_rem_i64 0 +#define TCG_TARGET_HAS_div_i64 1 +#define TCG_TARGET_HAS_rem_i64 1 #define TCG_TARGET_HAS_ext8s_i64 1 #define TCG_TARGET_HAS_ext16s_i64 1 #define TCG_TARGET_HAS_ext32s_i64 1 diff --git a/tcg/tci.c b/tcg/tci.c index 32931ea611..0065c854a4 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -889,14 +889,30 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t2 = tci_read_ri64(regs, &tb_ptr); tci_write_reg(regs, t0, t1 * t2); break; -#if TCG_TARGET_HAS_div_i64 case INDEX_op_div_i64: - case INDEX_op_divu_i64: - case INDEX_op_rem_i64: - case INDEX_op_remu_i64: - TODO(); + t0 = *tb_ptr++; + t1 = tci_read_ri64(regs, &tb_ptr); + t2 = tci_read_ri64(regs, &tb_ptr); + tci_write_reg(regs, t0, (int64_t)t1 / (int64_t)t2); + break; + case INDEX_op_divu_i64: + t0 = *tb_ptr++; + t1 = tci_read_ri64(regs, &tb_ptr); + t2 = tci_read_ri64(regs, &tb_ptr); + tci_write_reg(regs, t0, (uint64_t)t1 / (uint64_t)t2); + break; + case INDEX_op_rem_i64: + t0 = *tb_ptr++; + t1 = tci_read_ri64(regs, &tb_ptr); + t2 = tci_read_ri64(regs, &tb_ptr); + tci_write_reg(regs, t0, (int64_t)t1 % (int64_t)t2); + break; + case INDEX_op_remu_i64: + t0 = *tb_ptr++; + t1 = tci_read_ri64(regs, &tb_ptr); + t2 = tci_read_ri64(regs, &tb_ptr); + tci_write_reg(regs, t0, (uint64_t)t1 % (uint64_t)t2); break; -#endif case INDEX_op_and_i64: t0 = *tb_ptr++; t1 = tci_read_ri64(regs, &tb_ptr); diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 842807ff2e..8c0e77a0be 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -146,12 +146,10 @@ static const TCGTargetOpDef tcg_target_op_defs[] = { { INDEX_op_add_i64, { R, RI, RI } }, { INDEX_op_sub_i64, { R, RI, RI } }, { INDEX_op_mul_i64, { R, RI, RI } }, -#if TCG_TARGET_HAS_div_i64 { INDEX_op_div_i64, { R, R, R } }, { INDEX_op_divu_i64, { R, R, R } }, { INDEX_op_rem_i64, { R, R, R } }, { INDEX_op_remu_i64, { R, R, R } }, -#endif { INDEX_op_and_i64, { R, RI, RI } }, #if TCG_TARGET_HAS_andc_i64 { INDEX_op_andc_i64, { R, RI, RI } }, @@ -678,6 +676,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, case INDEX_op_sar_i64: case INDEX_op_rotl_i64: /* Optional (TCG_TARGET_HAS_rot_i64). */ case INDEX_op_rotr_i64: /* Optional (TCG_TARGET_HAS_rot_i64). */ + case INDEX_op_div_i64: /* Optional (TCG_TARGET_HAS_div_i64). */ + case INDEX_op_divu_i64: /* Optional (TCG_TARGET_HAS_div_i64). */ + case INDEX_op_rem_i64: /* Optional (TCG_TARGET_HAS_div_i64). */ + case INDEX_op_remu_i64: /* Optional (TCG_TARGET_HAS_div_i64). */ tcg_out_r(s, args[0]); tcg_out_ri64(s, const_args[1], args[1]); tcg_out_ri64(s, const_args[2], args[2]); @@ -691,12 +693,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, tcg_debug_assert(args[4] <= UINT8_MAX); tcg_out8(s, args[4]); break; - case INDEX_op_div_i64: /* Optional (TCG_TARGET_HAS_div_i64). */ - case INDEX_op_divu_i64: /* Optional (TCG_TARGET_HAS_div_i64). */ - case INDEX_op_rem_i64: /* Optional (TCG_TARGET_HAS_div_i64). */ - case INDEX_op_remu_i64: /* Optional (TCG_TARGET_HAS_div_i64). */ - TODO(); - break; case INDEX_op_brcond_i64: tcg_out_r(s, args[0]); tcg_out_ri64(s, const_args[1], args[1]); From patchwork Thu Jan 28 08:23:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 372545 Delivered-To: patch@linaro.org Received: by 2002:a17:906:24d5:0:0:0:0 with SMTP id f21csp653696ejb; Thu, 28 Jan 2021 00:38:34 -0800 (PST) X-Google-Smtp-Source: ABdhPJyS3BPas+DQ2/Po6BPMP2WTV5MHihdjGdaHzmMK9joAcowyi39Ci8DAv3gdybX4I9cPDEgp X-Received: by 2002:a25:b195:: with SMTP id h21mr22152996ybj.347.1611823114545; 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[66.27.222.29]) by smtp.gmail.com with ESMTPSA id s24sm4658292pfd.118.2021.01.28.00.24.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 00:24:10 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 23/23] tcg/tci: Remove TODO as unused Date: Wed, 27 Jan 2021 22:23:31 -1000 Message-Id: <20210128082331.196801-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210128082331.196801-1-richard.henderson@linaro.org> References: <20210128082331.196801-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- tcg/tci.c | 8 -------- 1 file changed, 8 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée diff --git a/tcg/tci.c b/tcg/tci.c index 0065c854a4..efc0ca20a6 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -33,14 +33,6 @@ #include "tcg/tcg-op.h" #include "qemu/compiler.h" -/* Marker for missing code. */ -#define TODO() \ - do { \ - fprintf(stderr, "TODO %s:%u: %s()\n", \ - __FILE__, __LINE__, __func__); \ - tcg_abort(); \ - } while (0) - #if MAX_OPC_PARAM_IARGS != 6 # error Fix needed, number of supported input arguments changed! #endif