From patchwork Thu Feb 4 14:21:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 376419 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4305C433DB for ; Thu, 4 Feb 2021 14:24:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 97F6164F51 for ; Thu, 4 Feb 2021 14:24:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236381AbhBDOXs (ORCPT ); Thu, 4 Feb 2021 09:23:48 -0500 Received: from mail29.static.mailgun.info ([104.130.122.29]:17084 "EHLO mail29.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236495AbhBDOXX (ORCPT ); Thu, 4 Feb 2021 09:23:23 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1612448582; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=wwYV6Ck3GBuzl06xq1r3JumrcWoG+sVnkDj7ll/vZfQ=; b=CT4aXLSE8QDrCrFsCks8MRcZy95yI1h983wZkwuk2hR4JWFzPJCHiiAwqMkaD6Lxt8q4apBa eaM4WUFEA7bRxrt63eoggjJtnmaK/h24lCl3CBgFo9Al9v7+UPnuTu/qZhD4CB9FbLSv/u8W eszcKpSoYpUiGl47f1POiWqfrKM= X-Mailgun-Sending-Ip: 104.130.122.29 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n05.prod.us-east-1.postgun.com with SMTP id 601c031b0bb8f50fb9a97932 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Thu, 04 Feb 2021 14:22:19 GMT Sender: mkshah=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 37264C433C6; Thu, 4 Feb 2021 14:22:19 +0000 (UTC) Received: from mkshah-linux.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 52A22C433CA; Thu, 4 Feb 2021 14:22:14 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 52A22C433CA Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: swboyd@chromium.org, mka@chromium.org, evgreen@chromium.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, agross@kernel.org, dianders@chromium.org, linux@roeck-us.net, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, Mahesh Sivasubramanian , devicetree@vger.kernel.org, Maulik Shah Subject: [PATCH v6 1/4] dt-bindings: Introduce SoC sleep stats bindings Date: Thu, 4 Feb 2021 19:51:45 +0530 Message-Id: <1612448508-9179-2-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1612448508-9179-1-git-send-email-mkshah@codeaurora.org> References: <1612448508-9179-1-git-send-email-mkshah@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Mahesh Sivasubramanian Add device binding documentation for Qualcomm Technologies, Inc. (QTI) SoC sleep stats driver. The driver is used for displaying SoC sleep statistic maintained by Always On Processor or Resource Power Manager. Cc: devicetree@vger.kernel.org Signed-off-by: Mahesh Sivasubramanian Signed-off-by: Lina Iyer Signed-off-by: Maulik Shah Reviewed-by: Rob Herring Reviewed-by: Bjorn Andersson Reviewed-by: Stephen Boyd --- .../bindings/soc/qcom/soc-sleep-stats.yaml | 46 ++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/soc-sleep-stats.yaml diff --git a/Documentation/devicetree/bindings/soc/qcom/soc-sleep-stats.yaml b/Documentation/devicetree/bindings/soc/qcom/soc-sleep-stats.yaml new file mode 100644 index 0000000..1e012ba --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/soc-sleep-stats.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/qcom/soc-sleep-stats.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. (QTI) SoC sleep stats bindings + +maintainers: + - Maulik Shah + - Lina Iyer + +description: + Always On Processor/Resource Power Manager maintains statistics of the SoC + sleep modes involving powering down of the rails and oscillator clock. + + Statistics includes SoC sleep mode type, number of times low power mode were + entered, time of last entry, time of last exit and accumulated sleep duration. + +properties: + compatible: + enum: + - qcom,rpmh-sleep-stats + - qcom,rpm-sleep-stats + + reg: + maxItems: 1 + +required: + - compatible + - reg + +examples: + # Example of rpmh sleep stats + - | + rpmh-sleep-stats@c3f0000 { + compatible = "qcom,rpmh-sleep-stats"; + reg = <0 0x0c3f0000 0 0x400>; + }; + # Example of rpm sleep stats + - | + rpm-sleep-stats@4690000 { + compatible = "qcom,rpm-sleep-stats"; + reg = <0 0x04690000 0 0x400>; + }; +... From patchwork Thu Feb 4 14:21:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 377118 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5833BC433E9 for ; Thu, 4 Feb 2021 14:31:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1C92A64F60 for ; Thu, 4 Feb 2021 14:31:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236707AbhBDObg (ORCPT ); Thu, 4 Feb 2021 09:31:36 -0500 Received: from so15.mailgun.net ([198.61.254.15]:27334 "EHLO so15.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236705AbhBDOXg (ORCPT ); Thu, 4 Feb 2021 09:23:36 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1612448586; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=0oqLiRY2zSPbdH99XRMVDIldv0zDnjyDqx5ulcH4+g8=; b=gdtuC1W9hEFBnn8v/irqRjswzUIyDn5W8gTvg5a+au0QD3hCDtaDLp0J6KI6Nnx+z/IpsXF0 kP9M68V+IvI1fe/+Ne8rEeWzLPKER5mQuSxif23YHD2XrlRzaDHlzDO6KO1CFmtijpK32haT /OBpRnpqitQ03WKwRnKNLmAj4fo= X-Mailgun-Sending-Ip: 198.61.254.15 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n03.prod.us-west-2.postgun.com with SMTP id 601c0320f112b7872c0a041a (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Thu, 04 Feb 2021 14:22:24 GMT Sender: mkshah=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id B3AF2C43464; Thu, 4 Feb 2021 14:22:24 +0000 (UTC) Received: from mkshah-linux.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5FAABC43461; Thu, 4 Feb 2021 14:22:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 5FAABC43461 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: swboyd@chromium.org, mka@chromium.org, evgreen@chromium.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, agross@kernel.org, dianders@chromium.org, linux@roeck-us.net, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, Mahesh Sivasubramanian , Maulik Shah Subject: [PATCH v6 2/4] soc: qcom: Add SoC sleep stats driver Date: Thu, 4 Feb 2021 19:51:46 +0530 Message-Id: <1612448508-9179-3-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1612448508-9179-1-git-send-email-mkshah@codeaurora.org> References: <1612448508-9179-1-git-send-email-mkshah@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Mahesh Sivasubramanian Let's add a driver to read the stats from remote processor and export to debugfs. The driver creates "qcom_sleep_stats" directory in debugfs and adds files for various low power mode available. Below is sample output with command cat /sys/kernel/debug/qcom_sleep_stats/ddr count = 0 Last Entered At = 0 Last Exited At = 0 Accumulated Duration = 0 Signed-off-by: Mahesh Sivasubramanian Signed-off-by: Lina Iyer [mkshah: add subsystem sleep stats, create one file for each stat] Signed-off-by: Maulik Shah Reported-by: kernel test robot --- drivers/soc/qcom/Kconfig | 10 ++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/soc_sleep_stats.c | 258 +++++++++++++++++++++++++++++++++++++ 3 files changed, 269 insertions(+) create mode 100644 drivers/soc/qcom/soc_sleep_stats.c diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index 79b568f..e80b63a 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -190,6 +190,16 @@ config QCOM_SOCINFO Say yes here to support the Qualcomm socinfo driver, providing information about the SoC to user space. +config QCOM_SOC_SLEEP_STATS + tristate "Qualcomm Technologies, Inc. (QTI) SoC sleep stats driver" + depends on ARCH_QCOM && DEBUG_FS || COMPILE_TEST + depends on QCOM_SMEM + help + Qualcomm Technologies, Inc. (QTI) SoC sleep stats driver to read + the shared memory exported by the remote processor related to + various SoC level low power modes statistics and export to debugfs + interface. + config QCOM_WCNSS_CTRL tristate "Qualcomm WCNSS control driver" depends on ARCH_QCOM || COMPILE_TEST diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index ad675a6..5f30d74 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -20,6 +20,7 @@ obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o obj-$(CONFIG_QCOM_SMP2P) += smp2p.o obj-$(CONFIG_QCOM_SMSM) += smsm.o obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o +obj-$(CONFIG_QCOM_SOC_SLEEP_STATS) += soc_sleep_stats.o obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o obj-$(CONFIG_QCOM_APR) += apr.o obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o diff --git a/drivers/soc/qcom/soc_sleep_stats.c b/drivers/soc/qcom/soc_sleep_stats.c new file mode 100644 index 0000000..66df638 --- /dev/null +++ b/drivers/soc/qcom/soc_sleep_stats.c @@ -0,0 +1,258 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2011-2021, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#define STAT_TYPE_ADDR 0x0 +#define COUNT_ADDR 0x4 +#define LAST_ENTERED_AT_ADDR 0x8 +#define LAST_EXITED_AT_ADDR 0x10 +#define ACCUMULATED_ADDR 0x18 +#define CLIENT_VOTES_ADDR 0x1c + +#define STAT_OFFSET(record_no, type) (((record_no)*(sizeof(struct sleep_stats))) + (type)) +#define APPENDED_STAT_OFFSET(record_no) ((record_no)*(sizeof(struct appended_stats))) + +struct subsystem_data { + const char *name; + u32 smem_item; + u32 pid; +}; + +static const struct subsystem_data subsystems[] = { + { "modem", 605, 1 }, + { "adsp", 606, 2 }, + { "cdsp", 607, 5 }, + { "slpi", 608, 3 }, + { "gpu", 609, 0 }, + { "display", 610, 0 }, + { "adsp_island", 613, 2 }, + { "slpi_island", 613, 3 }, +}; + +struct stats_config { + u32 offset_addr; + u32 num_records; + bool appended_stats_avail; +}; + +struct stats_prv_data { + bool appended_stats_avail; + void __iomem *reg; +}; + +struct sleep_stats { + u32 stat_type; + u32 count; + u64 last_entered_at; + u64 last_exited_at; + u64 accumulated; +}; + +struct appended_stats { + u32 client_votes; + u32 reserved[3]; +}; + +static void print_sleep_stats(struct seq_file *s, const struct sleep_stats *stat) +{ + u64 accumulated = stat->accumulated; + /* + * If a subsystem is in sleep when reading the sleep stats adjust + * the accumulated sleep duration to show actual sleep time. + */ + if (stat->last_entered_at > stat->last_exited_at) + accumulated += arch_timer_read_counter() + - stat->last_entered_at; + + seq_printf(s, "Count = %u\n", stat->count); + seq_printf(s, "Last Entered At = %llu\n", stat->last_entered_at); + seq_printf(s, "Last Exited At = %llu\n", stat->last_exited_at); + seq_printf(s, "Accumulated Duration = %llu\n", accumulated); +} + +static int subsystem_sleep_stats_show(struct seq_file *s, void *d) +{ + struct subsystem_data *subsystem = s->private; + struct sleep_stats *stat; + + /* + * Saving this pointer during probe may not help in cases like + * subsystem restart, beside not each subsystem is a remote processor + * for e.g display for which we can get start and stop notification + * + * Lookup smem pointer each time to keep it simple. + */ + stat = qcom_smem_get(subsystem->pid, subsystem->smem_item, NULL); + if (IS_ERR(stat)) + return PTR_ERR(stat); + + print_sleep_stats(s, stat); + + return 0; +} + +static int soc_sleep_stats_show(struct seq_file *s, void *d) +{ + struct stats_prv_data *prv_data = s->private; + void __iomem *reg = prv_data->reg; + struct sleep_stats stat; + + stat.count = readl(reg + COUNT_ADDR); + stat.last_entered_at = readq(reg + LAST_ENTERED_AT_ADDR); + stat.last_exited_at = readq(reg + LAST_EXITED_AT_ADDR); + stat.accumulated = readq(reg + ACCUMULATED_ADDR); + + print_sleep_stats(s, &stat); + + if (prv_data->appended_stats_avail) { + struct appended_stats app_stat; + + app_stat.client_votes = readl(reg + CLIENT_VOTES_ADDR); + seq_printf(s, "Client_votes = %#x\n", app_stat.client_votes); + } + + return 0; +} + +DEFINE_SHOW_ATTRIBUTE(soc_sleep_stats); +DEFINE_SHOW_ATTRIBUTE(subsystem_sleep_stats); + +static struct dentry *create_debugfs_entries(void __iomem *reg, + struct stats_prv_data *prv_data, + u32 num_records) +{ + struct dentry *root; + struct sleep_stats *stat; + char stat_type[sizeof(u32)] = {0}; + u32 offset, type; + int i; + + root = debugfs_create_dir("qcom_sleep_stats", NULL); + + for (i = 0; i < num_records; i++) { + offset = STAT_OFFSET(i, STAT_TYPE_ADDR); + + if (prv_data[i].appended_stats_avail) + offset += APPENDED_STAT_OFFSET(i); + + prv_data[i].reg = reg + offset; + + type = readl(prv_data[i].reg); + memcpy_fromio(stat_type, &type, sizeof(u32)); + strim(stat_type); + debugfs_create_file(stat_type, 0400, root, + &prv_data[i], + &soc_sleep_stats_fops); + } + + for (i = 0; i < ARRAY_SIZE(subsystems); i++) { + stat = qcom_smem_get(subsystems[i].pid, subsystems[i].smem_item, + NULL); + if (IS_ERR(stat)) + continue; + + debugfs_create_file(subsystems[i].name, 0400, root, + (void *)&subsystems[i], + &subsystem_sleep_stats_fops); + } + + return root; +} + +static int soc_sleep_stats_probe(struct platform_device *pdev) +{ + struct resource *res; + void __iomem *reg; + void __iomem *offset_addr; + phys_addr_t stats_base; + resource_size_t stats_size; + struct dentry *root; + const struct stats_config *config; + struct stats_prv_data *prv_data; + int i; + + config = device_get_match_data(&pdev->dev); + if (!config) + return -ENODEV; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return PTR_ERR(res); + + offset_addr = ioremap(res->start + config->offset_addr, sizeof(u32)); + if (IS_ERR(offset_addr)) + return PTR_ERR(offset_addr); + + stats_base = res->start | readl_relaxed(offset_addr); + stats_size = resource_size(res); + iounmap(offset_addr); + + reg = devm_ioremap(&pdev->dev, stats_base, stats_size); + if (!reg) + return -ENOMEM; + + prv_data = devm_kcalloc(&pdev->dev, config->num_records, + sizeof(struct stats_prv_data), GFP_KERNEL); + if (!prv_data) + return -ENOMEM; + + for (i = 0; i < config->num_records; i++) + prv_data[i].appended_stats_avail = config->appended_stats_avail; + + root = create_debugfs_entries(reg, prv_data, config->num_records); + platform_set_drvdata(pdev, root); + + return 0; +} + +static int soc_sleep_stats_remove(struct platform_device *pdev) +{ + struct dentry *root = platform_get_drvdata(pdev); + + debugfs_remove_recursive(root); + + return 0; +} + +static const struct stats_config rpm_data = { + .offset_addr = 0x14, + .num_records = 2, + .appended_stats_avail = true, +}; + +static const struct stats_config rpmh_data = { + .offset_addr = 0x4, + .num_records = 3, + .appended_stats_avail = false, +}; + +static const struct of_device_id soc_sleep_stats_table[] = { + { .compatible = "qcom,rpm-sleep-stats", .data = &rpm_data }, + { .compatible = "qcom,rpmh-sleep-stats", .data = &rpmh_data }, + { } +}; + +static struct platform_driver soc_sleep_stats_driver = { + .probe = soc_sleep_stats_probe, + .remove = soc_sleep_stats_remove, + .driver = { + .name = "soc_sleep_stats", + .of_match_table = soc_sleep_stats_table, + }, +}; +module_platform_driver(soc_sleep_stats_driver); + +MODULE_DESCRIPTION("Qualcomm Technologies, Inc. (QTI) SoC Sleep Stats driver"); +MODULE_LICENSE("GPL v2"); From patchwork Thu Feb 4 14:21:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 377119 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 358F3C433E6 for ; Thu, 4 Feb 2021 14:31:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F2C7964F5E for ; Thu, 4 Feb 2021 14:31:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236719AbhBDObe (ORCPT ); Thu, 4 Feb 2021 09:31:34 -0500 Received: from so15.mailgun.net ([198.61.254.15]:46425 "EHLO so15.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236707AbhBDOXs (ORCPT ); Thu, 4 Feb 2021 09:23:48 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1612448607; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=xWUv4etC0mcuSIMJ64YH3m+nsTHsH5wo6zjPUMPrOFY=; b=SnOpe79CwSg9Ig4JSSh53CJ+fFnWyXl3psT8rOTXGksWbmQXjYpppbMZN5eRKBlhAGrrp0Ie iazh3X1U74yl9bXJB4s7Ngf1IbbGPMuIEUxfaqBBGKzi7K7AaNVrQhgHTrFsKVhWxojaNWfs AXzoOWvEaOjmvQ5BisDPhtL/k78= X-Mailgun-Sending-Ip: 198.61.254.15 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n06.prod.us-east-1.postgun.com with SMTP id 601c032571c26722934de35c (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Thu, 04 Feb 2021 14:22:29 GMT Sender: mkshah=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id D4558C43465; Thu, 4 Feb 2021 14:22:28 +0000 (UTC) Received: from mkshah-linux.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 24E46C43463; Thu, 4 Feb 2021 14:22:23 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 24E46C43463 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: swboyd@chromium.org, mka@chromium.org, evgreen@chromium.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, agross@kernel.org, dianders@chromium.org, linux@roeck-us.net, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, Maulik Shah , devicetree@vger.kernel.org Subject: [PATCH v6 3/4] arm64: dts: qcom: sc7180: Enable SoC sleep stats Date: Thu, 4 Feb 2021 19:51:47 +0530 Message-Id: <1612448508-9179-4-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1612448508-9179-1-git-send-email-mkshah@codeaurora.org> References: <1612448508-9179-1-git-send-email-mkshah@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add device node for SoC sleep stats driver which provides various low power mode stats. Also update the reg size of aoss_qmp device to 0x400. Cc: devicetree@vger.kernel.org Signed-off-by: Maulik Shah Reviewed-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 11d4f66..273c896 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -3202,7 +3202,7 @@ aoss_qmp: qmp@c300000 { compatible = "qcom,sc7180-aoss-qmp"; - reg = <0 0x0c300000 0 0x100000>; + reg = <0 0x0c300000 0 0x400>; interrupts = ; mboxes = <&apss_shared 0>; @@ -3210,6 +3210,11 @@ #power-domain-cells = <1>; }; + rpmh-sleep-stats@c3f0000 { + compatible = "qcom,rpmh-sleep-stats"; + reg = <0 0x0c3f0000 0 0x400>; + }; + spmi_bus: spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0 0x0c440000 0 0x1100>, From patchwork Thu Feb 4 14:21:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 376418 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D9E4C433E0 for ; Thu, 4 Feb 2021 14:31:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3634A64EE2 for ; Thu, 4 Feb 2021 14:31:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236743AbhBDObm (ORCPT ); Thu, 4 Feb 2021 09:31:42 -0500 Received: from mail29.static.mailgun.info ([104.130.122.29]:56352 "EHLO mail29.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236706AbhBDOXg (ORCPT ); Thu, 4 Feb 2021 09:23:36 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1612448585; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=BYJqW10Z5XD3+jkD5HUPEPJlQDK8eBbec+7dzOARR34=; b=cv75E7oraYFAG5AkUAv5QpuiTU8EHV2xlaLMV6dIH6GzeAeXAUWZIsrvdscooYDQgtrLsgAd o5qsPhccV+mJISgdpv/y8Vorxgkven5XOQQ/pgBoj1IcKKcxWFBakt9Rgi1gQ9aaVaM7P4V4 XV4kvejtTgmFXKe79vRtLHfF1VM= X-Mailgun-Sending-Ip: 104.130.122.29 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n03.prod.us-west-2.postgun.com with SMTP id 601c0329f112b7872c0a3671 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Thu, 04 Feb 2021 14:22:33 GMT Sender: mkshah=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 4F56FC43462; Thu, 4 Feb 2021 14:22:33 +0000 (UTC) Received: from mkshah-linux.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id D7C04C43466; Thu, 4 Feb 2021 14:22:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org D7C04C43466 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: swboyd@chromium.org, mka@chromium.org, evgreen@chromium.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, agross@kernel.org, dianders@chromium.org, linux@roeck-us.net, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, Maulik Shah Subject: [PATCH v6 4/4] arm64: defconfig: Enable SoC sleep stats driver Date: Thu, 4 Feb 2021 19:51:48 +0530 Message-Id: <1612448508-9179-5-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1612448508-9179-1-git-send-email-mkshah@codeaurora.org> References: <1612448508-9179-1-git-send-email-mkshah@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable SoC sleep stats driver. The driver gives statistics for various low power modes on Qualcomm Technologies, Inc. (QTI) SoCs. Signed-off-by: Maulik Shah Reviewed-by: Bjorn Andersson --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index ec377f7..ddc93f7 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -994,6 +994,7 @@ CONFIG_QCOM_SMD_RPM=y CONFIG_QCOM_SMP2P=y CONFIG_QCOM_SMSM=y CONFIG_QCOM_SOCINFO=m +CONFIG_QCOM_SOC_SLEEP_STATS=m CONFIG_QCOM_APR=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y