Patch Metrics

There are 9240 patches submitted by members of this team, and 4021 of those have been accepted upstream.

Patches per month: Submitted Accepted
Time-to-acceptance distribution (in days)
Show patches with: Archived = No       |   9240 patches
« 1 2 3 492 93 »
Patch Series S/W/F Date Submitter Delegate State
[PULL,24/24] target/arm: Only implement doubles if the FPU supports them target-arm queue 0 0 0 2019-06-17 Peter Maydell Not Applicable
[PULL,23/24] target/arm: Fix typos in trans function prototypes target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,22/24] target/arm: Remove unused cpu_F0s, cpu_F0d, cpu_F1s, cpu_F1d target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,21/24] target/arm: Stop using deprecated functions in NEON_2RM_VCVT_F32_F16 target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,20/24] target/arm: stop using deprecated functions in NEON_2RM_VCVT_F16_F32 target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,19/24] target/arm: Stop using cpu_F0s in Neon VCVT fixed-point ops target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,18/24] target/arm: Stop using cpu_F0s for Neon f32/s32 VCVT target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,17/24] target/arm: Stop using cpu_F0s for NEON_2RM_VRECPE_F and NEON_2RM_VRSQRTE_F target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,16/24] target/arm: Stop using cpu_F0s for NEON_2RM_VCVT[ANPM][US] target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,15/24] target/arm: Stop using cpu_F0s for NEON_2RM_VRINT* target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,14/24] target/arm: Stop using cpu_F0s for NEON_2RM_VNEG_F target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,13/24] target/arm: Stop using cpu_F0s for NEON_2RM_VABS_F target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,12/24] target/arm: Use vfp_expand_imm() for AArch32 VFP VMOV_imm target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,11/24] target/arm: Move vfp_expand_imm() to translate.[ch] target-arm queue 0 0 0 2019-06-17 Peter Maydell Not Applicable
[PULL,10/24] hw/intc/arm_gicv3: GICD_TYPER.SecurityExtn is RAZ if GICD_CTLR.DS == 1 target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,09/24] hw/intc/arm_gicv3: Fix decoding of ID register range target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,08/24] hw/arm: Correctly disable FPU/DSP for some ARMSSE-based boards target-arm queue 0 0 0 2019-06-17 Peter Maydell Not Applicable
[PULL,07/24] hw/arm/armv7m: Forward "vfp" and "dsp" properties to CPU target-arm queue 0 0 0 2019-06-17 Peter Maydell Not Applicable
[PULL,06/24] target/arm: Allow M-profile CPUs to disable the DSP extension via CPU property target-arm queue 0 0 0 2019-06-17 Peter Maydell Not Applicable
[PULL,05/24] target/arm: Allow VFP and Neon to be disabled via a CPU property target-arm queue 0 0 0 2019-06-17 Peter Maydell Not Applicable
[PULL,04/24] hw/arm/boot: Honour image size field in AArch64 Image format kernels target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,03/24] hw/arm/boot: Avoid placing the initrd on top of the kernel target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,02/24] hw/arm/boot: Diagnose layouts that put initrd or DTB off the end of RAM target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
[PULL,01/24] hw/arm/boot: Don't assume RAM starts at address zero target-arm queue 0 0 0 2019-06-17 Peter Maydell Accepted
rpmb: write key only if not yet programmed 0 0 0 2019-06-14 Victor Chong Accepted
config.mk: get rid of CFG_TEE_LOGS_PATH 0 0 0 2019-06-14 Victor Chong Accepted
[2/2] target/arm: Only implement doubles if the FPU supports them target/arm: Support single-precision only FPUs 0 0 0 2019-06-14 Peter Maydell Superseded
[1/2] target/arm: Fix typos in trans function prototypes target/arm: Support single-precision only FPUs 0 0 0 2019-06-14 Peter Maydell Accepted
[12/12] target/arm: Remove unused cpu_F0s, cpu_F0d, cpu_F1s, cpu_F1d target/arm: VFP decodetree conversion followups 0 0 0 2019-06-13 Peter Maydell Superseded
[11/12] target/arm: Stop using deprecated functions in NEON_2RM_VCVT_F32_F16 target/arm: VFP decodetree conversion followups 0 0 0 2019-06-13 Peter Maydell Superseded
[10/12] target/arm: stop using deprecated functions in NEON_2RM_VCVT_F16_F32 target/arm: VFP decodetree conversion followups 0 0 0 2019-06-13 Peter Maydell Superseded
[09/12] target/arm: Stop using cpu_F0s in Neon VCVT fixed-point ops target/arm: VFP decodetree conversion followups 0 0 0 2019-06-13 Peter Maydell Superseded
[08/12] target/arm: Stop using cpu_F0s for Neon f32/s32 VCVT target/arm: VFP decodetree conversion followups 0 0 0 2019-06-13 Peter Maydell Superseded
[07/12] target/arm: Stop using cpu_F0s for NEON_2RM_VRECPE_F and NEON_2RM_VRSQRTE_F target/arm: VFP decodetree conversion followups 0 0 0 2019-06-13 Peter Maydell Superseded
[06/12] target/arm: Stop using cpu_F0s for NEON_2RM_VCVT[ANPM][US] target/arm: VFP decodetree conversion followups 0 0 0 2019-06-13 Peter Maydell Superseded
[05/12] target/arm: Stop using cpu_F0s for NEON_2RM_VRINT* target/arm: VFP decodetree conversion followups 0 0 0 2019-06-13 Peter Maydell Superseded
[04/12] target/arm: Stop using cpu_F0s for NEON_2RM_VNEG_F target/arm: VFP decodetree conversion followups 0 0 0 2019-06-13 Peter Maydell Superseded
[03/12] target/arm: Stop using cpu_F0s for NEON_2RM_VABS_F target/arm: VFP decodetree conversion followups 0 0 0 2019-06-13 Peter Maydell Superseded
[02/12] target/arm: Use vfp_expand_imm() for AArch32 VFP VMOV_imm target/arm: VFP decodetree conversion followups 0 0 0 2019-06-13 Peter Maydell Superseded
[01/12] target/arm: Move vfp_expand_imm() to translate.[ch] target/arm: VFP decodetree conversion followups 0 0 0 2019-06-13 Peter Maydell Superseded
[ARM] Add support for "noinit" attribute [ARM] Add support for "noinit" attribute 0 0 0 2019-06-13 Christophe Lyon Superseded
[RISU] arm.risu: Avoid VTRN with Vd == Vm [RISU] arm.risu: Avoid VTRN with Vd == Vm 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,48/48] target/arm: Fix short-vector increment behaviour target-arm queue 0 0 0 2019-06-13 Peter Maydell Not Applicable
[PULL,47/48] target/arm: Convert float-to-integer VCVT insns to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,46/48] target/arm: Convert VCVT fp/fixed-point conversion insns to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,45/48] target/arm: Convert VJCVT to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,44/48] target/arm: Convert integer-to-float insns to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,43/48] target/arm: Convert double-single precision conversion insns to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,42/48] target/arm: Convert VFP round insns to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,41/48] target/arm: Convert the VCVT-to-f16 insns to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,40/48] target/arm: Convert the VCVT-from-f16 insns to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,39/48] target/arm: Convert VFP comparison insns to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,38/48] target/arm: Convert VMOV (register) to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,37/48] target/arm: Convert VSQRT to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,36/48] target/arm: Convert VNEG to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,35/48] target/arm: Convert VABS to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Not Applicable
[PULL,34/48] target/arm: Convert VMOV (imm) to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,33/48] target/arm: Convert VFP fused multiply-add insns to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,32/48] target/arm: Convert VDIV to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,31/48] target/arm: Convert VSUB to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,30/48] target/arm: Convert VADD to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,29/48] target/arm: Convert VNMUL to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,28/48] target/arm: Convert VMUL to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,27/48] target/arm: Convert VFP VNMLA to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,26/48] target/arm: Convert VFP VNMLS to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,25/48] target/arm: Convert VFP VMLS to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,24/48] target/arm: Convert VFP VMLA to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,23/48] target/arm: Remove VLDR/VSTR/VLDM/VSTM use of cpu_F0s and cpu_F0d target-arm queue 0 0 0 2019-06-13 Peter Maydell Not Applicable
[PULL,22/48] target/arm: Convert the VFP load/store multiple insns to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,21/48] target/arm: Convert VFP VLDR and VSTR to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,20/48] target/arm: Convert VFP two-register transfer insns to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,19/48] target/arm: Convert "single-precision" register moves to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,18/48] target/arm: Convert "double-precision" register moves to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,17/48] target/arm: Add helpers for VFP register loads and stores target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,16/48] target/arm: Move the VFP trans_* functions to translate-vfp.inc.c target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,15/48] target/arm: Convert VCVTA/VCVTN/VCVTP/VCVTM to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,14/48] target/arm: Convert VRINTA/VRINTN/VRINTP/VRINTM to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,13/48] target/arm: Convert VMINNM, VMAXNM to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,12/48] target/arm: Convert the VSEL instructions to decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,11/48] target/arm: Explicitly enable VFP short-vectors for aarch32 -cpu max target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,10/48] target/arm: Fix Cortex-R5F MVFR values target-arm queue 0 0 0 2019-06-13 Peter Maydell Not Applicable
[PULL,09/48] target/arm: Factor out VFP access checking code target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,08/48] target/arm: Add stubs for AArch32 VFP decodetree target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,05/48] hw/core/bus.c: Only the main system bus can have no parent target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,04/48] hw/arm/smmuv3: Fix decoding of ID register range target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[PULL,03/48] target/arm: Implement NSACR gating of floating point target-arm queue 0 0 0 2019-06-13 Peter Maydell Accepted
[AARCH64] Fix typo in comment [AARCH64] Fix typo in comment 0 0 0 2019-06-12 Kugan Vivekanandarajah New
[v2,42/42] target/arm: Fix short-vector increment behaviour target/arm: Convert VFP decoder to decodetree 0 0 0 2019-06-11 Peter Maydell Superseded
[v2,41/42] target/arm: Convert float-to-integer VCVT insns to decodetree target/arm: Convert VFP decoder to decodetree 0 0 0 2019-06-11 Peter Maydell Superseded
[v2,40/42] target/arm: Convert VCVT fp/fixed-point conversion insns to decodetree target/arm: Convert VFP decoder to decodetree 0 0 0 2019-06-11 Peter Maydell Superseded
[v2,39/42] target/arm: Convert VJCVT to decodetree target/arm: Convert VFP decoder to decodetree 0 0 0 2019-06-11 Peter Maydell Superseded
[v2,38/42] target/arm: Convert integer-to-float insns to decodetree target/arm: Convert VFP decoder to decodetree 0 0 0 2019-06-11 Peter Maydell Superseded
[v2,37/42] target/arm: Convert double-single precision conversion insns to decodetree target/arm: Convert VFP decoder to decodetree 0 0 0 2019-06-11 Peter Maydell Superseded
[v2,36/42] target/arm: Convert VFP round insns to decodetree target/arm: Convert VFP decoder to decodetree 0 0 0 2019-06-11 Peter Maydell Superseded
[v2,35/42] target/arm: Convert the VCVT-to-f16 insns to decodetree target/arm: Convert VFP decoder to decodetree 0 0 0 2019-06-11 Peter Maydell Superseded
[v2,34/42] target/arm: Convert the VCVT-from-f16 insns to decodetree target/arm: Convert VFP decoder to decodetree 0 0 0 2019-06-11 Peter Maydell Superseded
[v2,33/42] target/arm: Convert VFP comparison insns to decodetree target/arm: Convert VFP decoder to decodetree 0 0 0 2019-06-11 Peter Maydell Superseded
[v2,32/42] target/arm: Convert VMOV (register) to decodetree target/arm: Convert VFP decoder to decodetree 0 0 0 2019-06-11 Peter Maydell Superseded
[v2,31/42] target/arm: Convert VSQRT to decodetree target/arm: Convert VFP decoder to decodetree 0 0 0 2019-06-11 Peter Maydell Superseded
[v2,30/42] target/arm: Convert VNEG to decodetree target/arm: Convert VFP decoder to decodetree 0 0 0 2019-06-11 Peter Maydell Superseded
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