Patch Metrics

There are 12814 patches submitted by members of this team, and 3645 of those have been accepted upstream.

Patches per month: Submitted Accepted
Time-to-acceptance distribution (in days)

Current Members

Show patches with: Series = target-arm queue       |    Archived = No       |   20 patches
Patch Series S/W/F Date Submitter Delegate State
[PULL,36/36] hw/arm/virt: Add board property to enable EL2 target-arm queue --- 2017-01-19 Peter Maydell Not Applicable
[PULL,35/36] target-arm: Enable EL2 feature bit on A53 and A57 target-arm queue --- 2017-01-19 Peter Maydell Not Applicable
[PULL,34/36] target/arm/psci.c: If EL2 implemented, start CPUs in EL2 target-arm queue --- 2017-01-19 Peter Maydell Accepted
[PULL,32/36] hw/arm/virt: Support using SMC for PSCI target-arm queue --- 2017-01-19 Peter Maydell Not Applicable
[PULL,31/36] hw/intc/arm_gicv3: Implement EL2 traps for CPU i/f regs target-arm queue --- 2017-01-19 Peter Maydell Accepted
[PULL,30/36] hw/intc/arm_gicv3: Implement gicv3_cpuif_virt_update() target-arm queue --- 2017-01-19 Peter Maydell Not Applicable
[PULL,29/36] hw/intc/arm_gicv3: Implement ICV_ registers EOIR and IAR target-arm queue --- 2017-01-19 Peter Maydell Accepted
[PULL,28/36] hw/intc/arm_gicv3: Implement ICV_ HPPIR, DIR and RPR registers target-arm queue --- 2017-01-19 Peter Maydell Accepted
[PULL,27/36] hw/intc/arm_gicv3: Implement ICV_ registers which are just accessors target-arm queue --- 2017-01-19 Peter Maydell Accepted
[PULL,26/36] hw/intc/arm_gicv3: Add accessors for ICH_ system registers target-arm queue --- 2017-01-19 Peter Maydell Accepted
[PULL,25/36] hw/intc/gicv3: Add data fields for virtualization support target-arm queue --- 2017-01-19 Peter Maydell Not Applicable
[PULL,24/36] hw/intc/gicv3: Add defines for ICH system register fields target-arm queue --- 2017-01-19 Peter Maydell Accepted
[PULL,23/36] target-arm: Add ARMCPU fields for GIC CPU i/f config target-arm queue --- 2017-01-19 Peter Maydell Accepted
[PULL,22/36] hw/arm/virt: Wire VIRQ, VFIQ, maintenance irq lines from GIC to CPU target-arm queue --- 2017-01-19 Peter Maydell Not Applicable
[PULL,21/36] target-arm: Expose output GPIO line for VCPU maintenance interrupt target-arm queue --- 2017-01-19 Peter Maydell Not Applicable
[PULL,20/36] hw/intc/arm_gic: Add external IRQ lines for VIRQ and VFIQ target-arm queue --- 2017-01-19 Peter Maydell Not Applicable
[PULL,19/36] hw/intc/arm_gicv3: Add external IRQ lines for VIRQ and VFIQ target-arm queue --- 2017-01-19 Peter Maydell Not Applicable
[PULL,17/36] arm: virt: Fix segmentation fault when specifying an unsupported CPU target-arm queue --- 2017-01-19 Peter Maydell Not Applicable
[PULL,06/36] target/arm: Implement DBGVCR32_EL2 system register target-arm queue --- 2017-01-19 Peter Maydell Accepted
[PULL,05/36] target/arm: Handle VIRQ and VFIQ in arm_cpu_do_interrupt_aarch32() target-arm queue --- 2017-01-19 Peter Maydell Accepted