diff mbox

[RFC] ld/ARM: Increase maximum page size to 64kB

Message ID 1403795923-24306-1-git-send-email-will.newton@linaro.org
State Accepted
Headers show

Commit Message

Will Newton June 26, 2014, 3:18 p.m. UTC
Increase the maximum page size to 64kB and align the TEXT_START_ADDR
to a 64kB boundary. This brings AArch32 in line with AArch64 and
improves compatability under certain conditions.

bfd/ChangeLog:

2014-06-26  Will Newton  <will.newton@linaro.org>

	* elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
	value to 64kB and remove custom setting for NaCl.

ld/ChangeLog:

2014-06-26  Will Newton  <will.newton@linaro.org>

	* emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
	alignment to 64kB boundary.

ld/testsuite/ChangeLog:

2014-06-26  Will Newton  <will.newton@linaro.org>

	* ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
	match bfd.
	* ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
	take into account increased segment alignment.
	* ld-arm/ifunc-gdesc.r: Likewise.
	* ld-arm/tls-lib.d: Likewise.
---
 bfd/elf32-arm.c                                | 4 +---
 ld/emulparams/armelf_linux.sh                  | 2 +-
 ld/testsuite/ld-arm/arm-lib.ld                 | 2 +-
 ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d | 4 ++--
 ld/testsuite/ld-arm/ifunc-gdesc.r              | 6 +++---
 ld/testsuite/ld-arm/tls-lib.d                  | 4 ++--
 6 files changed, 10 insertions(+), 12 deletions(-)

Comments

Nick Clifton July 1, 2014, 10:11 a.m. UTC | #1
Hi Will,

> bfd/ChangeLog:
>
> 2014-06-26  Will Newton  <will.newton@linaro.org>
>
> 	* elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
> 	value to 64kB and remove custom setting for NaCl.
>
> ld/ChangeLog:
>
> 2014-06-26  Will Newton  <will.newton@linaro.org>
>
> 	* emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
> 	alignment to 64kB boundary.
>
> ld/testsuite/ChangeLog:
>
> 2014-06-26  Will Newton  <will.newton@linaro.org>
>
> 	* ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
> 	match bfd.
> 	* ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
> 	take into account increased segment alignment.
> 	* ld-arm/ifunc-gdesc.r: Likewise.
> 	* ld-arm/tls-lib.d: Likewise.

Approved - please apply.

Cheers
   Nick
Will Newton July 8, 2014, 2:02 p.m. UTC | #2
On 1 July 2014 11:11, Nicholas Clifton <nickc@redhat.com> wrote:
> Hi Will,
>
>
>> bfd/ChangeLog:
>>
>> 2014-06-26  Will Newton  <will.newton@linaro.org>
>>
>>         * elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
>>         value to 64kB and remove custom setting for NaCl.
>>
>> ld/ChangeLog:
>>
>> 2014-06-26  Will Newton  <will.newton@linaro.org>
>>
>>         * emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
>>         alignment to 64kB boundary.
>>
>> ld/testsuite/ChangeLog:
>>
>> 2014-06-26  Will Newton  <will.newton@linaro.org>
>>
>>         * ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
>>         match bfd.
>>         * ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
>>         take into account increased segment alignment.
>>         * ld-arm/ifunc-gdesc.r: Likewise.
>>         * ld-arm/tls-lib.d: Likewise.
>
>
> Approved - please apply.

Thanks. If anybody sees any breakage then please shout.
Kyrylo Tkachov July 10, 2014, 8:52 a.m. UTC | #3
On 08/07/14 15:02, Will Newton wrote:
> On 1 July 2014 11:11, Nicholas Clifton <nickc@redhat.com> wrote:
>> Hi Will,
>>
>>
>>> bfd/ChangeLog:
>>>
>>> 2014-06-26  Will Newton  <will.newton@linaro.org>
>>>
>>>          * elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
>>>          value to 64kB and remove custom setting for NaCl.
>>>
>>> ld/ChangeLog:
>>>
>>> 2014-06-26  Will Newton  <will.newton@linaro.org>
>>>
>>>          * emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
>>>          alignment to 64kB boundary.
>>>
>>> ld/testsuite/ChangeLog:
>>>
>>> 2014-06-26  Will Newton  <will.newton@linaro.org>
>>>
>>>          * ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
>>>          match bfd.
>>>          * ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
>>>          take into account increased segment alignment.
>>>          * ld-arm/ifunc-gdesc.r: Likewise.
>>>          * ld-arm/tls-lib.d: Likewise.
>>
>> Approved - please apply.
> Thanks. If anybody sees any breakage then please shout.
Hi Will,

In the libstdc++ tetsuite I'm seeing some failures of the sort:

/arm-none-eabi/install/arm-none-eabi/bin/ld: warning: address of 
`text-segment' isn't multiple of maximum page size

FAIL: 17_intro/freestanding.cc (test for excess errors)

I haven't dug into it yet, but your patch is the first that came to mind 
when seeing this.
Is that a problem in gcc/libstdc++?

Thanks,
Kyrill
Will Newton July 10, 2014, 11 a.m. UTC | #4
On 10 July 2014 09:52, Kyrill Tkachov <kyrylo.tkachov@arm.com> wrote:
>
> On 08/07/14 15:02, Will Newton wrote:
>>
>> On 1 July 2014 11:11, Nicholas Clifton <nickc@redhat.com> wrote:
>>>
>>> Hi Will,
>>>
>>>
>>>> bfd/ChangeLog:
>>>>
>>>> 2014-06-26  Will Newton  <will.newton@linaro.org>
>>>>
>>>>          * elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
>>>>          value to 64kB and remove custom setting for NaCl.
>>>>
>>>> ld/ChangeLog:
>>>>
>>>> 2014-06-26  Will Newton  <will.newton@linaro.org>
>>>>
>>>>          * emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
>>>>          alignment to 64kB boundary.
>>>>
>>>> ld/testsuite/ChangeLog:
>>>>
>>>> 2014-06-26  Will Newton  <will.newton@linaro.org>
>>>>
>>>>          * ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
>>>>          match bfd.
>>>>          * ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
>>>>          take into account increased segment alignment.
>>>>          * ld-arm/ifunc-gdesc.r: Likewise.
>>>>          * ld-arm/tls-lib.d: Likewise.
>>>
>>>
>>> Approved - please apply.
>>
>> Thanks. If anybody sees any breakage then please shout.
>
> Hi Will,
>
> In the libstdc++ tetsuite I'm seeing some failures of the sort:
>
> /arm-none-eabi/install/arm-none-eabi/bin/ld: warning: address of
> `text-segment' isn't multiple of maximum page size
>
> FAIL: 17_intro/freestanding.cc (test for excess errors)
>
> I haven't dug into it yet, but your patch is the first that came to mind
> when seeing this.
> Is that a problem in gcc/libstdc++?

I'm not sure, but it would be interesting to find out. Do you have any
more information e.g. command line or linker script being used?

It seems that building libstdc++ involves building the whole of gcc. :-/
Kyrylo Tkachov July 16, 2014, 8:18 a.m. UTC | #5
On 10/07/14 12:00, Will Newton wrote:
> On 10 July 2014 09:52, Kyrill Tkachov <kyrylo.tkachov@arm.com> wrote:
>> On 08/07/14 15:02, Will Newton wrote:
>>> On 1 July 2014 11:11, Nicholas Clifton <nickc@redhat.com> wrote:
>>>> Hi Will,
>>>>
>>>>
>>>>> bfd/ChangeLog:
>>>>>
>>>>> 2014-06-26  Will Newton  <will.newton@linaro.org>
>>>>>
>>>>>           * elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
>>>>>           value to 64kB and remove custom setting for NaCl.
>>>>>
>>>>> ld/ChangeLog:
>>>>>
>>>>> 2014-06-26  Will Newton  <will.newton@linaro.org>
>>>>>
>>>>>           * emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
>>>>>           alignment to 64kB boundary.
>>>>>
>>>>> ld/testsuite/ChangeLog:
>>>>>
>>>>> 2014-06-26  Will Newton  <will.newton@linaro.org>
>>>>>
>>>>>           * ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
>>>>>           match bfd.
>>>>>           * ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
>>>>>           take into account increased segment alignment.
>>>>>           * ld-arm/ifunc-gdesc.r: Likewise.
>>>>>           * ld-arm/tls-lib.d: Likewise.
>>>>
>>>> Approved - please apply.
>>> Thanks. If anybody sees any breakage then please shout.
>> Hi Will,
>>
>> In the libstdc++ tetsuite I'm seeing some failures of the sort:
>>
>> /arm-none-eabi/install/arm-none-eabi/bin/ld: warning: address of
>> `text-segment' isn't multiple of maximum page size
>>
>> FAIL: 17_intro/freestanding.cc (test for excess errors)
>>
>> I haven't dug into it yet, but your patch is the first that came to mind
>> when seeing this.
>> Is that a problem in gcc/libstdc++?
> I'm not sure, but it would be interesting to find out. Do you have any
> more information e.g. command line or linker script being used?

Hi Will,
Sorry for the delay. The warning I was seeing was due to some bare-metal 
specs files that I was using placing the text segment at a 
non-64k-aligned position.
That's not a problem with this patch.

Kyrill

>
> It seems that building libstdc++ involves building the whole of gcc. :-/
>
diff mbox

Patch

diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index 1c6965e..e6f4a9f 100644
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -16100,7 +16100,7 @@  elf32_arm_get_synthetic_symtab (bfd *abfd,
 #ifdef __QNXTARGET__
 #define ELF_MAXPAGESIZE			0x1000
 #else
-#define ELF_MAXPAGESIZE			0x8000
+#define ELF_MAXPAGESIZE			0x10000
 #endif
 #define ELF_MINPAGESIZE			0x1000
 #define ELF_COMMONPAGESIZE		0x1000
@@ -16250,8 +16250,6 @@  elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
 #undef  elf_backend_plt_sym_val
 #define elf_backend_plt_sym_val			elf32_arm_nacl_plt_sym_val
 
-#undef	ELF_MAXPAGESIZE
-#define ELF_MAXPAGESIZE			0x10000
 #undef	ELF_MINPAGESIZE
 #undef	ELF_COMMONPAGESIZE
 
diff --git a/ld/emulparams/armelf_linux.sh b/ld/emulparams/armelf_linux.sh
index 35891f1..280db84 100644
--- a/ld/emulparams/armelf_linux.sh
+++ b/ld/emulparams/armelf_linux.sh
@@ -17,7 +17,7 @@  OTHER_BSS_END_SYMBOLS='_bss_end__ = . ; __bss_end__ = . ;'
 OTHER_END_SYMBOLS='__end__ = . ;'
 OTHER_SECTIONS='.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }'
 
-TEXT_START_ADDR=0x00008000
+TEXT_START_ADDR=0x00010000
 TARGET2_TYPE=got-rel
 
 # ARM does not support .s* sections.
diff --git a/ld/testsuite/ld-arm/arm-lib.ld b/ld/testsuite/ld-arm/arm-lib.ld
index f158c23..f946d0a 100644
--- a/ld/testsuite/ld-arm/arm-lib.ld
+++ b/ld/testsuite/ld-arm/arm-lib.ld
@@ -75,7 +75,7 @@  SECTIONS
   .gcc_except_table   : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) }
   /* Adjust the address for the data segment.  We want to adjust up to
      the same address within the page on the next page up.  */
-  . = ALIGN (0x8000) - ((0x8000 - .) & (0x8000 - 1)); . = DATA_SEGMENT_ALIGN (0x8000, 0x1000);
+  . = ALIGN (0x10000) - ((0x10000 - .) & (0x10000 - 1)); . = DATA_SEGMENT_ALIGN (0x10000, 0x1000);
   /* Exception handling  */
   .eh_frame       : ONLY_IF_RW { KEEP (*(.eh_frame)) }
   .gcc_except_table   : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) }
diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d b/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d
index e2fd8ac..ba1f537 100644
--- a/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d
+++ b/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d
@@ -9,10 +9,10 @@  Disassembly of section \.plt:
     8e04:	e59fe004 	ldr	lr, \[pc, #4\]	; 8e10 <targetfn@plt-0x4>
     8e08:	e08fe00e 	add	lr, pc, lr
     8e0c:	e5bef008 	ldr	pc, \[lr, #8\]!
-    8e10:	0000827c 	\.word	0x0000827c
+    8e10:	0001027c 	\.word	0x0001027c
 00008e14 <targetfn@plt>:
     8e14:	e28fc600 	add	ip, pc, #0, 12
-    8e18:	e28cca08 	add	ip, ip, #8, 20	; 0x8000
+    8e18:	e28cca10 	add	ip, ip, #16, 20	; 0x10000
     8e1c:	e5bcf27c 	ldr	pc, \[ip, #636\]!	; 0x27c
 
 Disassembly of section \.text:
diff --git a/ld/testsuite/ld-arm/ifunc-gdesc.r b/ld/testsuite/ld-arm/ifunc-gdesc.r
index a49dd2b..20f5ccc 100644
--- a/ld/testsuite/ld-arm/ifunc-gdesc.r
+++ b/ld/testsuite/ld-arm/ifunc-gdesc.r
@@ -1,6 +1,6 @@ 
 tmpdir/ifunc-gdesc.so:     file format elf32-(big|little)arm
 DYNAMIC RELOCATION RECORDS
 OFFSET   TYPE              VALUE 
-0000825c R_ARM_IRELATIVE   \*ABS\*
-00008248 R_ARM_TLS_DESC    \*ABS\*
-00008250 R_ARM_TLS_DESC    \*ABS\*
+0001025c R_ARM_IRELATIVE   \*ABS\*
+00010248 R_ARM_TLS_DESC    \*ABS\*
+00010250 R_ARM_TLS_DESC    \*ABS\*
diff --git a/ld/testsuite/ld-arm/tls-lib.d b/ld/testsuite/ld-arm/tls-lib.d
index a299fba..440d1d3 100644
--- a/ld/testsuite/ld-arm/tls-lib.d
+++ b/ld/testsuite/ld-arm/tls-lib.d
@@ -10,6 +10,6 @@  Disassembly of section .text:
  .*:	e1a00000 	nop			; \(mov r0, r0\)
  .*:	e1a00000 	nop			; \(mov r0, r0\)
  .*:	e1a0f00e 	mov	pc, lr
- .*:	00008098 	.word	0x00008098
- .*:	0000808c 	.word	0x0000808c
+ .*:	00010098 	.word	0x00010098
+ .*:	0001008c 	.word	0x0001008c
  .*:	00000004 	.word	0x00000004