| Message ID | 1369924733-18701-2-git-send-email-julien.grall@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
On Thu, 2013-05-30 at 15:38 +0100, Julien Grall wrote: > diff --git a/xen/arch/arm/arm32/vfp.c b/xen/arch/arm/arm32/vfp.c > new file mode 100644 > index 0000000..16f635a > --- /dev/null > +++ b/xen/arch/arm/arm32/vfp.c > @@ -0,0 +1,71 @@ > +#include <xen/sched.h> > +#include <asm/processor.h> > +#include <asm/vfp.h> > + > +void vfp_save_state(struct vcpu *v) > +{ [...] > +} > + > +void vfp_restore_state(struct vcpu *v) > +{ [...] Without having read the documentation this seem plausible enough. > +} > + > +/* > + * Local variables: > + * mode: C > + * c-file-style: "BSD" > + * c-basic-offset: 4 > + * indent-tabs-mode: nil > + * End: > + */ > diff --git a/xen/include/asm-arm/arm64/vfp.h b/xen/include/asm-arm/arm64/vfp.h > new file mode 100644 > index 0000000..34cd202 > --- /dev/null > +++ b/xen/include/asm-arm/arm64/vfp.h > @@ -0,0 +1,16 @@ > +#ifndef _ARM_ARM64_VFP_H > +#define _ARM_ARM32_VFP_H Mismatch. > + > +struct vfp_state > +{ > +}; > + > +#endif /* _ARM_ARM32_VFP_H */ And again. > +/* > + * Local variables: > + * mode: C > + * c-file-style: "BSD" > + * c-basic-offset: 4 > + * indent-tabs-mode: nil > + * End: > + */ > diff --git a/xen/include/asm-arm/cpregs.h b/xen/include/asm-arm/cpregs.h > index f08d59a..d99ccfd 100644 > --- a/xen/include/asm-arm/cpregs.h > +++ b/xen/include/asm-arm/cpregs.h > @@ -60,6 +60,12 @@ > * arguments, which are cp,opc1,crn,crm,opc2. > */ > + /* Coprocessor 10 */ Please. > +#define FPSCR p10,7,c1,c0,0 /* Floating-Point Status and Control Register */ > +#define MVFR0 p10,7,c7,c0,0 /* Media and VFP Feature Register 0 */ > +#define FPEXC p10,7,c8,c0,0 /* Floating-Point Exception Control Register */ > +#define FPINST p10,7,c9,c0,0 /* Floating-Point Instruction Register */ > +#define FPINST2 p10,7,c10,c0,0 /* Floating-point Instruction Register 2 */ > + > /* Coprocessor 14 */ > > /* CP14 CR0: */ > @@ -106,6 +112,7 @@ > #define NSACR p15,0,c1,c1,2 /* Non-Secure Access Control Register */ > #define HSCTLR p15,4,c1,c0,0 /* Hyp. System Control Register */ > #define HCR p15,4,c1,c1,0 /* Hyp. Configuration Register */ > +#define HCPTR p15,4,c1,c1,2 /* Hyp. Coprocessor Trap Register */ > > /* CP15 CR2: Translation Table Base and Control Registers */ > #define TTBCR p15,0,c2,c0,2 /* Translatation Table Base Control Register */ > diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h > index cb251cc..6b52b5e 100644 > --- a/xen/include/asm-arm/domain.h > +++ b/xen/include/asm-arm/domain.h > @@ -1,11 +1,13 @@ > #ifndef __ASM_DOMAIN_H__ > #define __ASM_DOMAIN_H__ > > +#include <asm/atomic.h> What is this used for? > #include <xen/config.h> > #include <xen/cache.h> > #include <xen/sched.h> > #include <asm/page.h> > #include <asm/p2m.h> > +#include <asm/vfp.h> > #include <public/hvm/params.h> > > /* Represents state corresponding to a block of 32 interrupts */ > diff --git a/xen/include/asm-arm/vfp.h b/xen/include/asm-arm/vfp.h > index b800816..6ba3cd1 100644 > --- a/xen/include/asm-arm/vfp.h > +++ b/xen/include/asm-arm/vfp.h > @@ -2,7 +2,14 @@ > #define __ARM_VFP_H_ > > #include <xen/types.h> > +#include <xen/sched.h> > +#if defined(CONFIG_ARM_32) > +# include <asm/arm32/vfp.h> > +#elif defined(CONFIG_ARM_64) > +# include <asm/arm64/vfp.h> Did you mean to include a #else here? > +# error "Unknown ARM variant" > +#endif > > #ifdef CONFIG_ARM_32 I suppose the content of this #if now belongs in the subarch header. > > @@ -32,6 +39,9 @@ static inline void enable_vfp(void) > } > #endif > > +void vfp_save_state(struct vcpu *v); > +void vfp_restore_state(struct vcpu *v); > + > #endif > /* > * Local variables:
On 05/30/2013 04:11 PM, Ian Campbell wrote: > On Thu, 2013-05-30 at 15:38 +0100, Julien Grall wrote: >> diff --git a/xen/arch/arm/arm32/vfp.c b/xen/arch/arm/arm32/vfp.c >> new file mode 100644 >> index 0000000..16f635a >> --- /dev/null >> +++ b/xen/arch/arm/arm32/vfp.c >> @@ -0,0 +1,71 @@ >> +#include <xen/sched.h> >> +#include <asm/processor.h> >> +#include <asm/vfp.h> >> + >> +void vfp_save_state(struct vcpu *v) >> +{ > [...] >> +} >> + >> +void vfp_restore_state(struct vcpu *v) >> +{ > [...] > > Without having read the documentation this seem plausible enough. > >> +} >> + >> +/* >> + * Local variables: >> + * mode: C >> + * c-file-style: "BSD" >> + * c-basic-offset: 4 >> + * indent-tabs-mode: nil >> + * End: >> + */ >> diff --git a/xen/include/asm-arm/arm64/vfp.h b/xen/include/asm-arm/arm64/vfp.h >> new file mode 100644 >> index 0000000..34cd202 >> --- /dev/null >> +++ b/xen/include/asm-arm/arm64/vfp.h >> @@ -0,0 +1,16 @@ >> +#ifndef _ARM_ARM64_VFP_H >> +#define _ARM_ARM32_VFP_H > > Mismatch. > >> + >> +struct vfp_state >> +{ >> +}; >> + >> +#endif /* _ARM_ARM32_VFP_H */ > > And again. > >> +/* >> + * Local variables: >> + * mode: C >> + * c-file-style: "BSD" >> + * c-basic-offset: 4 >> + * indent-tabs-mode: nil >> + * End: >> + */ >> diff --git a/xen/include/asm-arm/cpregs.h b/xen/include/asm-arm/cpregs.h >> index f08d59a..d99ccfd 100644 >> --- a/xen/include/asm-arm/cpregs.h >> +++ b/xen/include/asm-arm/cpregs.h >> @@ -60,6 +60,12 @@ >> * arguments, which are cp,opc1,crn,crm,opc2. >> */ >> > > + /* Coprocessor 10 */ > > Please. > >> +#define FPSCR p10,7,c1,c0,0 /* Floating-Point Status and Control Register */ >> +#define MVFR0 p10,7,c7,c0,0 /* Media and VFP Feature Register 0 */ >> +#define FPEXC p10,7,c8,c0,0 /* Floating-Point Exception Control Register */ >> +#define FPINST p10,7,c9,c0,0 /* Floating-Point Instruction Register */ >> +#define FPINST2 p10,7,c10,c0,0 /* Floating-point Instruction Register 2 */ >> + >> /* Coprocessor 14 */ >> >> /* CP14 CR0: */ >> @@ -106,6 +112,7 @@ >> #define NSACR p15,0,c1,c1,2 /* Non-Secure Access Control Register */ >> #define HSCTLR p15,4,c1,c0,0 /* Hyp. System Control Register */ >> #define HCR p15,4,c1,c1,0 /* Hyp. Configuration Register */ >> +#define HCPTR p15,4,c1,c1,2 /* Hyp. Coprocessor Trap Register */ >> >> /* CP15 CR2: Translation Table Base and Control Registers */ >> #define TTBCR p15,0,c2,c0,2 /* Translatation Table Base Control Register */ >> diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h >> index cb251cc..6b52b5e 100644 >> --- a/xen/include/asm-arm/domain.h >> +++ b/xen/include/asm-arm/domain.h >> @@ -1,11 +1,13 @@ >> #ifndef __ASM_DOMAIN_H__ >> #define __ASM_DOMAIN_H__ >> >> +#include <asm/atomic.h> > > What is this used for? Lost line. I will remove it. > >> #include <xen/config.h> >> #include <xen/cache.h> >> #include <xen/sched.h> >> #include <asm/page.h> >> #include <asm/p2m.h> >> +#include <asm/vfp.h> >> #include <public/hvm/params.h> >> >> /* Represents state corresponding to a block of 32 interrupts */ >> diff --git a/xen/include/asm-arm/vfp.h b/xen/include/asm-arm/vfp.h >> index b800816..6ba3cd1 100644 >> --- a/xen/include/asm-arm/vfp.h >> +++ b/xen/include/asm-arm/vfp.h >> @@ -2,7 +2,14 @@ >> #define __ARM_VFP_H_ >> >> #include <xen/types.h> >> +#include <xen/sched.h> > >> +#if defined(CONFIG_ARM_32) >> +# include <asm/arm32/vfp.h> >> +#elif defined(CONFIG_ARM_64) >> +# include <asm/arm64/vfp.h> > > Did you mean to include a #else here? Yes. It was lost during the creation of the patch. I will pay more attention in the next patch series. > >> +# error "Unknown ARM variant" >> +#endif >> >> #ifdef CONFIG_ARM_32 > > I suppose the content of this #if now belongs in the subarch header. This part is removed in the next patch. I was thinking to invert the 2 patch as the second patch doesn't need the first one (except for the diff). > >> >> @@ -32,6 +39,9 @@ static inline void enable_vfp(void) >> } >> #endif >> >> +void vfp_save_state(struct vcpu *v); >> +void vfp_restore_state(struct vcpu *v); >> + >> #endif >> /* >> * Local variables: > >
diff --git a/xen/arch/arm/arm32/Makefile b/xen/arch/arm/arm32/Makefile index aaf277a..b903803 100644 --- a/xen/arch/arm/arm32/Makefile +++ b/xen/arch/arm/arm32/Makefile @@ -6,5 +6,6 @@ obj-y += proc-ca15.o obj-y += traps.o obj-y += domain.o +obj-y += vfp.o obj-$(EARLY_PRINTK) += debug.o diff --git a/xen/arch/arm/arm32/vfp.c b/xen/arch/arm/arm32/vfp.c new file mode 100644 index 0000000..16f635a --- /dev/null +++ b/xen/arch/arm/arm32/vfp.c @@ -0,0 +1,71 @@ +#include <xen/sched.h> +#include <asm/processor.h> +#include <asm/vfp.h> + +void vfp_save_state(struct vcpu *v) +{ + uint32_t tmp; + + v->arch.vfp.fpexc = READ_CP32(FPEXC); + + WRITE_CP32(v->arch.vfp.fpexc | FPEXC_EN, FPEXC); + + v->arch.vfp.fpscr = READ_CP32(FPSCR); + + if ( v->arch.vfp.fpexc & FPEXC_EX ) /* Check for sub-architecture */ + { + v->arch.vfp.fpinst = READ_CP32(FPINST); + + if ( v->arch.vfp.fpexc & FPEXC_FP2V ) + v->arch.vfp.fpinst2 = READ_CP32(FPINST2); + /* Disable FPEXC_EX */ + WRITE_CP32((v->arch.vfp.fpexc | FPEXC_EN) & ~FPEXC_EX, FPEXC); + } + + /* Save {d0-d15} */ + asm volatile("stc p11, cr0, [%0], #32*4" : : "r" (v->arch.vfp.fpregs1)); + + tmp = READ_CP32(MVFR0); + if ( (tmp & MVFR0_A_SIMD_MASK) == 2 ) /* 32 x 64 bits registers */ + { + /* Save {d16-d31} */ + asm volatile("stcl p11, cr0, [%0], #32*4" : : "r" (v->arch.vfp.fpregs2)); + } + + WRITE_CP32(v->arch.vfp.fpexc & ~(FPEXC_EN), FPEXC); +} + +void vfp_restore_state(struct vcpu *v) +{ + uint32_t tmp = READ_CP32(FPEXC); + + WRITE_CP32(tmp | FPEXC_EN, FPEXC); + + /* Restore {d0-d15} */ + asm volatile("ldc p11, cr0, [%0], #32*4" : : "r" (v->arch.vfp.fpregs1)); + + tmp = READ_CP32(MVFR0); + if ( (tmp & MVFR0_A_SIMD_MASK) == 2 ) /* 32 x 64 bits registers */ + /* Restore {d16-d31} */ + asm volatile("ldcl p11, cr0, [%0], #32*4" : : "r" (v->arch.vfp.fpregs2)); + + if ( v->arch.vfp.fpexc & FPEXC_EX ) + { + WRITE_CP32(v->arch.vfp.fpinst, FPINST); + if ( v->arch.vfp.fpexc & FPEXC_FP2V ) + WRITE_CP32(v->arch.vfp.fpinst2, FPINST2); + } + + WRITE_CP32(v->arch.vfp.fpscr, FPSCR); + + WRITE_CP32(v->arch.vfp.fpexc, FPEXC); +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/arm64/Makefile b/xen/arch/arm/arm64/Makefile index 9484548..e06a0a9 100644 --- a/xen/arch/arm/arm64/Makefile +++ b/xen/arch/arm/arm64/Makefile @@ -5,5 +5,6 @@ obj-y += mode_switch.o obj-y += traps.o obj-y += domain.o +obj-y += vfp.o obj-$(EARLY_PRINTK) += debug.o diff --git a/xen/arch/arm/arm64/vfp.c b/xen/arch/arm/arm64/vfp.c new file mode 100644 index 0000000..74e6a50 --- /dev/null +++ b/xen/arch/arm/arm64/vfp.c @@ -0,0 +1,13 @@ +#include <xen/sched.h> +#include <asm/processor.h> +#include <asm/vfp.h> + +void vfp_save_state(struct vcpu *v) +{ + /* TODO: implement it */ +} + +void vfp_restore_state(struct vcpu *v) +{ + /* TODO: implement it */ +} diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 4c434a1..f465ab7 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -27,6 +27,7 @@ #include <asm/p2m.h> #include <asm/irq.h> #include <asm/cpufeature.h> +#include <asm/vfp.h> #include <asm/gic.h> #include "vtimer.h" @@ -117,7 +118,8 @@ static void ctxt_switch_from(struct vcpu *p) /* XXX MPU */ - /* XXX VFP */ + /* VFP */ + vfp_save_state(p); /* VGIC */ gic_save_state(p); @@ -143,7 +145,8 @@ static void ctxt_switch_to(struct vcpu *n) /* VGIC */ gic_restore_state(n); - /* XXX VFP */ + /* VFP */ + vfp_restore_state(n); /* XXX MPU */ diff --git a/xen/include/asm-arm/arm32/vfp.h b/xen/include/asm-arm/arm32/vfp.h new file mode 100644 index 0000000..c32296e --- /dev/null +++ b/xen/include/asm-arm/arm32/vfp.h @@ -0,0 +1,29 @@ +#ifndef _ARM_ARM32_VFP_H +#define _ARM_ARM32_VFP_H + +#define FPEXC_EX (1u << 31) +#define FPEXC_EN (1u << 30) +#define FPEXC_FP2V (1u << 28) + +#define MVFR0_A_SIMD_MASK (0xf << 0) + +struct vfp_state +{ + uint64_t fpregs1[16]; /* {d0-d15} */ + uint64_t fpregs2[16]; /* {d16-d31} */ + uint32_t fpexc; + uint32_t fpscr; + /* VFP implementation specific state */ + uint32_t fpinst; + uint32_t fpinst2; +}; + +#endif /* _ARM_ARM32_VFP_H */ +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/arm64/vfp.h b/xen/include/asm-arm/arm64/vfp.h new file mode 100644 index 0000000..34cd202 --- /dev/null +++ b/xen/include/asm-arm/arm64/vfp.h @@ -0,0 +1,16 @@ +#ifndef _ARM_ARM64_VFP_H +#define _ARM_ARM32_VFP_H + +struct vfp_state +{ +}; + +#endif /* _ARM_ARM32_VFP_H */ +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/cpregs.h b/xen/include/asm-arm/cpregs.h index f08d59a..d99ccfd 100644 --- a/xen/include/asm-arm/cpregs.h +++ b/xen/include/asm-arm/cpregs.h @@ -60,6 +60,12 @@ * arguments, which are cp,opc1,crn,crm,opc2. */ +#define FPSCR p10,7,c1,c0,0 /* Floating-Point Status and Control Register */ +#define MVFR0 p10,7,c7,c0,0 /* Media and VFP Feature Register 0 */ +#define FPEXC p10,7,c8,c0,0 /* Floating-Point Exception Control Register */ +#define FPINST p10,7,c9,c0,0 /* Floating-Point Instruction Register */ +#define FPINST2 p10,7,c10,c0,0 /* Floating-point Instruction Register 2 */ + /* Coprocessor 14 */ /* CP14 CR0: */ @@ -106,6 +112,7 @@ #define NSACR p15,0,c1,c1,2 /* Non-Secure Access Control Register */ #define HSCTLR p15,4,c1,c0,0 /* Hyp. System Control Register */ #define HCR p15,4,c1,c1,0 /* Hyp. Configuration Register */ +#define HCPTR p15,4,c1,c1,2 /* Hyp. Coprocessor Trap Register */ /* CP15 CR2: Translation Table Base and Control Registers */ #define TTBCR p15,0,c2,c0,2 /* Translatation Table Base Control Register */ diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h index cb251cc..6b52b5e 100644 --- a/xen/include/asm-arm/domain.h +++ b/xen/include/asm-arm/domain.h @@ -1,11 +1,13 @@ #ifndef __ASM_DOMAIN_H__ #define __ASM_DOMAIN_H__ +#include <asm/atomic.h> #include <xen/config.h> #include <xen/cache.h> #include <xen/sched.h> #include <asm/page.h> #include <asm/p2m.h> +#include <asm/vfp.h> #include <public/hvm/params.h> /* Represents state corresponding to a block of 32 interrupts */ @@ -188,6 +190,9 @@ struct arch_vcpu uint32_t joscr, jmcr; #endif + /* Float-pointer */ + struct vfp_state vfp; + /* CP 15 */ uint32_t csselr; diff --git a/xen/include/asm-arm/vfp.h b/xen/include/asm-arm/vfp.h index b800816..6ba3cd1 100644 --- a/xen/include/asm-arm/vfp.h +++ b/xen/include/asm-arm/vfp.h @@ -2,7 +2,14 @@ #define __ARM_VFP_H_ #include <xen/types.h> +#include <xen/sched.h> +#if defined(CONFIG_ARM_32) +# include <asm/arm32/vfp.h> +#elif defined(CONFIG_ARM_64) +# include <asm/arm64/vfp.h> +# error "Unknown ARM variant" +#endif #ifdef CONFIG_ARM_32 @@ -32,6 +39,9 @@ static inline void enable_vfp(void) } #endif +void vfp_save_state(struct vcpu *v); +void vfp_restore_state(struct vcpu *v); + #endif /* * Local variables:
Add support for VFP context switch on arm32 and a dummy support for arm64 Signed-off-by: Julien Grall <julien.grall@linaro.org> --- xen/arch/arm/arm32/Makefile | 1 + xen/arch/arm/arm32/vfp.c | 71 +++++++++++++++++++++++++++++++++++++++ xen/arch/arm/arm64/Makefile | 1 + xen/arch/arm/arm64/vfp.c | 13 +++++++ xen/arch/arm/domain.c | 7 ++-- xen/include/asm-arm/arm32/vfp.h | 29 ++++++++++++++++ xen/include/asm-arm/arm64/vfp.h | 16 +++++++++ xen/include/asm-arm/cpregs.h | 7 ++++ xen/include/asm-arm/domain.h | 5 +++ xen/include/asm-arm/vfp.h | 10 ++++++ 10 files changed, 158 insertions(+), 2 deletions(-) create mode 100644 xen/arch/arm/arm32/vfp.c create mode 100644 xen/arch/arm/arm64/vfp.c create mode 100644 xen/include/asm-arm/arm32/vfp.h create mode 100644 xen/include/asm-arm/arm64/vfp.h