| Message ID | 1459415459-8107-1-git-send-email-linus.walleij@linaro.org |
|---|---|
| State | Accepted |
| Commit | 75c004df525e3bda38dfac1f0e8eff7fe515a0ab |
| Headers | show |
On Thu, Mar 31, 2016 at 4:52 PM, Neil Armstrong <narmstrong@baylibre.com> wrote: > On 03/31/2016 04:48 PM, Rob Herring wrote: >>>> We generally avoid indexing blocks in DT. >> >> Which is a global number space that might not work in all cases. I >> don't think gpio should be using aliases either. If you need to >> describe the connections between nodes, then keep that between nodes. > > Couldn't we use gpio-ranges ? GPIO ranges are normally for cross-referencing GPIO blocks to pin controllers but in essence, yes we *could*. But what people will do is to use that backwards to calculate the bank ID. They would just get the GPIO base offset from the range and /32 to get the bank ID. All over the place... Also for GPIO controllers without pin control back-ends. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt index 069cdf6f9dac..f509ecf03ece 100644 --- a/Documentation/devicetree/bindings/gpio/gpio.txt +++ b/Documentation/devicetree/bindings/gpio/gpio.txt @@ -131,6 +131,19 @@ Every GPIO controller node must contain both an empty "gpio-controller" property, and a #gpio-cells integer property, which indicates the number of cells in a gpio-specifier. +Some system-on-chips (SoCs) use the concept of GPIO banks. A GPIO bank is an +instance of a hardware IP core on a silicon die, usually exposed to the +programmer as a coherent range of I/O addresses. Usually each such bank is +exposed in the device tree as an individual gpio-controller node, reflecting +the fact that the hardware was synthesized by reusing the same IP block a +few times over. + +A GPIO controller may specify a bank ID. This is a hardware index that +indicate the logical order of the GPIO controller in the hardware architecture, +usually in the sequence 0, 1, 2 .. n. The hardware index may be different +from the order of register ranges and related to the backplane of how this +one bank is connected to the outside through a pin controller for example. + Optionally, a GPIO controller may have a "ngpios" property. This property indicates the number of in-use slots of available slots for GPIOs. The typical example is something like this: the hardware register is 32 bits @@ -152,6 +165,7 @@ gpio-controller@00000000 { reg = <0x00000000 0x1000>; gpio-controller; #gpio-cells = <2>; + gpio-bank = <0>; ngpios = <18>; }
Cc: devicetree@vger.kernel.org Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- Documentation/devicetree/bindings/gpio/gpio.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.4.3 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html