diff mbox

[v2] serial: 8250_dw: Improve unwritable LCR workaround

Message ID 1380647888-32473-1-git-send-email-tim.kryger@linaro.org
State Accepted
Commit c49436b657d0a56a6ad90d14a7c3041add7cf64d
Headers show

Commit Message

Tim Kryger Oct. 1, 2013, 5:18 p.m. UTC
When configured with UART_16550_COMPATIBLE=NO or in versions prior to
the introduction of this option, the Designware UART will ignore writes
to the LCR if the UART is busy.  The current workaround saves a copy of
the last written LCR and re-writes it in the ISR for a special interrupt
that is raised when a write was ignored.

Unfortunately, interrupts are typically disabled prior to performing a
sequence of register writes that include the LCR so the point at which
the retry occurs is too late.  An example is serial8250_do_set_termios()
where an ignored LCR write results in the baud divisor not being set and
instead a garbage character is sent out the transmitter.

Furthermore, since serial_port_out() offers no way to indicate failure,
a serious effort must be made to ensure that the LCR is actually updated
before returning back to the caller.  This is difficult, however, as a
UART that was busy during the first attempt is likely to still be busy
when a subsequent attempt is made unless some extra action is taken.

This updated workaround reads back the LCR after each write to confirm
that the new value was accepted by the hardware.  Should the hardware
ignore a write, the TX/RX FIFOs are cleared and the receive buffer read
before attempting to rewrite the LCR out of the hope that doing so will
force the UART into an idle state.  While this may seem unnecessarily
aggressive, writes to the LCR are used to change the baud rate, parity,
stop bit, or data length so the data that may be lost is likely not
important.  Admittedly, this is far from ideal but it seems to be the
best that can be done given the hardware limitations.

Lastly, the revised workaround doesn't touch the LCR in the ISR, so it
avoids the possibility of a "serial8250: too much work for irq" lock up.
This problem is rare in real situations but can be reproduced easily by
wiring up two UARTs and running the following commands.

  # stty -F /dev/ttyS1 echo
  # stty -F /dev/ttyS2 echo
  # cat /dev/ttyS1 &
  [1] 375
  # echo asdf > /dev/ttyS1
  asdf

  [   27.700000] serial8250: too much work for irq96
  [   27.700000] serial8250: too much work for irq96
  [   27.710000] serial8250: too much work for irq96
  [   27.710000] serial8250: too much work for irq96
  [   27.720000] serial8250: too much work for irq96
  [   27.720000] serial8250: too much work for irq96
  [   27.730000] serial8250: too much work for irq96
  [   27.730000] serial8250: too much work for irq96
  [   27.740000] serial8250: too much work for irq96

Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
---

Changes in v2:
  - Rebased on tty-next
  - Updated commit messsage to mention UART_16550_COMPATIBLE
  - Removed potentially unnecessary read of LSR and MSR
  - Only attempt workaround when LCR write is ignored

 drivers/tty/serial/8250/8250_dw.c | 41 ++++++++++++++++++++++++++++++---------
 1 file changed, 32 insertions(+), 9 deletions(-)

Comments

Heikki Krogerus Oct. 2, 2013, 9:47 a.m. UTC | #1
Hi,

On Tue, Oct 01, 2013 at 10:18:08AM -0700, Tim Kryger wrote:
> When configured with UART_16550_COMPATIBLE=NO or in versions prior to
> the introduction of this option, the Designware UART will ignore writes
> to the LCR if the UART is busy.  The current workaround saves a copy of
> the last written LCR and re-writes it in the ISR for a special interrupt
> that is raised when a write was ignored.
> 
> Unfortunately, interrupts are typically disabled prior to performing a
> sequence of register writes that include the LCR so the point at which
> the retry occurs is too late.  An example is serial8250_do_set_termios()
> where an ignored LCR write results in the baud divisor not being set and
> instead a garbage character is sent out the transmitter.
> 
> Furthermore, since serial_port_out() offers no way to indicate failure,
> a serious effort must be made to ensure that the LCR is actually updated
> before returning back to the caller.  This is difficult, however, as a
> UART that was busy during the first attempt is likely to still be busy
> when a subsequent attempt is made unless some extra action is taken.
> 
> This updated workaround reads back the LCR after each write to confirm
> that the new value was accepted by the hardware.  Should the hardware
> ignore a write, the TX/RX FIFOs are cleared and the receive buffer read
> before attempting to rewrite the LCR out of the hope that doing so will
> force the UART into an idle state.  While this may seem unnecessarily
> aggressive, writes to the LCR are used to change the baud rate, parity,
> stop bit, or data length so the data that may be lost is likely not
> important.  Admittedly, this is far from ideal but it seems to be the
> best that can be done given the hardware limitations.
> 
> Lastly, the revised workaround doesn't touch the LCR in the ISR, so it
> avoids the possibility of a "serial8250: too much work for irq" lock up.
> This problem is rare in real situations but can be reproduced easily by
> wiring up two UARTs and running the following commands.
> 
>   # stty -F /dev/ttyS1 echo
>   # stty -F /dev/ttyS2 echo
>   # cat /dev/ttyS1 &
>   [1] 375
>   # echo asdf > /dev/ttyS1
>   asdf
> 
>   [   27.700000] serial8250: too much work for irq96
>   [   27.700000] serial8250: too much work for irq96
>   [   27.710000] serial8250: too much work for irq96
>   [   27.710000] serial8250: too much work for irq96
>   [   27.720000] serial8250: too much work for irq96
>   [   27.720000] serial8250: too much work for irq96
>   [   27.730000] serial8250: too much work for irq96
>   [   27.730000] serial8250: too much work for irq96
>   [   27.740000] serial8250: too much work for irq96
> 
> Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
> Reviewed-by: Matt Porter <matt.porter@linaro.org>
> Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
> ---
> 
> Changes in v2:
>   - Rebased on tty-next
>   - Updated commit messsage to mention UART_16550_COMPATIBLE
>   - Removed potentially unnecessary read of LSR and MSR
>   - Only attempt workaround when LCR write is ignored

I'm OK with this.

Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>


Br,
Ezequiel Garcia Nov. 26, 2013, 6:36 p.m. UTC | #2
Hello,

On Tue, Oct 01, 2013 at 10:18:08AM -0700, Tim Kryger wrote:
> When configured with UART_16550_COMPATIBLE=NO or in versions prior to
> the introduction of this option, the Designware UART will ignore writes
> to the LCR if the UART is busy.  The current workaround saves a copy of
> the last written LCR and re-writes it in the ISR for a special interrupt
> that is raised when a write was ignored.
> 
> Unfortunately, interrupts are typically disabled prior to performing a
> sequence of register writes that include the LCR so the point at which
> the retry occurs is too late.  An example is serial8250_do_set_termios()
> where an ignored LCR write results in the baud divisor not being set and
> instead a garbage character is sent out the transmitter.
> 
> Furthermore, since serial_port_out() offers no way to indicate failure,
> a serious effort must be made to ensure that the LCR is actually updated
> before returning back to the caller.  This is difficult, however, as a
> UART that was busy during the first attempt is likely to still be busy
> when a subsequent attempt is made unless some extra action is taken.
> 
> This updated workaround reads back the LCR after each write to confirm
> that the new value was accepted by the hardware.  Should the hardware
> ignore a write, the TX/RX FIFOs are cleared and the receive buffer read
> before attempting to rewrite the LCR out of the hope that doing so will
> force the UART into an idle state.  While this may seem unnecessarily
> aggressive, writes to the LCR are used to change the baud rate, parity,
> stop bit, or data length so the data that may be lost is likely not
> important.  Admittedly, this is far from ideal but it seems to be the
> best that can be done given the hardware limitations.
> 
> Lastly, the revised workaround doesn't touch the LCR in the ISR, so it
> avoids the possibility of a "serial8250: too much work for irq" lock up.
> This problem is rare in real situations but can be reproduced easily by
> wiring up two UARTs and running the following commands.
> 
>   # stty -F /dev/ttyS1 echo
>   # stty -F /dev/ttyS2 echo
>   # cat /dev/ttyS1 &
>   [1] 375
>   # echo asdf > /dev/ttyS1
>   asdf
> 
>   [   27.700000] serial8250: too much work for irq96
>   [   27.700000] serial8250: too much work for irq96
>   [   27.710000] serial8250: too much work for irq96
>   [   27.710000] serial8250: too much work for irq96
>   [   27.720000] serial8250: too much work for irq96
>   [   27.720000] serial8250: too much work for irq96
>   [   27.730000] serial8250: too much work for irq96
>   [   27.730000] serial8250: too much work for irq96
>   [   27.740000] serial8250: too much work for irq96
> 
> Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
> Reviewed-by: Matt Porter <matt.porter@linaro.org>
> Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
> ---
> 
> Changes in v2:
>   - Rebased on tty-next
>   - Updated commit messsage to mention UART_16550_COMPATIBLE
>   - Removed potentially unnecessary read of LSR and MSR
>   - Only attempt workaround when LCR write is ignored
> 
>  drivers/tty/serial/8250/8250_dw.c | 41 ++++++++++++++++++++++++++++++---------
>  1 file changed, 32 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
> index d04a037..4658e3e 100644
> --- a/drivers/tty/serial/8250/8250_dw.c
> +++ b/drivers/tty/serial/8250/8250_dw.c
> @@ -57,7 +57,6 @@
>  
>  struct dw8250_data {
>  	u8			usr_reg;
> -	int			last_lcr;
>  	int			last_mcr;
>  	int			line;
>  	struct clk		*clk;
> @@ -77,17 +76,33 @@ static inline int dw8250_modify_msr(struct uart_port *p, int offset, int value)
>  	return value;
>  }
>  
> +static void dw8250_force_idle(struct uart_port *p)
> +{
> +	serial8250_clear_and_reinit_fifos(container_of
> +					  (p, struct uart_8250_port, port));
> +	(void)p->serial_in(p, UART_RX);
> +}
> +
>  static void dw8250_serial_out(struct uart_port *p, int offset, int value)
>  {
>  	struct dw8250_data *d = p->private_data;
>  
> -	if (offset == UART_LCR)
> -		d->last_lcr = value;
> -
>  	if (offset == UART_MCR)
>  		d->last_mcr = value;
>  
>  	writeb(value, p->membase + (offset << p->regshift));
> +
> +	/* Make sure LCR write wasn't ignored */
> +	if (offset == UART_LCR) {
> +		int tries = 1000;
> +		while (tries--) {
> +			if (value == p->serial_in(p, UART_LCR))
> +				return;
> +			dw8250_force_idle(p);
> +			writeb(value, p->membase + (UART_LCR << p->regshift));
> +		}
> +		dev_err(p->dev, "Couldn't set LCR to %d\n", value);
> +	}
>  }
>  
>  static unsigned int dw8250_serial_in(struct uart_port *p, int offset)
> @@ -108,13 +123,22 @@ static void dw8250_serial_out32(struct uart_port *p, int offset, int value)
>  {
>  	struct dw8250_data *d = p->private_data;
>  
> -	if (offset == UART_LCR)
> -		d->last_lcr = value;
> -
>  	if (offset == UART_MCR)
>  		d->last_mcr = value;
>  
>  	writel(value, p->membase + (offset << p->regshift));
> +
> +	/* Make sure LCR write wasn't ignored */
> +	if (offset == UART_LCR) {
> +		int tries = 1000;
> +		while (tries--) {
> +			if (value == p->serial_in(p, UART_LCR))
> +				return;
> +			dw8250_force_idle(p);
> +			writel(value, p->membase + (UART_LCR << p->regshift));
> +		}
> +		dev_err(p->dev, "Couldn't set LCR to %d\n", value);
> +	}
>  }
>  
>  static unsigned int dw8250_serial_in32(struct uart_port *p, int offset)
> @@ -132,9 +156,8 @@ static int dw8250_handle_irq(struct uart_port *p)
>  	if (serial8250_handle_irq(p, iir)) {
>  		return 1;
>  	} else if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
> -		/* Clear the USR and write the LCR again. */
> +		/* Clear the USR */
>  		(void)p->serial_in(p, d->usr_reg);
> -		p->serial_out(p, UART_LCR, d->last_lcr);
>  
>  		return 1;
>  	}

Since v3.13-rc1, this commit seems to have introduced some oddities on
some of our boards. See this log snippet:

Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
����R�console [ttyS0] enabled
console [ttyS0] enabled
bootconsole [earlycon0] disabled
bootconsole [earlycon0] disabled
dw-apb-uart d0012100.serial: Couldn't set LCR to 191
dw-apb-uart d0012100.serial: Couldn't set LCR to 191
dw-apb-uart d0012100.serial: Couldn't set LCR to 224
dw-apb-uart d0012100.serial: Couldn't set LCR to 224
d0012100.serial: ttyS1 at MMIO 0xd0012100 (irq = 18, base_baud = 15625000) is a 16550A

This behavior appear in at least Armada 370 and Armada XP boxes.

I confirm reverting this commit fixes the issue and things get back to normal.
Here's the complete kernel log: sprunge.us/gMdL

Ideas?
Tim Kryger Nov. 26, 2013, 11:03 p.m. UTC | #3
On Tue, Nov 26, 2013 at 10:36 AM, Ezequiel Garcia
<ezequiel.garcia@free-electrons.com> wrote:

> Since v3.13-rc1, this commit seems to have introduced some oddities on
> some of our boards. See this log snippet:
>
> Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
> ����R�console [ttyS0] enabled
> console [ttyS0] enabled
> bootconsole [earlycon0] disabled
> bootconsole [earlycon0] disabled
> dw-apb-uart d0012100.serial: Couldn't set LCR to 191
> dw-apb-uart d0012100.serial: Couldn't set LCR to 191
> dw-apb-uart d0012100.serial: Couldn't set LCR to 224
> dw-apb-uart d0012100.serial: Couldn't set LCR to 224
> d0012100.serial: ttyS1 at MMIO 0xd0012100 (irq = 18, base_baud = 15625000) is a 16550A
>
> This behavior appear in at least Armada 370 and Armada XP boxes.
>
> I confirm reverting this commit fixes the issue and things get back to normal.
> Here's the complete kernel log: sprunge.us/gMdL
>
> Ideas?

Hi Ezequiel,

An external device may be keeping the UART busy and preventing LCR
from being written.

What device is attached to ttyS1?  Also, do you know the version of
the Synopsys IP?

If built with ADDITIONAL_FEATURES=YES, the version can be read from
the hardware:

# busybox devmem 0xd00121f8 32

-Tim
Ezequiel Garcia Nov. 27, 2013, 6:54 p.m. UTC | #4
On Tue, Nov 26, 2013 at 03:03:03PM -0800, Tim Kryger wrote:
> On Tue, Nov 26, 2013 at 10:36 AM, Ezequiel Garcia
> <ezequiel.garcia@free-electrons.com> wrote:
> 
> > Since v3.13-rc1, this commit seems to have introduced some oddities on
> > some of our boards. See this log snippet:
> >
> > Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
> > ����R�console [ttyS0] enabled
> > console [ttyS0] enabled
> > bootconsole [earlycon0] disabled
> > bootconsole [earlycon0] disabled
> > dw-apb-uart d0012100.serial: Couldn't set LCR to 191
> > dw-apb-uart d0012100.serial: Couldn't set LCR to 191
> > dw-apb-uart d0012100.serial: Couldn't set LCR to 224
> > dw-apb-uart d0012100.serial: Couldn't set LCR to 224
> > d0012100.serial: ttyS1 at MMIO 0xd0012100 (irq = 18, base_baud = 15625000) is a 16550A
> >
> > This behavior appear in at least Armada 370 and Armada XP boxes.
> >
> > I confirm reverting this commit fixes the issue and things get back to normal.
> > Here's the complete kernel log: sprunge.us/gMdL
> >
> > Ideas?
> 
> Hi Ezequiel,
> 
> An external device may be keeping the UART busy and preventing LCR
> from being written.
> 
> What device is attached to ttyS1?

There's no device attached at ttyS1. I've just tested this in another
box and it seems the same error is obtained on each unused port:

[...]
dw-apb-uart d0012100.serial: Couldn't set LCR to 191
dw-apb-uart d0012100.serial: Couldn't set LCR to 191
dw-apb-uart d0012100.serial: Couldn't set LCR to 224
dw-apb-uart d0012100.serial: Couldn't set LCR to 224
d0012100.serial: ttyS1 at MMIO 0xd0012100 (irq = 18, base_baud = 15625000) is a 16550A
dw-apb-uart d0012200.serial: Couldn't set LCR to 191
dw-apb-uart d0012200.serial: Couldn't set LCR to 191
dw-apb-uart d0012200.serial: Couldn't set LCR to 224
dw-apb-uart d0012200.serial: Couldn't set LCR to 224
d0012200.serial: ttyS2 at MMIO 0xd0012200 (irq = 31, base_baud = 15625000) is a 16550A
dw-apb-uart d0012300.serial: Couldn't set LCR to 191
dw-apb-uart d0012300.serial: Couldn't set LCR to 191
dw-apb-uart d0012300.serial: Couldn't set LCR to 224
dw-apb-uart d0012300.serial: Couldn't set LCR to 224
d0012300.serial: ttyS3 at MMIO 0xd0012300 (irq = 32, base_baud = 15625000) is a 16550A

In this board, I only have ttyS0 (console) connected.

> Also, do you know the version of the Synopsys IP?
> If built with ADDITIONAL_FEATURES=YES, the version can be read from
> the hardware:
> 
> # busybox devmem 0xd00121f8 32
> 

No, I don't know this IP version and ADDITIONAL_FEATURES seems not built.

Thanks for taking a look at this!
Tim Kryger Nov. 28, 2013, 2:46 a.m. UTC | #5
On Wed, Nov 27, 2013 at 10:54 AM, Ezequiel Garcia
<ezequiel.garcia@free-electrons.com> wrote:
> On Tue, Nov 26, 2013 at 03:03:03PM -0800, Tim Kryger wrote:

>> An external device may be keeping the UART busy and preventing LCR
>> from being written.
>>
>> What device is attached to ttyS1?
>
> There's no device attached at ttyS1. I've just tested this in another
> box and it seems the same error is obtained on each unused port:

Do you know if your UART pins have pull up resistors?

If you can, try attaching something to an unused port.

-Tim
Thomas Petazzoni Nov. 28, 2013, 8:30 a.m. UTC | #6
Dear Ezequiel Garcia,

On Wed, 27 Nov 2013 15:54:49 -0300, Ezequiel Garcia wrote:

> > An external device may be keeping the UART busy and preventing LCR
> > from being written.
> > 
> > What device is attached to ttyS1?
> 
> There's no device attached at ttyS1. I've just tested this in another
> box and it seems the same error is obtained on each unused port:

Are you sure about this? I suppose you're testing on the Armada XP GP
board, and this board has a 4 ports FTDI chip, and according to the
board schematics the four UARTs are all connected to the FTDI chip. So
from the SoC perspective, ttyS1 is connected to something, as far as I
can understand. Or maybe you also tested Armada XP DB ?

Best regards,

Thomas
Ezequiel Garcia Nov. 28, 2013, 7:47 p.m. UTC | #7
Hi Thomas, Tim:

On Thu, Nov 28, 2013 at 09:30:34AM +0100, Thomas Petazzoni wrote:
> Dear Ezequiel Garcia,
> 
> On Wed, 27 Nov 2013 15:54:49 -0300, Ezequiel Garcia wrote:
> 
> > > An external device may be keeping the UART busy and preventing LCR
> > > from being written.
> > > 
> > > What device is attached to ttyS1?
> > 
> > There's no device attached at ttyS1. I've just tested this in another
> > box and it seems the same error is obtained on each unused port:
> 
> Are you sure about this? I suppose you're testing on the Armada XP GP
> board, and this board has a 4 ports FTDI chip, and according to the
> board schematics the four UARTs are all connected to the FTDI chip. So
> from the SoC perspective, ttyS1 is connected to something, as far as I
> can understand. Or maybe you also tested Armada XP DB ?
> 

Yeah, sorry about that. I missed the FTDI chip. As Thomas says the XP GP
board I'm testing this on, has its four UARTs connected to a FTDI chip.

Changing the console port by setting "console=ttyS1,115200" gives this:

[..]
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
dw-apb-uart d0012000.serial: Couldn't set LCR to 191
dw-apb-uart d0012000.serial: Couldn't set LCR to 191
dw-apb-uart d0012000.serial: Couldn't set LCR to 224
dw-apb-uart d0012000.serial: Couldn't set LCR to 224
d0012000.serial: ttyS0 at MMIO 0xd0012000 (irq = 17, base_baud = 15625000) is a 16550A
dw-apb-uart d0012100.serial: Couldn't set LCR to 191
dw-apb-uart d0012100.serial: Couldn't set LCR to 191
dw-apb-uart d0012100.serial: Couldn't set LCR to 224
dw-apb-uart d0012100.serial: Couldn't set LCR to 224
d0012100.serial: ttyS1 at MMIO 0xd0012100 (irq = 18, base_baud = 15625000) is a 16550A
console [ttyS1] enabled
dw-apb-uart d0012200.serial: Couldn't set LCR to 191
dw-apb-uart d0012200.serial: Couldn't set LCR to 191
dw-apb-uart d0012200.serial: Couldn't set LCR to 224
dw-apb-uart d0012200.serial: Couldn't set LCR to 224
d0012200.serial: ttyS2 at MMIO 0xd0012200 (irq = 31, base_baud = 15625000) is a 16550A
dw-apb-uart d0012300.serial: Couldn't set LCR to 191
dw-apb-uart d0012300.serial: Couldn't set LCR to 191
dw-apb-uart d0012300.serial: Couldn't set LCR to 224
dw-apb-uart d0012300.serial: Couldn't set LCR to 224
d0012300.serial: ttyS3 at MMIO 0xd0012300 (irq = 32, base_baud = 15625000) is a 16550A

So we get the "Couldn't set" message in all four ports.

Tim: Any ideas?
Ezequiel Garcia Nov. 28, 2013, 7:53 p.m. UTC | #8
On Thu, Nov 28, 2013 at 04:47:20PM -0300, Ezequiel Garcia wrote:
> Hi Thomas, Tim:
> 
> On Thu, Nov 28, 2013 at 09:30:34AM +0100, Thomas Petazzoni wrote:
> > Dear Ezequiel Garcia,
> > 
> > On Wed, 27 Nov 2013 15:54:49 -0300, Ezequiel Garcia wrote:
> > 
> > > > An external device may be keeping the UART busy and preventing LCR
> > > > from being written.
> > > > 
> > > > What device is attached to ttyS1?
> > > 
> > > There's no device attached at ttyS1. I've just tested this in another
> > > box and it seems the same error is obtained on each unused port:
> > 
> > Are you sure about this? I suppose you're testing on the Armada XP GP
> > board, and this board has a 4 ports FTDI chip, and according to the
> > board schematics the four UARTs are all connected to the FTDI chip. So
> > from the SoC perspective, ttyS1 is connected to something, as far as I
> > can understand. Or maybe you also tested Armada XP DB ?
> > 
> 
> Yeah, sorry about that. I missed the FTDI chip. As Thomas says the XP GP
> board I'm testing this on, has its four UARTs connected to a FTDI chip.
> 
> Changing the console port by setting "console=ttyS1,115200" gives this:
> 
> [..]
> Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
> dw-apb-uart d0012000.serial: Couldn't set LCR to 191
> dw-apb-uart d0012000.serial: Couldn't set LCR to 191
> dw-apb-uart d0012000.serial: Couldn't set LCR to 224
> dw-apb-uart d0012000.serial: Couldn't set LCR to 224
> d0012000.serial: ttyS0 at MMIO 0xd0012000 (irq = 17, base_baud = 15625000) is a 16550A
> dw-apb-uart d0012100.serial: Couldn't set LCR to 191
> dw-apb-uart d0012100.serial: Couldn't set LCR to 191
> dw-apb-uart d0012100.serial: Couldn't set LCR to 224
> dw-apb-uart d0012100.serial: Couldn't set LCR to 224
> d0012100.serial: ttyS1 at MMIO 0xd0012100 (irq = 18, base_baud = 15625000) is a 16550A
> console [ttyS1] enabled
> dw-apb-uart d0012200.serial: Couldn't set LCR to 191
> dw-apb-uart d0012200.serial: Couldn't set LCR to 191
> dw-apb-uart d0012200.serial: Couldn't set LCR to 224
> dw-apb-uart d0012200.serial: Couldn't set LCR to 224
> d0012200.serial: ttyS2 at MMIO 0xd0012200 (irq = 31, base_baud = 15625000) is a 16550A
> dw-apb-uart d0012300.serial: Couldn't set LCR to 191
> dw-apb-uart d0012300.serial: Couldn't set LCR to 191
> dw-apb-uart d0012300.serial: Couldn't set LCR to 224
> dw-apb-uart d0012300.serial: Couldn't set LCR to 224
> d0012300.serial: ttyS3 at MMIO 0xd0012300 (irq = 32, base_baud = 15625000) is a 16550A
> 
> So we get the "Couldn't set" message in all four ports.
> 
> Tim: Any ideas?

And another thing: the weird output on the console looks related to the
early boot console. If I enable 'earlyprintk' on ttyS0 but set the console
on ttyS1, this is what I get on ttyS0:

bootconsole [earlycon0] enabled
[..]
Kernel command line: earlyprintk console=ttyS1,115200 root=/dev/nfs rw nfsroot=192.168.0.45:/opt/buildrootfs,v3, ip=192.168.0.159:192.168.0.45:192.168.0.1:255.255.255.0:develboard:eth0:on rootwait
[..]
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
�Ɋ��Ɂ����Ɇ�������������������������������������
Welcome to Buildroot
buildroot login: 

Hope this helps you understand what's going on...
Ezequiel Garcia Dec. 4, 2013, 1:01 p.m. UTC | #9
On Thu, Nov 28, 2013 at 04:53:37PM -0300, Ezequiel Garcia wrote:
> On Thu, Nov 28, 2013 at 04:47:20PM -0300, Ezequiel Garcia wrote:
> > Hi Thomas, Tim:
> > 
> > On Thu, Nov 28, 2013 at 09:30:34AM +0100, Thomas Petazzoni wrote:
> > > Dear Ezequiel Garcia,
> > > 
> > > On Wed, 27 Nov 2013 15:54:49 -0300, Ezequiel Garcia wrote:
> > > 
> > > > > An external device may be keeping the UART busy and preventing LCR
> > > > > from being written.
> > > > > 
> > > > > What device is attached to ttyS1?
> > > > 
> > > > There's no device attached at ttyS1. I've just tested this in another
> > > > box and it seems the same error is obtained on each unused port:
> > > 
> > > Are you sure about this? I suppose you're testing on the Armada XP GP
> > > board, and this board has a 4 ports FTDI chip, and according to the
> > > board schematics the four UARTs are all connected to the FTDI chip. So
> > > from the SoC perspective, ttyS1 is connected to something, as far as I
> > > can understand. Or maybe you also tested Armada XP DB ?
> > > 
> > 
> > Yeah, sorry about that. I missed the FTDI chip. As Thomas says the XP GP
> > board I'm testing this on, has its four UARTs connected to a FTDI chip.
> > 
> > Changing the console port by setting "console=ttyS1,115200" gives this:
> > 
> > [..]
> > Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
> > dw-apb-uart d0012000.serial: Couldn't set LCR to 191
> > dw-apb-uart d0012000.serial: Couldn't set LCR to 191
> > dw-apb-uart d0012000.serial: Couldn't set LCR to 224
> > dw-apb-uart d0012000.serial: Couldn't set LCR to 224
> > d0012000.serial: ttyS0 at MMIO 0xd0012000 (irq = 17, base_baud = 15625000) is a 16550A
> > dw-apb-uart d0012100.serial: Couldn't set LCR to 191
> > dw-apb-uart d0012100.serial: Couldn't set LCR to 191
> > dw-apb-uart d0012100.serial: Couldn't set LCR to 224
> > dw-apb-uart d0012100.serial: Couldn't set LCR to 224
> > d0012100.serial: ttyS1 at MMIO 0xd0012100 (irq = 18, base_baud = 15625000) is a 16550A
> > console [ttyS1] enabled
> > dw-apb-uart d0012200.serial: Couldn't set LCR to 191
> > dw-apb-uart d0012200.serial: Couldn't set LCR to 191
> > dw-apb-uart d0012200.serial: Couldn't set LCR to 224
> > dw-apb-uart d0012200.serial: Couldn't set LCR to 224
> > d0012200.serial: ttyS2 at MMIO 0xd0012200 (irq = 31, base_baud = 15625000) is a 16550A
> > dw-apb-uart d0012300.serial: Couldn't set LCR to 191
> > dw-apb-uart d0012300.serial: Couldn't set LCR to 191
> > dw-apb-uart d0012300.serial: Couldn't set LCR to 224
> > dw-apb-uart d0012300.serial: Couldn't set LCR to 224
> > d0012300.serial: ttyS3 at MMIO 0xd0012300 (irq = 32, base_baud = 15625000) is a 16550A
> > 
> > So we get the "Couldn't set" message in all four ports.
> > 
> > Tim: Any ideas?
> 
> And another thing: the weird output on the console looks related to the
> early boot console. If I enable 'earlyprintk' on ttyS0 but set the console
> on ttyS1, this is what I get on ttyS0:
> 
> bootconsole [earlycon0] enabled
> [..]
> Kernel command line: earlyprintk console=ttyS1,115200 root=/dev/nfs rw nfsroot=192.168.0.45:/opt/buildrootfs,v3, ip=192.168.0.159:192.168.0.45:192.168.0.1:255.255.255.0:develboard:eth0:on rootwait
> [..]
> Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
> �Ɋ��Ɂ����Ɇ�������������������������������������
> Welcome to Buildroot
> buildroot login: 
> 
> Hope this helps you understand what's going on...

Gentle ping?

Any ideas about those weird characters?

Thanks!
Tim Kryger Dec. 4, 2013, 6:56 p.m. UTC | #10
On Wed, Dec 4, 2013 at 5:01 AM, Ezequiel Garcia
<ezequiel.garcia@free-electrons.com> wrote:
> On Thu, Nov 28, 2013 at 04:53:37PM -0300, Ezequiel Garcia wrote:
>> On Thu, Nov 28, 2013 at 04:47:20PM -0300, Ezequiel Garcia wrote:

>> > Changing the console port by setting "console=ttyS1,115200" gives this:
>> >
>> > [..]
>> > Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
>> > dw-apb-uart d0012000.serial: Couldn't set LCR to 191
>> > dw-apb-uart d0012000.serial: Couldn't set LCR to 191
>> > dw-apb-uart d0012000.serial: Couldn't set LCR to 224
>> > dw-apb-uart d0012000.serial: Couldn't set LCR to 224
>> > d0012000.serial: ttyS0 at MMIO 0xd0012000 (irq = 17, base_baud = 15625000) is a 16550A
>> > dw-apb-uart d0012100.serial: Couldn't set LCR to 191
>> > dw-apb-uart d0012100.serial: Couldn't set LCR to 191
>> > dw-apb-uart d0012100.serial: Couldn't set LCR to 224
>> > dw-apb-uart d0012100.serial: Couldn't set LCR to 224
>> > d0012100.serial: ttyS1 at MMIO 0xd0012100 (irq = 18, base_baud = 15625000) is a 16550A
>> > console [ttyS1] enabled
>> > dw-apb-uart d0012200.serial: Couldn't set LCR to 191
>> > dw-apb-uart d0012200.serial: Couldn't set LCR to 191
>> > dw-apb-uart d0012200.serial: Couldn't set LCR to 224
>> > dw-apb-uart d0012200.serial: Couldn't set LCR to 224
>> > d0012200.serial: ttyS2 at MMIO 0xd0012200 (irq = 31, base_baud = 15625000) is a 16550A
>> > dw-apb-uart d0012300.serial: Couldn't set LCR to 191
>> > dw-apb-uart d0012300.serial: Couldn't set LCR to 191
>> > dw-apb-uart d0012300.serial: Couldn't set LCR to 224
>> > dw-apb-uart d0012300.serial: Couldn't set LCR to 224
>> > d0012300.serial: ttyS3 at MMIO 0xd0012300 (irq = 32, base_baud = 15625000) is a 16550A
>> >
>> > So we get the "Couldn't set" message in all four ports.
>> >
>> > Tim: Any ideas?
>>
>> And another thing: the weird output on the console looks related to the
>> early boot console. If I enable 'earlyprintk' on ttyS0 but set the console
>> on ttyS1, this is what I get on ttyS0:
>>
>> bootconsole [earlycon0] enabled
>> [..]
>> Kernel command line: earlyprintk console=ttyS1,115200 root=/dev/nfs rw nfsroot=192.168.0.45:/opt/buildrootfs,v3, ip=192.168.0.159:192.168.0.45:192.168.0.1:255.255.255.0:develboard:eth0:on rootwait
>> [..]
>> Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
>> �Ɋ��Ɂ����Ɇ�������������������������������������
>> Welcome to Buildroot
>> buildroot login:
>>
>> Hope this helps you understand what's going on...
>
> Gentle ping?
>
> Any ideas about those weird characters?

If there was just one weird character, I would say it was an
indication that hardware rejected a write to LCR and then software
wrote the lower 8 bits of the baud into DLL which happens to live at
the same address offset as RBR.  However, there are a bunch of them
here so it is less clear.

It would be really helpful to get any extra information that you can
about the Synopsys IP in your SoC.  If it configured with
UART_ADD_ENCODED_PARAMS = 1, there should be a UART configuration ID
register at offset 0xF4.  Could you try reading that back?  This
register has information about the FIFO size and a few more things.

Also, I am curious what LCR value the hardware reports when the driver
fails update it.  Perhaps you can amend the error message to include
p->serial_in(p, UART_LCR) too?

-Tim
diff mbox

Patch

diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
index d04a037..4658e3e 100644
--- a/drivers/tty/serial/8250/8250_dw.c
+++ b/drivers/tty/serial/8250/8250_dw.c
@@ -57,7 +57,6 @@ 
 
 struct dw8250_data {
 	u8			usr_reg;
-	int			last_lcr;
 	int			last_mcr;
 	int			line;
 	struct clk		*clk;
@@ -77,17 +76,33 @@  static inline int dw8250_modify_msr(struct uart_port *p, int offset, int value)
 	return value;
 }
 
+static void dw8250_force_idle(struct uart_port *p)
+{
+	serial8250_clear_and_reinit_fifos(container_of
+					  (p, struct uart_8250_port, port));
+	(void)p->serial_in(p, UART_RX);
+}
+
 static void dw8250_serial_out(struct uart_port *p, int offset, int value)
 {
 	struct dw8250_data *d = p->private_data;
 
-	if (offset == UART_LCR)
-		d->last_lcr = value;
-
 	if (offset == UART_MCR)
 		d->last_mcr = value;
 
 	writeb(value, p->membase + (offset << p->regshift));
+
+	/* Make sure LCR write wasn't ignored */
+	if (offset == UART_LCR) {
+		int tries = 1000;
+		while (tries--) {
+			if (value == p->serial_in(p, UART_LCR))
+				return;
+			dw8250_force_idle(p);
+			writeb(value, p->membase + (UART_LCR << p->regshift));
+		}
+		dev_err(p->dev, "Couldn't set LCR to %d\n", value);
+	}
 }
 
 static unsigned int dw8250_serial_in(struct uart_port *p, int offset)
@@ -108,13 +123,22 @@  static void dw8250_serial_out32(struct uart_port *p, int offset, int value)
 {
 	struct dw8250_data *d = p->private_data;
 
-	if (offset == UART_LCR)
-		d->last_lcr = value;
-
 	if (offset == UART_MCR)
 		d->last_mcr = value;
 
 	writel(value, p->membase + (offset << p->regshift));
+
+	/* Make sure LCR write wasn't ignored */
+	if (offset == UART_LCR) {
+		int tries = 1000;
+		while (tries--) {
+			if (value == p->serial_in(p, UART_LCR))
+				return;
+			dw8250_force_idle(p);
+			writel(value, p->membase + (UART_LCR << p->regshift));
+		}
+		dev_err(p->dev, "Couldn't set LCR to %d\n", value);
+	}
 }
 
 static unsigned int dw8250_serial_in32(struct uart_port *p, int offset)
@@ -132,9 +156,8 @@  static int dw8250_handle_irq(struct uart_port *p)
 	if (serial8250_handle_irq(p, iir)) {
 		return 1;
 	} else if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
-		/* Clear the USR and write the LCR again. */
+		/* Clear the USR */
 		(void)p->serial_in(p, d->usr_reg);
-		p->serial_out(p, UART_LCR, d->last_lcr);
 
 		return 1;
 	}