Message ID | 1467136218-15789-3-git-send-email-mark.rutland@arm.com |
---|---|
State | New |
Headers | show |
On Tue, Jun 28, 2016 at 06:50:18PM +0100, Mark Rutland wrote: > Currently the IRQ core is permitted to make the CCI PMU IRQ handler > threaded, and will allow userspace to change the CPU affinity of the > interrupt behind our back. Both of these could violate our > synchronisation requirements with the core perf code, which relies upon > strict CPU affinity and disabling of interrupts to guarantee mutual > exclusion in some cases. Minor nit, but I think $subject is particularly unhelpful for these two patches. How about "arm-ccX: fix PMU interrupt flags"? > As with the CPU PMU drivers, we should request the interrupt with > IRQF_NOBALANCING and IRQF_NO_THREAD, to avoid these issues. > > Signed-off-by: Mark Rutland <mark.rutland@arm.com> > Cc: Marc Zyngier <marc.zyngier@arm.com> > Cc: Punit Agrawal <punit.agrawal@arm.com> > Cc: Suzuki K Poulose <suzuki.poulose@arm.com> > Cc: Will Deacon <will.deacon@arm.com> > Cc: Olof Johansson <olof@lixom.net> > Cc: Arnd Bergmann <arnd@arndb.de> > Cc: <arm@kernel.org> > --- > drivers/bus/arm-cci.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c > index a49b283..6a8825a 100644 > --- a/drivers/bus/arm-cci.c > +++ b/drivers/bus/arm-cci.c > @@ -881,7 +881,8 @@ static int pmu_request_irq(struct cci_pmu *cci_pmu, irq_handler_t handler) > * This should allow handling of non-unique interrupt for the counters. > */ > for (i = 0; i < cci_pmu->nr_irqs; i++) { > - int err = request_irq(cci_pmu->irqs[i], handler, IRQF_SHARED, Why is this shared and who is the line shared with? We should check that we don't have contradictory IRQ flags in the other irq request path(s). Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On Mon, Jul 04, 2016 at 11:22:05AM +0100, Will Deacon wrote: > On Tue, Jun 28, 2016 at 06:50:18PM +0100, Mark Rutland wrote: > > Currently the IRQ core is permitted to make the CCI PMU IRQ handler > > threaded, and will allow userspace to change the CPU affinity of the > > interrupt behind our back. Both of these could violate our > > synchronisation requirements with the core perf code, which relies upon > > strict CPU affinity and disabling of interrupts to guarantee mutual > > exclusion in some cases. > > Minor nit, but I think $subject is particularly unhelpful for these two > patches. How about "arm-ccX: fix PMU interrupt flags"? Sure, I'll move over to that wording. > > @@ -881,7 +881,8 @@ static int pmu_request_irq(struct cci_pmu *cci_pmu, irq_handler_t handler) > > * This should allow handling of non-unique interrupt for the counters. > > */ > > for (i = 0; i < cci_pmu->nr_irqs; i++) { > > - int err = request_irq(cci_pmu->irqs[i], handler, IRQF_SHARED, > > Why is this shared and who is the line shared with? We should check that > we don't have contradictory IRQ flags in the other irq request path(s). Hmm... I thought that was so the driver could request the same IRQ multiple times in the case of muxing, but I see we've always had the is_duplicate_irq logic. The IRQF_SHARED flags has also been there since day one, so I'm not sure if that's needed for some platform or whether that was added out of habit. Punit, do you recall if/why IRQF_SHARED was used? I'll take a look at dts and see if I can get rid of it. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On Mon, Jul 04, 2016 at 11:31:31AM +0100, Mark Rutland wrote: > On Mon, Jul 04, 2016 at 11:22:05AM +0100, Will Deacon wrote: > > On Tue, Jun 28, 2016 at 06:50:18PM +0100, Mark Rutland wrote: > > > Currently the IRQ core is permitted to make the CCI PMU IRQ handler > > > threaded, and will allow userspace to change the CPU affinity of the > > > interrupt behind our back. Both of these could violate our > > > synchronisation requirements with the core perf code, which relies upon > > > strict CPU affinity and disabling of interrupts to guarantee mutual > > > exclusion in some cases. > > > > Minor nit, but I think $subject is particularly unhelpful for these two > > patches. How about "arm-ccX: fix PMU interrupt flags"? > > Sure, I'll move over to that wording. > > > > @@ -881,7 +881,8 @@ static int pmu_request_irq(struct cci_pmu *cci_pmu, irq_handler_t handler) > > > * This should allow handling of non-unique interrupt for the counters. > > > */ > > > for (i = 0; i < cci_pmu->nr_irqs; i++) { > > > - int err = request_irq(cci_pmu->irqs[i], handler, IRQF_SHARED, > > > > Why is this shared and who is the line shared with? We should check that > > we don't have contradictory IRQ flags in the other irq request path(s). > > Hmm... I thought that was so the driver could request the same IRQ > multiple times in the case of muxing, but I see we've always had the > is_duplicate_irq logic. > > The IRQF_SHARED flags has also been there since day one, so I'm not sure > if that's needed for some platform or whether that was added out of > habit. > > Punit, do you recall if/why IRQF_SHARED was used? > > I'll take a look at dts and see if I can get rid of it. Tree-wide there only appears to be one instance of the pmu node: [mark@leverpostej:~/src/linux]% git grep 'cci-.*-pmu' -- arch arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts: compatible = "arm,cci-400-pmu,r0"; Which has locally-unique interrupts... pmu@9000 { compatible = "arm,cci-400-pmu,r0"; reg = <0x9000 0x5000>; interrupts = <0 105 4>, <0 101 4>, <0 102 4>, <0 103 4>, <0 104 4>; }; .. and from reading the A15x2-A7x3 board TRM, they're globally unique (i.e. not shared) too. I'll drop the IRQF_SHARED in v2. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c index a49b283..6a8825a 100644 --- a/drivers/bus/arm-cci.c +++ b/drivers/bus/arm-cci.c @@ -881,7 +881,8 @@ static int pmu_request_irq(struct cci_pmu *cci_pmu, irq_handler_t handler) * This should allow handling of non-unique interrupt for the counters. */ for (i = 0; i < cci_pmu->nr_irqs; i++) { - int err = request_irq(cci_pmu->irqs[i], handler, IRQF_SHARED, + int err = request_irq(cci_pmu->irqs[i], handler, + IRQF_SHARED | IRQF_NOBALANCING | IRQF_NO_THREAD, "arm-cci-pmu", cci_pmu); if (err) { dev_err(&pmu_device->dev, "unable to request IRQ%d for ARM CCI PMU counters\n",
Currently the IRQ core is permitted to make the CCI PMU IRQ handler threaded, and will allow userspace to change the CPU affinity of the interrupt behind our back. Both of these could violate our synchronisation requirements with the core perf code, which relies upon strict CPU affinity and disabling of interrupts to guarantee mutual exclusion in some cases. As with the CPU PMU drivers, we should request the interrupt with IRQF_NOBALANCING and IRQF_NO_THREAD, to avoid these issues. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Punit Agrawal <punit.agrawal@arm.com> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Cc: <arm@kernel.org> --- drivers/bus/arm-cci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 1.9.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel