| Message ID | 20161027165246.23936-1-eric@anholt.net |
|---|---|
| State | New |
| Headers | show |
Hi Eric, > Eric Anholt <eric@anholt.net> hat am 27. Oktober 2016 um 18:52 geschrieben: > > > From: Linus Walleij <linus.walleij@linaro.org> > > The idea is to give useful names to GPIO lines that an implementer > will be using from userspace, e.g. for maker type projects. These are > user-visible using tools/gpio/lsgpio.c sorry for the late feedback, but did you check your patch against the Firmware DTS [1]? As an example the GPIO38 is connected and named as USB_LIMIT_1A2 since Raspberry Pi 1 B Plus. [1] - https://github.com/raspberrypi/documentation/blob/master/configuration/images/dt-blob.dts
Stefan Wahren <stefan.wahren@i2se.com> writes: > Hi Eric, > >> Eric Anholt <eric@anholt.net> hat am 27. Oktober 2016 um 18:52 geschrieben: >> >> >> From: Linus Walleij <linus.walleij@linaro.org> >> >> The idea is to give useful names to GPIO lines that an implementer >> will be using from userspace, e.g. for maker type projects. These are >> user-visible using tools/gpio/lsgpio.c > > sorry for the late feedback, but did you check your patch against the Firmware > DTS [1]? > > As an example the GPIO38 is connected and named as USB_LIMIT_1A2 since Raspberry > Pi 1 B Plus. > > [1] - > https://github.com/raspberrypi/documentation/blob/master/configuration/images/dt-blob.dts I did use the dt-blob sometimes for cross-checking, but these are written against the schematics, not the dt-blob. If you've got things you'd like changed, could you send a patch?
> Eric Anholt <eric@anholt.net> hat am 31. Oktober 2016 um 18:53 geschrieben: > > > Stefan Wahren <stefan.wahren@i2se.com> writes: > > > Hi Eric, > > > >> Eric Anholt <eric@anholt.net> hat am 27. Oktober 2016 um 18:52 geschrieben: > >> > >> > >> From: Linus Walleij <linus.walleij@linaro.org> > >> > >> The idea is to give useful names to GPIO lines that an implementer > >> will be using from userspace, e.g. for maker type projects. These are > >> user-visible using tools/gpio/lsgpio.c > > > > sorry for the late feedback, but did you check your patch against the > > Firmware > > DTS [1]? > > > > As an example the GPIO38 is connected and named as USB_LIMIT_1A2 since > > Raspberry > > Pi 1 B Plus. > > > > [1] - > > https://github.com/raspberrypi/documentation/blob/master/configuration/images/dt-blob.dts > > I did use the dt-blob sometimes for cross-checking, but these are > written against the schematics, not the dt-blob. If you've got things > you'd like changed, could you send a patch? A patch against your v3 or my own v4 based on your patch?
Stefan Wahren <stefan.wahren@i2se.com> writes: >> Eric Anholt <eric@anholt.net> hat am 31. Oktober 2016 um 18:53 geschrieben: >> >> >> Stefan Wahren <stefan.wahren@i2se.com> writes: >> >> > Hi Eric, >> > >> >> Eric Anholt <eric@anholt.net> hat am 27. Oktober 2016 um 18:52 geschrieben: >> >> >> >> >> >> From: Linus Walleij <linus.walleij@linaro.org> >> >> >> >> The idea is to give useful names to GPIO lines that an implementer >> >> will be using from userspace, e.g. for maker type projects. These are >> >> user-visible using tools/gpio/lsgpio.c >> > >> > sorry for the late feedback, but did you check your patch against the >> > Firmware >> > DTS [1]? >> > >> > As an example the GPIO38 is connected and named as USB_LIMIT_1A2 since >> > Raspberry >> > Pi 1 B Plus. >> > >> > [1] - >> > https://github.com/raspberrypi/documentation/blob/master/configuration/images/dt-blob.dts >> >> I did use the dt-blob sometimes for cross-checking, but these are >> written against the schematics, not the dt-blob. If you've got things >> you'd like changed, could you send a patch? > > A patch against your v3 or my own v4 based on your patch? A followon patch is great, then the changes are obvious and we can either squash or commit as appropriate.
On 10/27/2016 10:52 AM, Eric Anholt wrote: > From: Linus Walleij <linus.walleij@linaro.org> > > The idea is to give useful names to GPIO lines that an implementer > will be using from userspace, e.g. for maker type projects. These are > user-visible using tools/gpio/lsgpio.c > arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 65 +++++++++++++++++++++++++++++++ > arch/arm/boot/dts/bcm2835-rpi-a.dts | 67 ++++++++++++++++++++++++++++++++ > arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 66 +++++++++++++++++++++++++++++++ > arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 66 +++++++++++++++++++++++++++++++ > arch/arm/boot/dts/bcm2835-rpi-b.dts | 67 ++++++++++++++++++++++++++++++++ Aren't the A and B rev 2 pinouts the same. If so, why duplicate the content between the files instead of creating an inclue file? Same for A+, B+, Pi 2, and Pi 3. Shouldn't this patch update the Pi 2 and Pi 3 DTs too? > diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts > &gpio { > + /* > + * This is based on the unreleased schematic for the Model A+. > + * > + * Legend: > + * "NC" = not connected (no rail from the SoC) > + * "FOO" = GPIO line named "FOO" on the schematic > + * "FOO_N" = GPIO line named "FOO" on schematic, active low > + */ > + gpio-line-names = "SDA0", > + "SCL0", > diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts > &gpio { > + /* > + * Taken from Raspberry-Pi-B-Plus-V1.2-Schematics.pdf > + * RPI-BPLUS sheet 1 > + * > + * Legend: > + * "NC" = not connected (no rail from the SoC) > + * "FOO" = GPIO line named "FOO" on the schematic > + * "FOO_N" = GPIO line named "FOO" on schematic, active low > + */ > + gpio-line-names = "ID_SD", > + "ID_SC", I think the whole point of naming GPIOs is to give users the same experience across the different boards where the same semantics exist in HW. Both the A+ and B+ use GPIO0/1 (a/k/a ID_SD/ID_SC a/k/a SDA0/SCL0) for the same semantic purpose and are exposed in the same externally visible way (same pins on the expansion header); the board ID EEPROM. Therefore I assert the names of these GPIOs should be identical on all boards that use them for that purpose, to allow SW (or human knowledge) portability between the boards. > + "GPIO17", This pin is known as GPIO_GEN0 on the expansion header. Given the expansion header is all end-users likely care about, and other pins (e.g. SPI_CE1_N) are named after the expansion header, shouldn't this patch use the GPIO expansion header naming for all pins that are routed to that header?
Stephen Warren <swarren@wwwdotorg.org> writes: > On 10/27/2016 10:52 AM, Eric Anholt wrote: >> From: Linus Walleij <linus.walleij@linaro.org> >> >> The idea is to give useful names to GPIO lines that an implementer >> will be using from userspace, e.g. for maker type projects. These are >> user-visible using tools/gpio/lsgpio.c > >> arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 65 +++++++++++++++++++++++++++++++ >> arch/arm/boot/dts/bcm2835-rpi-a.dts | 67 ++++++++++++++++++++++++++++++++ >> arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 66 +++++++++++++++++++++++++++++++ >> arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 66 +++++++++++++++++++++++++++++++ >> arch/arm/boot/dts/bcm2835-rpi-b.dts | 67 ++++++++++++++++++++++++++++++++ > > Aren't the A and B rev 2 pinouts the same. Looking at the contents of the patches and the schematics referenced From them: no, they aren't. > If so, why duplicate the > content between the files instead of creating an inclue file? Same for > A+, B+, Pi 2, and Pi 3. Shouldn't this patch update the Pi 2 and Pi 3 > DTs too? Pi2 and 3 would be lovely. If someone wants to write them, I'd encourage them to. > I think the whole point of naming GPIOs is to give users the same > experience across the different boards where the same semantics exist in > HW. Both the A+ and B+ use GPIO0/1 (a/k/a ID_SD/ID_SC a/k/a SDA0/SCL0) > for the same semantic purpose and are exposed in the same externally > visible way (same pins on the expansion header); the board ID EEPROM. > Therefore I assert the names of these GPIOs should be identical on all > boards that use them for that purpose, to allow SW (or human knowledge) > portability between the boards. I weakly agree with this, but find the idea of "consistent semantics" attached to the names rather silly given the number of ways people reconfigure the boards (particularly given that people can pinmux things). That said, I agree with you on renaming ID_SD to disagree with the schematic in favor of consistency, and I've done so. >> + "GPIO17", > > This pin is known as GPIO_GEN0 on the expansion header. Given the > expansion header is all end-users likely care about, and other pins > (e.g. SPI_CE1_N) are named after the expansion header, shouldn't this > patch use the GPIO expansion header naming for all pins that are routed > to that header? We've already been through this. Users *don't* know the GENx names and they were confusing and got eliminated in the later schematics. This was done for consistency, like you asked for above!
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts index 21507c922783..5a22c7965f34 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts @@ -22,6 +22,71 @@ }; &gpio { + /* + * This is based on the unreleased schematic for the Model A+. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "SDA0", + "SCL0", + "SDA1", + "SCL1", + "GPIO_GCLK", + "GPIO5", + "GPIO6", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "GPIO12", + "GPIO13", + /* Serial port */ + "TXD0", + "RXD0", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "SDA0", + "SCL0", + "NC", /* GPIO30 */ + "NC", /* GPIO31 */ + "NC", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "PWR_LOW_N", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", /* GPIO40 */ + "CAM_GPIO0", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "NC", /* GPIO44 */ + "PWM1_OUT", /* GPIO45 */ + "HDMI_HPD_N", + "STATUS_LED", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; /* I2S interface */ diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts index 5afba0900449..54f98c59a75d 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-a.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts @@ -15,6 +15,73 @@ }; &gpio { + /* + * Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf + * RPI00021 sheet 02 + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "SDA0", + "SCL0", + "SDA1", + "SCL1", + "GPIO_GCLK", + "CAM_CLK", + "LAN_RUN", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "NC", /* GPIO12 */ + "NC", /* GPIO13 */ + /* Serial port */ + "TXD0", + "RXD0", + "STATUS_LED_N", + "GPIO17", + "GPIO18", + "NC", /* GPIO19 */ + "NC", /* GPIO20 */ + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "NC", /* GPIO26 */ + "CAM_GPIO", + /* Binary number representing build/revision */ + "CONFIG0", + "CONFIG1", + "CONFIG2", + "CONFIG3", + "NC", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "NC", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", + "NC", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "NC", /* GPIO44 */ + "PWM1_OUT", + "HDMI_HPD_P", + "SD_CARD_DET", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + pinctrl-0 = <&gpioout &alt0 &i2s_alt2>; /* I2S interface */ diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts index 38f66aa244fe..f4bd78352a28 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts @@ -23,6 +23,72 @@ }; &gpio { + /* + * Taken from Raspberry-Pi-B-Plus-V1.2-Schematics.pdf + * RPI-BPLUS sheet 1 + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SD", + "ID_SC", + "SDA1", + "SCL1", + "GPIO_GCLK", + "GPIO5", + "GPIO6", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "GPIO12", + "GPIO13", + /* Serial port */ + "TXD0", + "RXD0", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "SDA0", + "SCL0", + "NC", /* GPIO30 */ + "LAN_RUN", /* GPIO31 */ + "CAM_GPIO1", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "PWR_LOW_N", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", /* GPIO40 */ + "CAM_GPIO0", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "ETHCLK", /* GPIO44 */ + "PWM1_OUT", /* GPIO45 */ + "HDMI_HPD_N", + "STATUS_LED", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; /* I2S interface */ diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts index 75e045aba7ce..9d1d4c6ce1f0 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts @@ -16,6 +16,72 @@ }; &gpio { + /* + * Taken from Raspberry-Pi-Rev-2.0-Model-AB-Schematics.pdf + * RPI00022 sheet 02 + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "SDA0", + "SCL0", + "SDA1", + "SCL1", + "GPIO_GCLK", + "CAM_CLK", + "LAN_RUN", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "NC", /* GPIO12 */ + "NC", /* GPIO13 */ + /* Serial port */ + "TXD0", + "RXD0", + "STATUS_LED_N", + "GPIO17", + "GPIO18", + "NC", /* GPIO19 */ + "NC", /* GPIO20 */ + "CAM_GPIO", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "NC", /* GPIO 26 */ + "GPIO27", + "GPIO28", + "GPIO29", + "GPIO30", + "GPIO31", + "NC", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "NC", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", + "NC", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "NC", /* GPIO44 */ + "PWM1_OUT", + "HDMI_HPD_P", + "SD_CARD_DET", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + pinctrl-0 = <&gpioout &alt0 &i2s_alt2>; /* I2S interface */ diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts index 76a254b3219a..71f50e16c646 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-b.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts @@ -16,6 +16,73 @@ }; &gpio { + /* + * Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf + * RPI00021 sheet 02 + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "SDA0", + "SCL0", + "SDA1", + "SCL1", + "GPIO_GCLK", + "CAM_CLK", + "LAN_RUN", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "NC", /* GPIO12 */ + "NC", /* GPIO13 */ + /* Serial port */ + "TXD0", + "RXD0", + "STATUS_LED_N", + "GPIO17", + "GPIO18", + "NC", /* GPIO19 */ + "NC", /* GPIO20 */ + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "NC", /* GPIO26 */ + "CAM_GPIO", + /* Binary number representing build/revision */ + "CONFIG0", + "CONFIG1", + "CONFIG2", + "CONFIG3", + "NC", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "NC", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", + "NC", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "NC", /* GPIO44 */ + "PWM1_OUT", + "HDMI_HPD_P", + "SD_CARD_DET", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + pinctrl-0 = <&gpioout &alt0>; };