diff mbox series

[05/15] ARM: dts: imx: fix PCI bus dtc warnings

Message ID 20170322020313.24338-5-robh@kernel.org
State New
Headers show
Series [01/15] ARM: dts: alpine: fix PCIe node name | expand

Commit Message

Rob Herring March 22, 2017, 2:03 a.m. UTC 
dtc recently added PCI bus checks. Fix these warnings.

Signed-off-by: Rob Herring <robh@kernel.org>

Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
---
Sub-arch maintainers, please apply to your trees unless arm-soc wants 
to take the whole lot.

 arch/arm/boot/dts/imx6qdl.dtsi | 3 ++-
 arch/arm/boot/dts/imx6qp.dtsi  | 2 +-
 arch/arm/boot/dts/imx6sx.dtsi  | 3 ++-
 3 files changed, 5 insertions(+), 3 deletions(-)

-- 
2.10.1

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Comments

Shawn Guo March 22, 2017, 8:19 a.m. UTC | #1 
On Tue, Mar 21, 2017 at 09:03:03PM -0500, Rob Herring wrote:
> dtc recently added PCI bus checks. Fix these warnings.

> 

> Signed-off-by: Rob Herring <robh@kernel.org>

> Cc: Shawn Guo <shawnguo@kernel.org>

> Cc: Sascha Hauer <kernel@pengutronix.de>

> Cc: Fabio Estevam <fabio.estevam@nxp.com>


Applied with a couple of changes below.

> ---

> Sub-arch maintainers, please apply to your trees unless arm-soc wants 

> to take the whole lot.

> 

>  arch/arm/boot/dts/imx6qdl.dtsi | 3 ++-

>  arch/arm/boot/dts/imx6qp.dtsi  | 2 +-

>  arch/arm/boot/dts/imx6sx.dtsi  | 3 ++-

>  3 files changed, 5 insertions(+), 3 deletions(-)

> 

> diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi

> index 6d7bf6496117..f95e24e73252 100644

> --- a/arch/arm/boot/dts/imx6qdl.dtsi

> +++ b/arch/arm/boot/dts/imx6qdl.dtsi

> @@ -197,7 +197,7 @@

>  			arm,shared-override;

>  		};

>  

> -		pcie: pcie@0x01000000 {

> +		pcie: pcie@1ffc000 {

>  			compatible = "fsl,imx6q-pcie", "snps,dw-pcie";

>  			reg = <0x01ffc000 0x04000>,

>  			      <0x01f00000 0x80000>;

> @@ -205,6 +205,7 @@

>  			#address-cells = <3>;

>  			#size-cells = <2>;

>  			device_type = "pci";

> +			bus-range = <0 0xff>;


For sake of consistency, I changed it to <0x00 0xff> like you did for
imx6sx.dtsi.

>  			ranges = <0x81000000 0 0          0x01f80000 0 0x00010000 /* downstream I/O */

>  				  0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */

>  			num-lanes = <1>;

> diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi

> index 24d071f5d9cd..b7688f1e3c86 100644

> --- a/arch/arm/boot/dts/imx6qp.dtsi

> +++ b/arch/arm/boot/dts/imx6qp.dtsi

> @@ -82,7 +82,7 @@

>  				      "ldb_di0", "ldb_di1", "prg";

>  		};

>  

> -		pcie: pcie@0x01000000 {

> +		pcie: pcie@1ffc000 {


We had a patch on IMX tree changing this to use label for referencing
the node, and hence this imx6qp.dtsi bit change can be saved.

Shawn

>  			compatible = "fsl,imx6qp-pcie", "snps,dw-pcie";

>  		};

>  

> diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi

> index dd4ec85ecbaa..c7f76de57c7b 100644

> --- a/arch/arm/boot/dts/imx6sx.dtsi

> +++ b/arch/arm/boot/dts/imx6sx.dtsi

> @@ -1281,7 +1281,7 @@

>  			};

>  		};

>  

> -		pcie: pcie@0x08000000 {

> +		pcie: pcie@8ffc000 {

>  			compatible = "fsl,imx6sx-pcie", "snps,dw-pcie";

>  			reg = <0x08ffc000 0x4000>; /* DBI */

>  			#address-cells = <3>;

> @@ -1293,6 +1293,7 @@

>  				  0x81000000 0 0          0x08f80000 0 0x00010000

>  				  /* non-prefetchable memory */

>  				  0x82000000 0 0x08000000 0x08000000 0 0x00f00000>;

> +			bus-range = <0x00 0xff>;

>  			num-lanes = <1>;

>  			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;

>  			clocks = <&clks IMX6SX_CLK_PCIE_REF_125M>,

> -- 

> 2.10.1

> 

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Rob Herring March 22, 2017, 1:53 p.m. UTC | #2 
On Wed, Mar 22, 2017 at 3:19 AM, Shawn Guo <shawnguo@kernel.org> wrote:
> On Tue, Mar 21, 2017 at 09:03:03PM -0500, Rob Herring wrote:

>> dtc recently added PCI bus checks. Fix these warnings.

>>

>> Signed-off-by: Rob Herring <robh@kernel.org>

>> Cc: Shawn Guo <shawnguo@kernel.org>

>> Cc: Sascha Hauer <kernel@pengutronix.de>

>> Cc: Fabio Estevam <fabio.estevam@nxp.com>

>

> Applied with a couple of changes below.


Thanks. BTW, forget to mention there's still one i.MX warning I did
not fix. It's with the "sky2@8" PCI device node. The unit address is
completely wrong. The comment says bus #8 which doesn't seem right
either. The unit address should be "<device num>[,<function]". There
should be a reg property which also has the bus number.

Rob
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Shawn Guo March 24, 2017, 1:28 a.m. UTC | #3 
+Tim who is the owner of Gateworks Ventana boards.

On Wed, Mar 22, 2017 at 08:53:34AM -0500, Rob Herring wrote:
> On Wed, Mar 22, 2017 at 3:19 AM, Shawn Guo <shawnguo@kernel.org> wrote:

> > On Tue, Mar 21, 2017 at 09:03:03PM -0500, Rob Herring wrote:

> >> dtc recently added PCI bus checks. Fix these warnings.

> >>

> >> Signed-off-by: Rob Herring <robh@kernel.org>

> >> Cc: Shawn Guo <shawnguo@kernel.org>

> >> Cc: Sascha Hauer <kernel@pengutronix.de>

> >> Cc: Fabio Estevam <fabio.estevam@nxp.com>

> >

> > Applied with a couple of changes below.

> 

> Thanks. BTW, forget to mention there's still one i.MX warning I did

> not fix. It's with the "sky2@8" PCI device node. The unit address is

> completely wrong. The comment says bus #8 which doesn't seem right

> either. The unit address should be "<device num>[,<function]". There

> should be a reg property which also has the bus number.


@Tim, these DTC warnings come from Ventana boards.  Can you take care of
them?

Shawn
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diff mbox series

Patch

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 6d7bf6496117..f95e24e73252 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -197,7 +197,7 @@ 
 			arm,shared-override;
 		};
 
-		pcie: pcie@0x01000000 {
+		pcie: pcie@1ffc000 {
 			compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
 			reg = <0x01ffc000 0x04000>,
 			      <0x01f00000 0x80000>;
@@ -205,6 +205,7 @@ 
 			#address-cells = <3>;
 			#size-cells = <2>;
 			device_type = "pci";
+			bus-range = <0 0xff>;
 			ranges = <0x81000000 0 0          0x01f80000 0 0x00010000 /* downstream I/O */
 				  0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
 			num-lanes = <1>;
diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi
index 24d071f5d9cd..b7688f1e3c86 100644
--- a/arch/arm/boot/dts/imx6qp.dtsi
+++ b/arch/arm/boot/dts/imx6qp.dtsi
@@ -82,7 +82,7 @@ 
 				      "ldb_di0", "ldb_di1", "prg";
 		};
 
-		pcie: pcie@0x01000000 {
+		pcie: pcie@1ffc000 {
 			compatible = "fsl,imx6qp-pcie", "snps,dw-pcie";
 		};
 
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index dd4ec85ecbaa..c7f76de57c7b 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -1281,7 +1281,7 @@ 
 			};
 		};
 
-		pcie: pcie@0x08000000 {
+		pcie: pcie@8ffc000 {
 			compatible = "fsl,imx6sx-pcie", "snps,dw-pcie";
 			reg = <0x08ffc000 0x4000>; /* DBI */
 			#address-cells = <3>;
@@ -1293,6 +1293,7 @@ 
 				  0x81000000 0 0          0x08f80000 0 0x00010000
 				  /* non-prefetchable memory */
 				  0x82000000 0 0x08000000 0x08000000 0 0x00f00000>;
+			bus-range = <0x00 0xff>;
 			num-lanes = <1>;
 			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clks IMX6SX_CLK_PCIE_REF_125M>,