| Message ID | 20170627180451.16094-1-ard.biesheuvel@linaro.org |
|---|---|
| State | New |
| Headers | show |
Ard,
Could you also refine the comments below in AhciModeInitialization() in the patch?
//
// Wait no longer than 10 ms to wait the Phy to detect the presence of a device.
// It's the requirment from SATA1.0a spec section 5.2.
//
Thanks,
Star
-----Original Message-----
From: Ard Biesheuvel [mailto:ard.biesheuvel@linaro.org]
Sent: Wednesday, June 28, 2017 2:05 AM
To: edk2-devel@lists.01.org; Zeng, Star <star.zeng@intel.com>; Dong, Eric <eric.dong@intel.com>
Cc: Tian, Feng <feng.tian@intel.com>; leif.lindholm@linaro.org; Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: [PATCH] MdeModulePkg/AtaAtapiPassThru: relax PHY detect timeout
The SATA spec mandates that link detection by the PHY completes within
10 ms after receiving a reset signal. However, there is no obligation to uphold this requirement at the driver end as strictly as we do, and as it turns out, some combinations of host and device (e.g., Samsung
850 EVO connected to a LeMaker Cello) are only borderline compliant, which means the device is not detected reliably.
So let's allow for a bit of margin, and increase the PHY detect timeout value to 15 ms.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--
2.9.3
_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-develdiff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
index 6401fb2e9fcd..809bcc307fc4 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
@@ -41,8 +41,9 @@ typedef union {
//
// Refer SATA1.0a spec section 5.2, the Phy detection time should be less than 10ms.
+// Add a bit of margin for robustness.
//
-#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 10
+#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 15
//
// Refer SATA1.0a spec, the FIS enable time should be less than 500ms.
//
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h index 6401fb2e9fcd..809bcc307fc4 100644 --- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h @@ -41,8 +41,9 @@ typedef union { // // Refer SATA1.0a spec section 5.2, the Phy detection time should be less than 10ms. +// Add a bit of margin for robustness. // -#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 10 +#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 15 // // Refer SATA1.0a spec, the FIS enable time should be less than 500ms. //
The SATA spec mandates that link detection by the PHY completes within 10 ms after receiving a reset signal. However, there is no obligation to uphold this requirement at the driver end as strictly as we do, and as it turns out, some combinations of host and device (e.g., Samsung 850 EVO connected to a LeMaker Cello) are only borderline compliant, which means the device is not detected reliably. So let's allow for a bit of margin, and increase the PHY detect timeout value to 15 ms. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> --- MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.9.3 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel