Message ID | 20171013162438.32458-8-alex.bennee@linaro.org |
---|---|
State | Superseded |
Headers | show
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X-Received-From: 2a00:1450:400c:c0c::22c Subject: [Qemu-devel] [RFC PATCH 07/30] fpu/softfloat: implement float16_abs helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= <alex.bennee@linaro.org>, qemu-devel@nongnu.org, Aurelien Jarno <aurelien@aurel32.net> Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org> |
Series |
v8.2 half-precision support (work-in-progress)
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expand
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On 10/13/2017 09:24 AM, Alex Bennée wrote: > This will be required when expanding the MINMAX() macro for 16 > bit/half-precision operations. > > Signed-off-by: Alex Bennée <alex.bennee@linaro.org> > --- > include/fpu/softfloat.h | 7 +++++++ > 1 file changed, 7 insertions(+) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > + return make_float16(float16_val(a) & 0x7fff); > +} > /*---------------------------------------------------------------------------- Watch the spacing. r~
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index d5e99667b6..edf402d422 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -374,6 +374,13 @@ static inline int float16_is_zero_or_denormal(float16 a) return (float16_val(a) & 0x7c00) == 0; } +static inline float16 float16_abs(float16 a) +{ + /* Note that abs does *not* handle NaN specially, nor does + * it flush denormal inputs to zero. + */ + return make_float16(float16_val(a) & 0x7fff); +} /*---------------------------------------------------------------------------- | The pattern for a default generated half-precision NaN. *----------------------------------------------------------------------------*/
This will be required when expanding the MINMAX() macro for 16 bit/half-precision operations. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> --- include/fpu/softfloat.h | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.14.1