diff mbox series

[RFC,22/30] target/arm/translate-a64.c: add FP16 FAGCT to AdvSIMD 3 Same

Message ID 20171013162438.32458-23-alex.bennee@linaro.org
State New
Headers show
Series v8.2 half-precision support (work-in-progress) | expand

Commit Message

Alex Bennée Oct. 13, 2017, 4:24 p.m. UTC 
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
 target/arm/helper-a64.c    | 14 +++++++-------
 target/arm/helper-a64.h    |  1 -
 target/arm/translate-a64.c |  3 +++
 3 files changed, 10 insertions(+), 8 deletions(-)

-- 
2.14.1

Comments

Richard Henderson Oct. 17, 2017, 12:39 a.m. UTC | #1 
On 10/13/2017 09:24 AM, Alex Bennée wrote:
> -/* uint32_t HELPER(advsimd_acgt_f16)(float16 a, float16 b, void *fpstp) */

> -/* { */

> -/*     float_status *fpst = fpstp; */

> -/*     float16 f0 = float16_abs(a); */

> -/*     float16 f1 = float16_abs(b); */

> -/*     return -float16_lt(f1, f0, fpst); */

> -/* } */

> +uint32_t HELPER(advsimd_acgt_f16)(float16 a, float16 b, void *fpstp)

> +{

> +    float_status *fpst = fpstp;

> +    float16 f0 = float16_abs(a);

> +    float16 f1 = float16_abs(b);

> +    return -float16_lt(f1, f0, fpst);

> +}


Should be folded into previous.  But otherwise ok.


r~
diff mbox series

Patch

diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index b62d77aec4..137866732d 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -609,10 +609,10 @@  uint32_t HELPER(advsimd_acge_f16)(float16 a, float16 b, void *fpstp)
     return -float16_le(f1, f0, fpst);
 }
 
-/* uint32_t HELPER(advsimd_acgt_f16)(float16 a, float16 b, void *fpstp) */
-/* { */
-/*     float_status *fpst = fpstp; */
-/*     float16 f0 = float16_abs(a); */
-/*     float16 f1 = float16_abs(b); */
-/*     return -float16_lt(f1, f0, fpst); */
-/* } */
+uint32_t HELPER(advsimd_acgt_f16)(float16 a, float16 b, void *fpstp)
+{
+    float_status *fpst = fpstp;
+    float16 f0 = float16_abs(a);
+    float16 f1 = float16_abs(b);
+    return -float16_lt(f1, f0, fpst);
+}
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h
index 952869f43e..66c4062ea5 100644
--- a/target/arm/helper-a64.h
+++ b/target/arm/helper-a64.h
@@ -53,7 +53,6 @@  DEF_HELPER_3(advsimd_minh, f16, f16, f16, ptr)
 DEF_HELPER_3(advsimd_maxnumh, f16, f16, f16, ptr)
 DEF_HELPER_3(advsimd_minnumh, f16, f16, f16, ptr)
 DEF_HELPER_3(advsimd_mulxh, f16, f16, f16, ptr)
-
 DEF_HELPER_3(advsimd_ceq_f16, i32, f16, f16, ptr)
 DEF_HELPER_3(advsimd_cge_f16, i32, f16, f16, ptr)
 DEF_HELPER_3(advsimd_cgt_f16, i32, f16, f16, ptr)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 623b0b3fab..4ad470d9e8 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -9819,6 +9819,9 @@  static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn)
         case 0x27: /* FDIV */
             gen_helper_advsimd_divh(tcg_res, tcg_op1, tcg_op2, fpst);
             break;
+        case 0x35: /* FACGT */
+            gen_helper_advsimd_acgt_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+            break;
         default:
             fprintf(stderr,"%s: insn %#04x, fpop %#2x @ %#" PRIx64 "\n",
                     __func__, insn, fpopcode, s->pc);