| Message ID | 1527171551-21979-6-git-send-email-gilad@benyossef.com |
|---|---|
| State | Accepted |
| Commit | 0f6d237cafda2e06b289eab1fa2addf09e666a07 |
| Headers | show |
| Series | crypto: ccree: cleanup, fixes and R-Car enabling | expand |
On Thu, May 24, 2018 at 03:19:10PM +0100, Gilad Ben-Yossef wrote: > Add bindings for CryptoCell instance in the SoC. > > Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com> In so far as I can review the details of this (which is not much) this looks fine to me. I am, however, a little unclear in when it should be accepted. > --- > arch/arm64/boot/dts/renesas/r8a7795.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi > index d842940..3ac75db 100644 > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi > @@ -528,6 +528,15 @@ > status = "disabled"; > }; > > + arm_cc630p: crypto@e6601000 { > + compatible = "arm,cryptocell-630p-ree"; > + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; > + reg = <0x0 0xe6601000 0 0x1000>; > + clocks = <&cpg CPG_MOD 229>; > + resets = <&cpg 229>; > + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; > + }; > + > i2c3: i2c@e66d0000 { > #address-cells = <1>; > #size-cells = <0>; > -- > 2.7.4 >
Hi Gilad, On Thu, May 31, 2018 at 1:55 PM, Gilad Ben-Yossef <gilad@benyossef.com> wrote: > On Tue, May 29, 2018 at 7:19 PM, Simon Horman <horms@verge.net.au> wrote: >> On Thu, May 24, 2018 at 03:19:10PM +0100, Gilad Ben-Yossef wrote: >>> Add bindings for CryptoCell instance in the SoC. >>> >>> Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com> >> >> In so far as I can review the details of this (which is not much) this >> looks fine to me. I am, however, a little unclear in when it should be >> accepted. > > Since Herbert Xu ACKed the driver changes, I would say the only gating > commit is Geert's CR clock patch. These are queued for v4.19. > If that one is in, than I would say this one should go in as well. As the device node now has a power-domains property, the genpd code will try to attach it to the CPG/MSSR PM Domain, which is a clock domain. In the absence of the clock patch, the device's module clock cannot be found, and dev_pm_domain_attach() and thus platform_drv_probe() will fail, before calling the device driver's .probe() function. So there is no longer a dependency on the clock patch, and the DT patch can go in in parallel (although I prefer its subject to be changed s/binding/device device/). Thanks! Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index d842940..3ac75db 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -528,6 +528,15 @@ status = "disabled"; }; + arm_cc630p: crypto@e6601000 { + compatible = "arm,cryptocell-630p-ree"; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x0 0xe6601000 0 0x1000>; + clocks = <&cpg CPG_MOD 229>; + resets = <&cpg 229>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + }; + i2c3: i2c@e66d0000 { #address-cells = <1>; #size-cells = <0>;
Add bindings for CryptoCell instance in the SoC. Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com> --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.7.4