diff mbox series

[GAS,ARM] Improve indentation of ARM architecture declarations

Message ID CAKnkMGvONCmKcm9mODsoOkfawQT3381Fcqm5+TfA8Q_Wr9sXJQ@mail.gmail.com
State New
Headers show
Series [GAS,ARM] Improve indentation of ARM architecture declarations | expand

Commit Message

Thomas Preudhomme Nov. 8, 2018, 4:01 p.m. UTC
Hi,

This patch cleans up indentation of ARM architecture declaration, namely
entries of arm_archs and definition of macros ARM_EXT_*, ARM_AEXT_*,
ARM_AEXT2_*, FPU_EXT_*, FPU_ARCH_* and ARM_ARCH_*. It also gets rid of
unused ARM_ARCH_V6M-ONLY and merge AEM_AEXT_V6M_ONLY in ARM_AEXT_V6M now
sole user.

The result should hopefully be much clearer to read.

ChangeLog entries are as follow:

*** gas/ChangeLog ***

2017-11-08  Thomas Preud'homme  <thomas.preudhomme@arm.com>

* config/tc-arm.c (arm_archs): Reindent.

*** include/ChangeLog ***

2018-11-08  Thomas Preud'homme  <thomas.preudhomme@arm.com>

* opcode/arm.h (ARM_AEXT_V6M_ONLY): Merge into its use in ARM_AEXT_V6M.
(ARM_ARCH_V6M_ONLY): Remove.
(ARM_EXT_V1, ARM_EXT_V2, ARM_EXT_V2S, ARM_EXT_V3, ARM_EXT_V3M,
ARM_EXT_V4, ARM_EXT_V4T, ARM_EXT_V5, ARM_EXT_V5T, ARM_EXT_V5ExP,
ARM_EXT_V5E, ARM_EXT_V5J, ARM_EXT_V6, ARM_EXT_V6K, ARM_EXT_V8,
ARM_EXT_V6T2, ARM_EXT_DIV, ARM_EXT_V5E_NOTM, ARM_EXT_V6_NOTM,
ARM_EXT_V7, ARM_EXT_V7A, ARM_EXT_V7R, ARM_EXT_V7M, ARM_EXT_V6M,
ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR, ARM_EXT_V6_DSP, ARM_EXT_MP,
ARM_EXT_SEC, ARM_EXT_OS, ARM_EXT_ADIV, ARM_EXT_VIRT, ARM_EXT2_PAN,
ARM_EXT2_V8_2A, ARM_EXT2_V8M, ARM_EXT2_ATOMICS, ARM_EXT2_V6T2_V8M,
ARM_EXT2_FP16_INST, ARM_EXT2_V8M_MAIN, ARM_EXT2_RAS, ARM_EXT2_V8_3A,
ARM_EXT2_V8A, ARM_EXT2_V8_4A, ARM_EXT2_FP16_FML, ARM_EXT2_V8_5A,
ARM_EXT2_SB, ARM_EXT2_PREDRES, ARM_CEXT_XSCALE, ARM_CEXT_MAVERICK,
ARM_CEXT_IWMMXT, ARM_CEXT_IWMMXT2, FPU_ENDIAN_PURE, FPU_ENDIAN_BIG,
FPU_FPA_EXT_V1, FPU_FPA_EXT_V2, FPU_MAVERICK, FPU_VFP_EXT_V1xD,
FPU_VFP_EXT_V1, FPU_VFP_EXT_V2, FPU_VFP_EXT_V3xD, FPU_VFP_EXT_V3,
FPU_NEON_EXT_V1, FPU_VFP_EXT_D32, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
FPU_VFP_EXT_FMA, FPU_VFP_EXT_ARMV8, FPU_NEON_EXT_ARMV8,
FPU_CRYPTO_EXT_ARMV8, CRC_EXT_ARMV8, FPU_VFP_EXT_ARMV8xD,
FPU_NEON_EXT_RDMA, FPU_NEON_EXT_DOTPROD, ARM_AEXT_V1, ARM_AEXT_V2,
ARM_AEXT_V2S, ARM_AEXT_V3, ARM_AEXT_V3M, ARM_AEXT_V4xM, ARM_AEXT_V4,
ARM_AEXT_V4TxM, ARM_AEXT_V4T, ARM_AEXT_V5xM, ARM_AEXT_V5,
ARM_AEXT_V5TxM, ARM_AEXT_V5T, ARM_AEXT_V5TExP, ARM_AEXT_V5TE,
ARM_AEXT_V5TEJ, ARM_AEXT_V6, ARM_AEXT_V6K, ARM_AEXT_V6Z, ARM_AEXT_V6KZ,
ARM_AEXT_V6T2, ARM_AEXT_V6KT2, ARM_AEXT_V6ZT2, ARM_AEXT_V6KZT2,
ARM_AEXT_V7_ARM, ARM_AEXT_V7A, ARM_AEXT_V7VE, ARM_AEXT_V7R,
ARM_AEXT_NOTM, ARM_AEXT_V6M_ONLY, ARM_AEXT_V6M, ARM_AEXT_V6SM,
ARM_AEXT_V7M, ARM_AEXT_V7, ARM_AEXT_V7EM, ARM_AEXT_V8A, ARM_AEXT2_V8A,
ARM_AEXT2_V8_1A, ARM_AEXT2_V8_2A, ARM_AEXT2_V8_3A, ARM_AEXT2_V8_4A,
ARM_AEXT2_V8_5A, ARM_AEXT_V8M_BASE, ARM_AEXT_V8M_MAIN,
ARM_AEXT_V8M_MAIN_DSP, ARM_AEXT2_V8M, ARM_AEXT2_V8M_BASE,
ARM_AEXT2_V8M_MAIN, ARM_AEXT2_V8M_MAIN_DSP, ARM_AEXT_V8R,
ARM_AEXT2_V8R, FPU_VFP_V1xD, FPU_VFP_V1, FPU_VFP_V2, FPU_VFP_V3D16,
FPU_VFP_V3, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4, FPU_VFP_V4_SP_D16,
FPU_VFP_V5D16, FPU_VFP_ARMV8, FPU_NEON_ARMV8, FPU_CRYPTO_ARMV8,
FPU_VFP_HARD, FPU_FPA, FPU_ARCH_VFP, FPU_ARCH_FPE, FPU_ARCH_FPA,
FPU_ARCH_VFP_V1xD, FPU_ARCH_VFP_V1, FPU_ARCH_VFP_V2,
FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_FP16,
FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_NEON_V1, FPU_ARCH_VFP_V3_PLUS_NEON_V1,
FPU_ARCH_NEON_FP16, FPU_ARCH_VFP_HARD, FPU_ARCH_VFP_V4,
FPU_ARCH_VFP_V4D16, FPU_ARCH_VFP_V4_SP_D16, FPU_ARCH_VFP_V5D16,
FPU_ARCH_VFP_V5_SP_D16, FPU_ARCH_NEON_VFP_V4, FPU_ARCH_VFP_ARMV8,
FPU_ARCH_NEON_VFP_ARMV8, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD, ARCH_CRC_ARMV8,
FPU_ARCH_NEON_VFP_ARMV8_1, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1,
FPU_ARCH_DOTPROD_NEON_VFP_ARMV8, ARM_ARCH_V1, ARM_ARCH_V2,
ARM_ARCH_V2S, ARM_ARCH_V3, ARM_ARCH_V3M, ARM_ARCH_V4xM, ARM_ARCH_V4,
ARM_ARCH_V4TxM, ARM_ARCH_V4T, ARM_ARCH_V5xM, ARM_ARCH_V5,
ARM_ARCH_V5TxM, ARM_ARCH_V5T, ARM_ARCH_V5TExP, ARM_ARCH_V5TE,
ARM_ARCH_V5TEJ, ARM_ARCH_V6, ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6KZ,
ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2, ARM_ARCH_V6KZT2,
ARM_ARCH_V6M, ARM_ARCH_V6SM, ARM_ARCH_V7, ARM_ARCH_V7A, ARM_ARCH_V7VE,
ARM_ARCH_V7R, ARM_ARCH_V7M, ARM_ARCH_V7EM, ARM_ARCH_V8A,
ARM_ARCH_V8A_CRC, ARM_ARCH_V8_1A, ARM_ARCH_V8_2A, ARM_ARCH_V8_3A,
ARM_ARCH_V8_4A, ARM_ARCH_V8_5A, ARM_ARCH_V8M_BASE, ARM_ARCH_V8M_MAIN,
ARM_ARCH_V8M_MAIN_DSP, ARM_ARCH_V8R): Reindent.

Testing: testsuite shows no regression for arm-none-eabi targets.
ARM_ARCH_V6M was verified to have the same hex encoding in gdb before
and after the merging of ARM_AEXT_V6M_ONLY into ARM_AEXT_V6M.

Is it ok for master branch?

Best regards,

Thomas

Comments

Nick Clifton Nov. 9, 2018, 4:32 p.m. UTC | #1
Hi Thomas,

> The result should hopefully be much clearer to read.

> 

> ChangeLog entries are as follow:

> 

> *** gas/ChangeLog ***

> 

> 2017-11-08  Thomas Preud'homme  <thomas.preudhomme@arm.com>

> 

> * config/tc-arm.c (arm_archs): Reindent.

> 

> *** include/ChangeLog ***

> 

> 2018-11-08  Thomas Preud'homme  <thomas.preudhomme@arm.com>

> 

> * opcode/arm.h (ARM_AEXT_V6M_ONLY): Merge into its use in ARM_AEXT_V6M.

> (ARM_ARCH_V6M_ONLY): Remove.

> (ARM_EXT_V1, ARM_EXT_V2, ARM_EXT_V2S, ARM_EXT_V3, ARM_EXT_V3M,

> ARM_EXT_V4, ARM_EXT_V4T, ARM_EXT_V5, ARM_EXT_V5T, ARM_EXT_V5ExP,

> ARM_EXT_V5E, ARM_EXT_V5J, ARM_EXT_V6, ARM_EXT_V6K, ARM_EXT_V8,

> ARM_EXT_V6T2, ARM_EXT_DIV, ARM_EXT_V5E_NOTM, ARM_EXT_V6_NOTM,

> ARM_EXT_V7, ARM_EXT_V7A, ARM_EXT_V7R, ARM_EXT_V7M, ARM_EXT_V6M,

> ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR, ARM_EXT_V6_DSP, ARM_EXT_MP,

> ARM_EXT_SEC, ARM_EXT_OS, ARM_EXT_ADIV, ARM_EXT_VIRT, ARM_EXT2_PAN,

> ARM_EXT2_V8_2A, ARM_EXT2_V8M, ARM_EXT2_ATOMICS, ARM_EXT2_V6T2_V8M,

> ARM_EXT2_FP16_INST, ARM_EXT2_V8M_MAIN, ARM_EXT2_RAS, ARM_EXT2_V8_3A,

> ARM_EXT2_V8A, ARM_EXT2_V8_4A, ARM_EXT2_FP16_FML, ARM_EXT2_V8_5A,

> ARM_EXT2_SB, ARM_EXT2_PREDRES, ARM_CEXT_XSCALE, ARM_CEXT_MAVERICK,

> ARM_CEXT_IWMMXT, ARM_CEXT_IWMMXT2, FPU_ENDIAN_PURE, FPU_ENDIAN_BIG,

> FPU_FPA_EXT_V1, FPU_FPA_EXT_V2, FPU_MAVERICK, FPU_VFP_EXT_V1xD,

> FPU_VFP_EXT_V1, FPU_VFP_EXT_V2, FPU_VFP_EXT_V3xD, FPU_VFP_EXT_V3,

> FPU_NEON_EXT_V1, FPU_VFP_EXT_D32, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,

> FPU_VFP_EXT_FMA, FPU_VFP_EXT_ARMV8, FPU_NEON_EXT_ARMV8,

> FPU_CRYPTO_EXT_ARMV8, CRC_EXT_ARMV8, FPU_VFP_EXT_ARMV8xD,

> FPU_NEON_EXT_RDMA, FPU_NEON_EXT_DOTPROD, ARM_AEXT_V1, ARM_AEXT_V2,

> ARM_AEXT_V2S, ARM_AEXT_V3, ARM_AEXT_V3M, ARM_AEXT_V4xM, ARM_AEXT_V4,

> ARM_AEXT_V4TxM, ARM_AEXT_V4T, ARM_AEXT_V5xM, ARM_AEXT_V5,

> ARM_AEXT_V5TxM, ARM_AEXT_V5T, ARM_AEXT_V5TExP, ARM_AEXT_V5TE,

> ARM_AEXT_V5TEJ, ARM_AEXT_V6, ARM_AEXT_V6K, ARM_AEXT_V6Z, ARM_AEXT_V6KZ,

> ARM_AEXT_V6T2, ARM_AEXT_V6KT2, ARM_AEXT_V6ZT2, ARM_AEXT_V6KZT2,

> ARM_AEXT_V7_ARM, ARM_AEXT_V7A, ARM_AEXT_V7VE, ARM_AEXT_V7R,

> ARM_AEXT_NOTM, ARM_AEXT_V6M_ONLY, ARM_AEXT_V6M, ARM_AEXT_V6SM,

> ARM_AEXT_V7M, ARM_AEXT_V7, ARM_AEXT_V7EM, ARM_AEXT_V8A, ARM_AEXT2_V8A,

> ARM_AEXT2_V8_1A, ARM_AEXT2_V8_2A, ARM_AEXT2_V8_3A, ARM_AEXT2_V8_4A,

> ARM_AEXT2_V8_5A, ARM_AEXT_V8M_BASE, ARM_AEXT_V8M_MAIN,

> ARM_AEXT_V8M_MAIN_DSP, ARM_AEXT2_V8M, ARM_AEXT2_V8M_BASE,

> ARM_AEXT2_V8M_MAIN, ARM_AEXT2_V8M_MAIN_DSP, ARM_AEXT_V8R,

> ARM_AEXT2_V8R, FPU_VFP_V1xD, FPU_VFP_V1, FPU_VFP_V2, FPU_VFP_V3D16,

> FPU_VFP_V3, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4, FPU_VFP_V4_SP_D16,

> FPU_VFP_V5D16, FPU_VFP_ARMV8, FPU_NEON_ARMV8, FPU_CRYPTO_ARMV8,

> FPU_VFP_HARD, FPU_FPA, FPU_ARCH_VFP, FPU_ARCH_FPE, FPU_ARCH_FPA,

> FPU_ARCH_VFP_V1xD, FPU_ARCH_VFP_V1, FPU_ARCH_VFP_V2,

> FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_FP16,

> FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_NEON_V1, FPU_ARCH_VFP_V3_PLUS_NEON_V1,

> FPU_ARCH_NEON_FP16, FPU_ARCH_VFP_HARD, FPU_ARCH_VFP_V4,

> FPU_ARCH_VFP_V4D16, FPU_ARCH_VFP_V4_SP_D16, FPU_ARCH_VFP_V5D16,

> FPU_ARCH_VFP_V5_SP_D16, FPU_ARCH_NEON_VFP_V4, FPU_ARCH_VFP_ARMV8,

> FPU_ARCH_NEON_VFP_ARMV8, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,

> FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD, ARCH_CRC_ARMV8,

> FPU_ARCH_NEON_VFP_ARMV8_1, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1,

> FPU_ARCH_DOTPROD_NEON_VFP_ARMV8, ARM_ARCH_V1, ARM_ARCH_V2,

> ARM_ARCH_V2S, ARM_ARCH_V3, ARM_ARCH_V3M, ARM_ARCH_V4xM, ARM_ARCH_V4,

> ARM_ARCH_V4TxM, ARM_ARCH_V4T, ARM_ARCH_V5xM, ARM_ARCH_V5,

> ARM_ARCH_V5TxM, ARM_ARCH_V5T, ARM_ARCH_V5TExP, ARM_ARCH_V5TE,

> ARM_ARCH_V5TEJ, ARM_ARCH_V6, ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6KZ,

> ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2, ARM_ARCH_V6KZT2,

> ARM_ARCH_V6M, ARM_ARCH_V6SM, ARM_ARCH_V7, ARM_ARCH_V7A, ARM_ARCH_V7VE,

> ARM_ARCH_V7R, ARM_ARCH_V7M, ARM_ARCH_V7EM, ARM_ARCH_V8A,

> ARM_ARCH_V8A_CRC, ARM_ARCH_V8_1A, ARM_ARCH_V8_2A, ARM_ARCH_V8_3A,

> ARM_ARCH_V8_4A, ARM_ARCH_V8_5A, ARM_ARCH_V8M_BASE, ARM_ARCH_V8M_MAIN,

> ARM_ARCH_V8M_MAIN_DSP, ARM_ARCH_V8R): Reindent.

> 

> Testing: testsuite shows no regression for arm-none-eabi targets.

> ARM_ARCH_V6M was verified to have the same hex encoding in gdb before

> and after the merging of ARM_AEXT_V6M_ONLY into ARM_AEXT_V6M.

> 

> Is it ok for master branch?


Go ahead - make my day.  Ahem, I mean, patch approved - please apply.

Cheers
  Nick
diff mbox series

Patch

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 80fb0c3b5ea31b399331c2b1d60e4a7ad05899cf..818f67e6bbd533627febeb9034084682bdafc56f 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -26301,63 +26301,63 @@  struct arm_arch_option_table
 
 static const struct arm_arch_option_table arm_archs[] =
 {
-  ARM_ARCH_OPT ("all",		ARM_ANY,	 FPU_ARCH_FPA),
-  ARM_ARCH_OPT ("armv1",	ARM_ARCH_V1,	 FPU_ARCH_FPA),
-  ARM_ARCH_OPT ("armv2",	ARM_ARCH_V2,	 FPU_ARCH_FPA),
-  ARM_ARCH_OPT ("armv2a",	ARM_ARCH_V2S,	 FPU_ARCH_FPA),
-  ARM_ARCH_OPT ("armv2s",	ARM_ARCH_V2S,	 FPU_ARCH_FPA),
-  ARM_ARCH_OPT ("armv3",	ARM_ARCH_V3,	 FPU_ARCH_FPA),
-  ARM_ARCH_OPT ("armv3m",	ARM_ARCH_V3M,	 FPU_ARCH_FPA),
-  ARM_ARCH_OPT ("armv4",	ARM_ARCH_V4,	 FPU_ARCH_FPA),
-  ARM_ARCH_OPT ("armv4xm",	ARM_ARCH_V4xM,	 FPU_ARCH_FPA),
-  ARM_ARCH_OPT ("armv4t",	ARM_ARCH_V4T,	 FPU_ARCH_FPA),
-  ARM_ARCH_OPT ("armv4txm",	ARM_ARCH_V4TxM,	 FPU_ARCH_FPA),
-  ARM_ARCH_OPT ("armv5",	ARM_ARCH_V5,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv5t",	ARM_ARCH_V5T,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv5txm",	ARM_ARCH_V5TxM,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv5te",	ARM_ARCH_V5TE,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv5texp",	ARM_ARCH_V5TExP, FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv5tej",	ARM_ARCH_V5TEJ,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv6",	ARM_ARCH_V6,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv6j",	ARM_ARCH_V6,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv6k",	ARM_ARCH_V6K,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv6z",	ARM_ARCH_V6Z,	 FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("all",		  ARM_ANY,		FPU_ARCH_FPA),
+  ARM_ARCH_OPT ("armv1",	  ARM_ARCH_V1,		FPU_ARCH_FPA),
+  ARM_ARCH_OPT ("armv2",	  ARM_ARCH_V2,		FPU_ARCH_FPA),
+  ARM_ARCH_OPT ("armv2a",	  ARM_ARCH_V2S,		FPU_ARCH_FPA),
+  ARM_ARCH_OPT ("armv2s",	  ARM_ARCH_V2S,		FPU_ARCH_FPA),
+  ARM_ARCH_OPT ("armv3",	  ARM_ARCH_V3,		FPU_ARCH_FPA),
+  ARM_ARCH_OPT ("armv3m",	  ARM_ARCH_V3M,		FPU_ARCH_FPA),
+  ARM_ARCH_OPT ("armv4",	  ARM_ARCH_V4,		FPU_ARCH_FPA),
+  ARM_ARCH_OPT ("armv4xm",	  ARM_ARCH_V4xM,	FPU_ARCH_FPA),
+  ARM_ARCH_OPT ("armv4t",	  ARM_ARCH_V4T,		FPU_ARCH_FPA),
+  ARM_ARCH_OPT ("armv4txm",	  ARM_ARCH_V4TxM,	FPU_ARCH_FPA),
+  ARM_ARCH_OPT ("armv5",	  ARM_ARCH_V5,		FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv5t",	  ARM_ARCH_V5T,		FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv5txm",	  ARM_ARCH_V5TxM,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv5te",	  ARM_ARCH_V5TE,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv5texp",	  ARM_ARCH_V5TExP,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv5tej",	  ARM_ARCH_V5TEJ,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv6",	  ARM_ARCH_V6,		FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv6j",	  ARM_ARCH_V6,		FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv6k",	  ARM_ARCH_V6K,		FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv6z",	  ARM_ARCH_V6Z,		FPU_ARCH_VFP),
   /* The official spelling of this variant is ARMv6KZ, the name "armv6zk" is
      kept to preserve existing behaviour.  */
-  ARM_ARCH_OPT ("armv6kz",	ARM_ARCH_V6KZ,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv6zk",	ARM_ARCH_V6KZ,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv6t2",	ARM_ARCH_V6T2,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv6kt2",	ARM_ARCH_V6KT2,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv6zt2",	ARM_ARCH_V6ZT2,	 FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv6kz",	  ARM_ARCH_V6KZ,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv6zk",	  ARM_ARCH_V6KZ,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv6t2",	  ARM_ARCH_V6T2,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv6kt2",	  ARM_ARCH_V6KT2,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv6zt2",	  ARM_ARCH_V6ZT2,	FPU_ARCH_VFP),
   /* The official spelling of this variant is ARMv6KZ, the name "armv6zkt2" is
      kept to preserve existing behaviour.  */
-  ARM_ARCH_OPT ("armv6kzt2",	ARM_ARCH_V6KZT2, FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv6zkt2",	ARM_ARCH_V6KZT2, FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv6-m",	ARM_ARCH_V6M,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv6s-m",	ARM_ARCH_V6SM,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv7",	ARM_ARCH_V7,	 FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv6kzt2",	  ARM_ARCH_V6KZT2,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv6zkt2",	  ARM_ARCH_V6KZT2,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv6-m",	  ARM_ARCH_V6M,		FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv6s-m",	  ARM_ARCH_V6SM,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv7",	  ARM_ARCH_V7,		FPU_ARCH_VFP),
   /* The official spelling of the ARMv7 profile variants is the dashed form.
      Accept the non-dashed form for compatibility with old toolchains.  */
-  ARM_ARCH_OPT ("armv7a",	ARM_ARCH_V7A,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv7ve",	ARM_ARCH_V7VE,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv7r",	ARM_ARCH_V7R,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv7m",	ARM_ARCH_V7M,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv7-a",	ARM_ARCH_V7A,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv7-r",	ARM_ARCH_V7R,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv7-m",	ARM_ARCH_V7M,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv7e-m",	ARM_ARCH_V7EM,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv8-m.base",	ARM_ARCH_V8M_BASE, FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv8-m.main",	ARM_ARCH_V8M_MAIN, FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv8-a",	ARM_ARCH_V8A,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv8.1-a",	ARM_ARCH_V8_1A,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv8.2-a",	ARM_ARCH_V8_2A,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv8.3-a",	ARM_ARCH_V8_3A,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv8-r",	ARM_ARCH_V8R,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv8.4-a",	ARM_ARCH_V8_4A,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("armv8.5-a",	ARM_ARCH_V8_5A,	 FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("xscale",	ARM_ARCH_XSCALE, FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("iwmmxt",	ARM_ARCH_IWMMXT, FPU_ARCH_VFP),
-  ARM_ARCH_OPT ("iwmmxt2",	ARM_ARCH_IWMMXT2,FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv7a",	  ARM_ARCH_V7A,		FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv7ve",	  ARM_ARCH_V7VE,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv7r",	  ARM_ARCH_V7R,		FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv7m",	  ARM_ARCH_V7M,		FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv7-a",	  ARM_ARCH_V7A,		FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv7-r",	  ARM_ARCH_V7R,		FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv7-m",	  ARM_ARCH_V7M,		FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv7e-m",	  ARM_ARCH_V7EM,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv8-m.base",	  ARM_ARCH_V8M_BASE,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv8-m.main",	  ARM_ARCH_V8M_MAIN,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv8-a",	  ARM_ARCH_V8A,		FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv8.1-a",	  ARM_ARCH_V8_1A,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv8.2-a",	  ARM_ARCH_V8_2A,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv8.3-a",	  ARM_ARCH_V8_3A,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv8-r",	  ARM_ARCH_V8R,		FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv8.4-a",	  ARM_ARCH_V8_4A,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv8.5-a",	  ARM_ARCH_V8_5A,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("xscale",	  ARM_ARCH_XSCALE,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("iwmmxt",	  ARM_ARCH_IWMMXT,	FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("iwmmxt2",	  ARM_ARCH_IWMMXT2,	FPU_ARCH_VFP),
   { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
 };
 #undef ARM_ARCH_OPT
diff --git a/include/opcode/arm.h b/include/opcode/arm.h
index 6f43abb3030185471873b51406dcfefc11135c8d..10ef763dcf264bebaa26848b6859baed61df36fc 100644
--- a/include/opcode/arm.h
+++ b/include/opcode/arm.h
@@ -19,159 +19,162 @@ 
    MA 02110-1301, USA.  */
 
 /* The following bitmasks control CPU extensions:  */
-#define ARM_EXT_V1	 0x00000001	/* All processors (core set).  */
-#define ARM_EXT_V2	 0x00000002	/* Multiply instructions.  */
-#define ARM_EXT_V2S	 0x00000004	/* SWP instructions.       */
-#define ARM_EXT_V3	 0x00000008	/* MSR MRS.                */
-#define ARM_EXT_V3M	 0x00000010	/* Allow long multiplies.  */
-#define ARM_EXT_V4	 0x00000020	/* Allow half word loads.  */
-#define ARM_EXT_V4T	 0x00000040	/* Thumb.                  */
-#define ARM_EXT_V5	 0x00000080	/* Allow CLZ, etc.         */
-#define ARM_EXT_V5T	 0x00000100	/* Improved interworking.  */
-#define ARM_EXT_V5ExP	 0x00000200	/* DSP core set.           */
-#define ARM_EXT_V5E	 0x00000400	/* DSP Double transfers.   */
-#define ARM_EXT_V5J	 0x00000800	/* Jazelle extension.	   */
-#define ARM_EXT_V6       0x00001000     /* ARM V6.                 */
-#define ARM_EXT_V6K      0x00002000     /* ARM V6K.                */
-#define ARM_EXT_V8	 0x00004000     /* ARMv8 w/o atomics.      */
-#define ARM_EXT_V6T2	 0x00008000	/* Thumb-2.                */
-#define ARM_EXT_DIV	 0x00010000	/* Integer division.       */
+#define ARM_EXT_V1	     0x00000001	/* All processors (core set).	     */
+#define ARM_EXT_V2	     0x00000002	/* Multiply instructions.	     */
+#define ARM_EXT_V2S	     0x00000004	/* SWP instructions.		     */
+#define ARM_EXT_V3	     0x00000008	/* MSR MRS.			     */
+#define ARM_EXT_V3M	     0x00000010	/* Allow long multiplies.	     */
+#define ARM_EXT_V4	     0x00000020	/* Allow half word loads.	     */
+#define ARM_EXT_V4T	     0x00000040	/* Thumb.			     */
+#define ARM_EXT_V5	     0x00000080	/* Allow CLZ, etc.		     */
+#define ARM_EXT_V5T	     0x00000100	/* Improved interworking.	     */
+#define ARM_EXT_V5ExP	     0x00000200	/* DSP core set.		     */
+#define ARM_EXT_V5E	     0x00000400	/* DSP Double transfers.	     */
+#define ARM_EXT_V5J	     0x00000800	/* Jazelle extension.		     */
+#define ARM_EXT_V6	     0x00001000 /* ARM V6.			     */
+#define ARM_EXT_V6K	     0x00002000 /* ARM V6K.			     */
+#define ARM_EXT_V8	     0x00004000 /* ARMv8 w/o atomics.		     */
+#define ARM_EXT_V6T2	     0x00008000	/* Thumb-2.			     */
+#define ARM_EXT_DIV	     0x00010000	/* Integer division.		     */
 /* The 'M' in Arm V7M stands for Microcontroller.
    On earlier architecture variants it stands for Multiply.  */
-#define ARM_EXT_V5E_NOTM 0x00020000	/* Arm V5E but not Arm V7M. */
-#define ARM_EXT_V6_NOTM	 0x00040000	/* Arm V6 but not Arm V7M. */
-#define ARM_EXT_V7	 0x00080000	/* Arm V7.                 */
-#define ARM_EXT_V7A	 0x00100000	/* Arm V7A.                */
-#define ARM_EXT_V7R	 0x00200000	/* Arm V7R.                */
-#define ARM_EXT_V7M	 0x00400000	/* Arm V7M.                */
-#define ARM_EXT_V6M	 0x00800000	/* ARM V6M.		    */
-#define ARM_EXT_BARRIER	 0x01000000	/* DSB/DMB/ISB.		    */
-#define ARM_EXT_THUMB_MSR 0x02000000	/* Thumb MSR/MRS.	    */
-#define ARM_EXT_V6_DSP 0x04000000	/* ARM v6 (DSP-related),
-					   not in v7-M.  */
-#define ARM_EXT_MP       0x08000000     /* Multiprocessing Extensions.  */
-#define ARM_EXT_SEC	 0x10000000	/* Security extensions.  */
-#define ARM_EXT_OS	 0x20000000	/* OS Extensions.  */
-#define ARM_EXT_ADIV	 0x40000000	/* Integer divide extensions in ARM
-					   state.  */
-#define ARM_EXT_VIRT	 0x80000000	/* Virtualization extensions.  */
+#define ARM_EXT_V5E_NOTM     0x00020000	/* Arm V5E but not Arm V7M.	     */
+#define ARM_EXT_V6_NOTM	     0x00040000	/* Arm V6 but not Arm V7M.	     */
+#define ARM_EXT_V7	     0x00080000	/* Arm V7.			     */
+#define ARM_EXT_V7A	     0x00100000	/* Arm V7A.			     */
+#define ARM_EXT_V7R	     0x00200000	/* Arm V7R.			     */
+#define ARM_EXT_V7M	     0x00400000	/* Arm V7M.			     */
+#define ARM_EXT_V6M	     0x00800000	/* ARM V6M.			     */
+#define ARM_EXT_BARRIER	     0x01000000	/* DSB/DMB/ISB.			     */
+#define ARM_EXT_THUMB_MSR    0x02000000	/* Thumb MSR/MRS.		     */
+#define ARM_EXT_V6_DSP	     0x04000000	/* ARM v6 (DSP-related),
+					   not in v7-M.			     */
+#define ARM_EXT_MP	     0x08000000 /* Multiprocessing Extensions.	     */
+#define ARM_EXT_SEC	     0x10000000	/* Security extensions.		     */
+#define ARM_EXT_OS	     0x20000000	/* OS Extensions.		     */
+#define ARM_EXT_ADIV	     0x40000000	/* Integer divide extensions in ARM
+					   state.			     */
+#define ARM_EXT_VIRT	     0x80000000	/* Virtualization extensions.	     */
 
-#define ARM_EXT2_PAN	 0x00000001     /* PAN extension.  */
-#define ARM_EXT2_V8_2A	 0x00000002     /* ARM V8.2A.  */
-#define ARM_EXT2_V8M	 0x00000004	/* ARM V8M.  */
-#define ARM_EXT2_ATOMICS 0x00000008	/* ARMv8 atomics.  */
-#define ARM_EXT2_V6T2_V8M  0x00000010	/* V8M Baseline from V6T2.  */
-#define ARM_EXT2_FP16_INST 0x00000020	/* ARM V8.2A FP16 instructions.  */
-#define ARM_EXT2_V8M_MAIN  0x00000040	/* ARMv8-M Mainline.  */
-#define ARM_EXT2_RAS	 0x00000080	/* RAS extension.  */
-#define ARM_EXT2_V8_3A	 0x00000100	/* ARM V8.3A.  */
-#define ARM_EXT2_V8A	 0x00000200	/* ARMv8-A.  */
-#define ARM_EXT2_V8_4A	 0x00000400	/* ARM V8.4A.  */
-#define ARM_EXT2_FP16_FML 0x00000800	/* ARM V8.2A FP16-FML instructions.  */
-#define ARM_EXT2_V8_5A	 0x00001000	/* ARM V8.5A.  */
-#define ARM_EXT2_SB	 0x00002000	/* Speculation Barrier instruction.  */
-#define ARM_EXT2_PREDRES 0x00004000	/* Prediction Restriction insns.  */
+#define ARM_EXT2_PAN	     0x00000001 /* PAN extension.		     */
+#define ARM_EXT2_V8_2A	     0x00000002 /* ARM V8.2A.			     */
+#define ARM_EXT2_V8M	     0x00000004	/* ARM V8M.			     */
+#define ARM_EXT2_ATOMICS     0x00000008	/* ARMv8 atomics.		     */
+#define ARM_EXT2_V6T2_V8M    0x00000010	/* V8M Baseline from V6T2.	     */
+#define ARM_EXT2_FP16_INST   0x00000020	/* ARM V8.2A FP16 instructions.	     */
+#define ARM_EXT2_V8M_MAIN    0x00000040	/* ARMv8-M Mainline.		     */
+#define ARM_EXT2_RAS	     0x00000080	/* RAS extension.		     */
+#define ARM_EXT2_V8_3A	     0x00000100	/* ARM V8.3A.			     */
+#define ARM_EXT2_V8A	     0x00000200	/* ARMv8-A.			     */
+#define ARM_EXT2_V8_4A	     0x00000400	/* ARM V8.4A.			     */
+#define ARM_EXT2_FP16_FML    0x00000800	/* ARM V8.2A FP16-FML
+					   instructions.		     */
+#define ARM_EXT2_V8_5A	     0x00001000	/* ARM V8.5A.			     */
+#define ARM_EXT2_SB	     0x00002000	/* Speculation Barrier instruction.  */
+#define ARM_EXT2_PREDRES     0x00004000	/* Prediction Restriction insns.     */
 
 /* Co-processor space extensions.  */
-#define ARM_CEXT_XSCALE   0x00000001	/* Allow MIA etc.          */
-#define ARM_CEXT_MAVERICK 0x00000002	/* Use Cirrus/DSP coprocessor.  */
-#define ARM_CEXT_IWMMXT   0x00000004    /* Intel Wireless MMX technology coprocessor.  */
-#define ARM_CEXT_IWMMXT2  0x00000008    /* Intel Wireless MMX technology coprocessor version 2.  */
+#define ARM_CEXT_XSCALE	     0x00000001	/* Allow MIA etc.	 	   */
+#define ARM_CEXT_MAVERICK    0x00000002	/* Use Cirrus/DSP coprocessor.	   */
+#define ARM_CEXT_IWMMXT	     0x00000004 /* Intel Wireless MMX technology
+					   coprocessor.			   */
+#define ARM_CEXT_IWMMXT2     0x00000008 /* Intel Wireless MMX technology
+					   coprocessor version 2.	   */
 
-#define FPU_ENDIAN_PURE	 0x80000000	/* Pure-endian doubles.	      */
-#define FPU_ENDIAN_BIG	 0		/* Double words-big-endian.   */
-#define FPU_FPA_EXT_V1	 0x40000000	/* Base FPA instruction set.  */
-#define FPU_FPA_EXT_V2	 0x20000000	/* LFM/SFM.		      */
-#define FPU_MAVERICK	 0x10000000	/* Cirrus Maverick.	      */
-#define FPU_VFP_EXT_V1xD 0x08000000	/* Base VFP instruction set.  */
-#define FPU_VFP_EXT_V1	 0x04000000	/* Double-precision insns.    */
-#define FPU_VFP_EXT_V2	 0x02000000	/* ARM10E VFPr1.	      */
-#define FPU_VFP_EXT_V3xD 0x01000000	/* VFPv3 single-precision.    */
-#define FPU_VFP_EXT_V3	 0x00800000	/* VFPv3 double-precision.    */
-#define FPU_NEON_EXT_V1	 0x00400000	/* Neon (SIMD) insns.	      */
-#define FPU_VFP_EXT_D32  0x00200000	/* Registers D16-D31.	      */
-#define FPU_VFP_EXT_FP16 0x00100000	/* Half-precision extensions. */
-#define FPU_NEON_EXT_FMA 0x00080000	/* Neon fused multiply-add    */
-#define FPU_VFP_EXT_FMA	 0x00040000	/* VFP fused multiply-add     */
-#define FPU_VFP_EXT_ARMV8 0x00020000	/* Double-precision FP for ARMv8.  */
-#define FPU_NEON_EXT_ARMV8 0x00010000	/* Neon for ARMv8.  */
-#define FPU_CRYPTO_EXT_ARMV8 0x00008000	/* Crypto for ARMv8.  */
-#define CRC_EXT_ARMV8	 0x00004000	/* CRC32 for ARMv8.  */
-#define FPU_VFP_EXT_ARMV8xD 0x00002000	/* Single-precision FP for ARMv8.  */
-#define FPU_NEON_EXT_RDMA 0x00001000	/* v8.1 Adv.SIMD extensions.  */
-#define FPU_NEON_EXT_DOTPROD 0x00000800	/* Dot Product extension.  */
+#define FPU_ENDIAN_PURE	     0x80000000	/* Pure-endian doubles.		   */
+#define FPU_FPA_EXT_V1	     0x40000000	/* Base FPA instruction set.	   */
+#define FPU_FPA_EXT_V2	     0x20000000	/* LFM/SFM.			   */
+#define FPU_MAVERICK	     0x10000000	/* Cirrus Maverick.		   */
+#define FPU_VFP_EXT_V1xD     0x08000000	/* Base VFP instruction set.	   */
+#define FPU_VFP_EXT_V1	     0x04000000	/* Double-precision insns.	   */
+#define FPU_VFP_EXT_V2	     0x02000000	/* ARM10E VFPr1.		   */
+#define FPU_VFP_EXT_V3xD     0x01000000	/* VFPv3 single-precision.	   */
+#define FPU_VFP_EXT_V3	     0x00800000	/* VFPv3 double-precision.	   */
+#define FPU_NEON_EXT_V1	     0x00400000	/* Neon (SIMD) insns.		   */
+#define FPU_VFP_EXT_D32	     0x00200000	/* Registers D16-D31.		   */
+#define FPU_VFP_EXT_FP16     0x00100000	/* Half-precision extensions.	   */
+#define FPU_NEON_EXT_FMA     0x00080000	/* Neon fused multiply-add.	   */
+#define FPU_VFP_EXT_FMA	     0x00040000	/* VFP fused multiply-add.	   */
+#define FPU_VFP_EXT_ARMV8    0x00020000	/* Double-precision FP for ARMv8.  */
+#define FPU_NEON_EXT_ARMV8   0x00010000	/* Neon for ARMv8.		   */
+#define FPU_CRYPTO_EXT_ARMV8 0x00008000	/* Crypto for ARMv8.		   */
+#define CRC_EXT_ARMV8	     0x00004000	/* CRC32 for ARMv8.		   */
+#define FPU_VFP_EXT_ARMV8xD  0x00002000	/* Single-precision FP for ARMv8.  */
+#define FPU_NEON_EXT_RDMA    0x00001000	/* v8.1 Adv.SIMD extensions.	   */
+#define FPU_NEON_EXT_DOTPROD 0x00000800	/* Dot Product extension.	   */
 
 /* Architectures are the sum of the base and extensions.  The ARM ARM (rev E)
    defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
    ARMv5xM, ARMv5, ARMv5TxM, ARMv5T, ARMv5TExP, ARMv5TE.  To these we add
    three more to cover cores prior to ARM6.  Finally, there are cores which
    implement further extensions in the co-processor space.  */
-#define ARM_AEXT_V1			  ARM_EXT_V1
-#define ARM_AEXT_V2	(ARM_AEXT_V1	| ARM_EXT_V2)
-#define ARM_AEXT_V2S	(ARM_AEXT_V2	| ARM_EXT_V2S)
-#define ARM_AEXT_V3	(ARM_AEXT_V2S	| ARM_EXT_V3)
-#define ARM_AEXT_V3M	(ARM_AEXT_V3	| ARM_EXT_V3M)
-#define ARM_AEXT_V4xM	(ARM_AEXT_V3	| ARM_EXT_V4)
-#define ARM_AEXT_V4	(ARM_AEXT_V3M	| ARM_EXT_V4)
-#define ARM_AEXT_V4TxM	(ARM_AEXT_V4xM	| ARM_EXT_V4T | ARM_EXT_OS)
-#define ARM_AEXT_V4T	(ARM_AEXT_V4	| ARM_EXT_V4T | ARM_EXT_OS)
-#define ARM_AEXT_V5xM	(ARM_AEXT_V4xM	| ARM_EXT_V5)
-#define ARM_AEXT_V5	(ARM_AEXT_V4	| ARM_EXT_V5)
-#define ARM_AEXT_V5TxM	(ARM_AEXT_V5xM	| ARM_EXT_V4T | ARM_EXT_V5T \
-			 | ARM_EXT_OS)
-#define ARM_AEXT_V5T	(ARM_AEXT_V5	| ARM_EXT_V4T | ARM_EXT_V5T \
-			 | ARM_EXT_OS)
-#define ARM_AEXT_V5TExP	(ARM_AEXT_V5T	| ARM_EXT_V5ExP)
-#define ARM_AEXT_V5TE	(ARM_AEXT_V5TExP | ARM_EXT_V5E)
-#define ARM_AEXT_V5TEJ	(ARM_AEXT_V5TE	| ARM_EXT_V5J)
-#define ARM_AEXT_V6     (ARM_AEXT_V5TEJ | ARM_EXT_V6)
-#define ARM_AEXT_V6K    (ARM_AEXT_V6    | ARM_EXT_V6K)
-#define ARM_AEXT_V6Z    (ARM_AEXT_V6K	| ARM_EXT_SEC)
-#define ARM_AEXT_V6KZ   (ARM_AEXT_V6K	| ARM_EXT_SEC)
-#define ARM_AEXT_V6T2   (ARM_AEXT_V6 \
-    | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM | ARM_EXT_THUMB_MSR \
-    | ARM_EXT_V6_DSP )
-#define ARM_AEXT_V6KT2  (ARM_AEXT_V6T2 | ARM_EXT_V6K)
-#define ARM_AEXT_V6ZT2  (ARM_AEXT_V6T2 | ARM_EXT_SEC)
-#define ARM_AEXT_V6KZT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_SEC)
-#define ARM_AEXT_V7_ARM	(ARM_AEXT_V6KT2 | ARM_EXT_V7 | ARM_EXT_BARRIER)
-#define ARM_AEXT_V7A	(ARM_AEXT_V7_ARM | ARM_EXT_V7A)
-#define ARM_AEXT_V7VE	(ARM_AEXT_V7A  | ARM_EXT_DIV | ARM_EXT_ADIV \
-    | ARM_EXT_VIRT | ARM_EXT_SEC | ARM_EXT_MP)
-#define ARM_AEXT_V7R	(ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
-#define ARM_AEXT_NOTM \
-  (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM \
-   | ARM_EXT_V6_DSP )
-#define ARM_AEXT_V6M_ONLY \
-  ((ARM_EXT_BARRIER | ARM_EXT_V6M | ARM_EXT_THUMB_MSR) & ~(ARM_AEXT_NOTM))
-#define ARM_AEXT_V6M \
-  ((ARM_AEXT_V6K | ARM_AEXT_V6M_ONLY) & ~(ARM_AEXT_NOTM | ARM_EXT_OS))
-#define ARM_AEXT_V6SM (ARM_AEXT_V6M | ARM_EXT_OS)
-#define ARM_AEXT_V7M \
-  ((ARM_AEXT_V7_ARM | ARM_EXT_V6M | ARM_EXT_V7M | ARM_EXT_DIV) \
-   & ~(ARM_AEXT_NOTM))
-#define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
-#define ARM_AEXT_V7EM \
-  (ARM_AEXT_V7M | ARM_EXT_V5ExP | ARM_EXT_V6_DSP)
-#define ARM_AEXT_V8A \
-  (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC | ARM_EXT_DIV | ARM_EXT_ADIV \
-   | ARM_EXT_VIRT | ARM_EXT_V8)
+#define ARM_AEXT_V1			     ARM_EXT_V1
+#define ARM_AEXT_V2	(ARM_AEXT_V1	   | ARM_EXT_V2)
+#define ARM_AEXT_V2S	(ARM_AEXT_V2	   | ARM_EXT_V2S)
+#define ARM_AEXT_V3	(ARM_AEXT_V2S	   | ARM_EXT_V3)
+#define ARM_AEXT_V3M	(ARM_AEXT_V3	   | ARM_EXT_V3M)
+#define ARM_AEXT_V4xM	(ARM_AEXT_V3	   | ARM_EXT_V4)
+#define ARM_AEXT_V4	(ARM_AEXT_V3M	   | ARM_EXT_V4)
+#define ARM_AEXT_V4TxM	(ARM_AEXT_V4xM	   | ARM_EXT_V4T    | ARM_EXT_OS)
+#define ARM_AEXT_V4T	(ARM_AEXT_V4	   | ARM_EXT_V4T    | ARM_EXT_OS)
+#define ARM_AEXT_V5xM	(ARM_AEXT_V4xM	   | ARM_EXT_V5)
+#define ARM_AEXT_V5	(ARM_AEXT_V4	   | ARM_EXT_V5)
+#define ARM_AEXT_V5TxM	(ARM_AEXT_V5xM	   | ARM_EXT_V4T    | ARM_EXT_V5T     \
+					   | ARM_EXT_OS)
+#define ARM_AEXT_V5T	(ARM_AEXT_V5	   | ARM_EXT_V4T    | ARM_EXT_V5T     \
+					   | ARM_EXT_OS)
+#define ARM_AEXT_V5TExP	(ARM_AEXT_V5T	   | ARM_EXT_V5ExP)
+#define ARM_AEXT_V5TE	(ARM_AEXT_V5TExP   | ARM_EXT_V5E)
+#define ARM_AEXT_V5TEJ	(ARM_AEXT_V5TE	   | ARM_EXT_V5J)
+#define ARM_AEXT_V6	(ARM_AEXT_V5TEJ	   | ARM_EXT_V6)
+#define ARM_AEXT_V6K	(ARM_AEXT_V6	   | ARM_EXT_V6K)
+#define ARM_AEXT_V6Z	(ARM_AEXT_V6K	   | ARM_EXT_SEC)
+#define ARM_AEXT_V6KZ	(ARM_AEXT_V6K	   | ARM_EXT_SEC)
+#define ARM_AEXT_V6T2	(ARM_AEXT_V6	   | ARM_EXT_V6T2   | ARM_EXT_V6_NOTM \
+					   | ARM_EXT_THUMB_MSR \
+					   | ARM_EXT_V6_DSP )
+#define ARM_AEXT_V6KT2	(ARM_AEXT_V6T2	   | ARM_EXT_V6K)
+#define ARM_AEXT_V6ZT2	(ARM_AEXT_V6T2	   | ARM_EXT_SEC)
+#define ARM_AEXT_V6KZT2	(ARM_AEXT_V6T2	   | ARM_EXT_V6K    | ARM_EXT_SEC)
+#define ARM_AEXT_V7_ARM	(ARM_AEXT_V6KT2	   | ARM_EXT_V7     | ARM_EXT_BARRIER)
+#define ARM_AEXT_V7A	(ARM_AEXT_V7_ARM   | ARM_EXT_V7A)
+#define ARM_AEXT_V7VE	(ARM_AEXT_V7A	   | ARM_EXT_DIV    | ARM_EXT_ADIV    \
+					   | ARM_EXT_VIRT   | ARM_EXT_SEC     \
+					   | ARM_EXT_MP)
+#define ARM_AEXT_V7R	(ARM_AEXT_V7_ARM   | ARM_EXT_V7R    | ARM_EXT_DIV)
+#define ARM_AEXT_NOTM	(ARM_AEXT_V4	   | ARM_EXT_V5ExP  | ARM_EXT_V5J     \
+					   | ARM_EXT_V6_DSP		      \
+					   | ARM_EXT_V6_NOTM)
+#define ARM_AEXT_V6M   ((ARM_AEXT_V6K	   | ARM_EXT_V6M    | ARM_EXT_BARRIER \
+					   | ARM_EXT_THUMB_MSR)		      \
+			& ~(ARM_AEXT_NOTM | ARM_EXT_OS))
+#define ARM_AEXT_V6SM	(ARM_AEXT_V6M	   | ARM_EXT_OS)
+#define ARM_AEXT_V7M   ((ARM_AEXT_V7_ARM   | ARM_EXT_V6M    | ARM_EXT_V7M     \
+					   | ARM_EXT_DIV)		      \
+			& ~ARM_AEXT_NOTM)
+#define ARM_AEXT_V7	(ARM_AEXT_V7A	   & ARM_AEXT_V7R   & ARM_AEXT_V7M)
+#define ARM_AEXT_V7EM	(ARM_AEXT_V7M	   | ARM_EXT_V5ExP  | ARM_EXT_V6_DSP)
+#define ARM_AEXT_V8A	(ARM_AEXT_V7A	   | ARM_EXT_MP	    | ARM_EXT_SEC     \
+					   | ARM_EXT_DIV    | ARM_EXT_ADIV    \
+					   | ARM_EXT_VIRT   | ARM_EXT_V8)
 #define ARM_AEXT2_V8AR	(ARM_EXT2_V6T2_V8M | ARM_EXT2_ATOMICS)
-#define ARM_AEXT2_V8A	(ARM_AEXT2_V8AR | ARM_EXT2_V8A)
-#define ARM_AEXT2_V8_1A	(ARM_AEXT2_V8A | ARM_EXT2_PAN)
-#define ARM_AEXT2_V8_2A	(ARM_AEXT2_V8_1A | ARM_EXT2_V8_2A | ARM_EXT2_RAS)
-#define ARM_AEXT2_V8_3A	(ARM_AEXT2_V8_2A | ARM_EXT2_V8_3A)
-#define ARM_AEXT2_V8_4A	(ARM_AEXT2_V8_3A | ARM_EXT2_FP16_FML | ARM_EXT2_V8_4A)
-#define ARM_AEXT2_V8_5A	(ARM_AEXT2_V8_4A | ARM_EXT2_V8_5A | ARM_EXT2_SB	\
-			 | ARM_EXT2_PREDRES)
-#define ARM_AEXT_V8M_BASE (ARM_AEXT_V6SM | ARM_EXT_DIV)
-#define ARM_AEXT_V8M_MAIN ARM_AEXT_V7M
-#define ARM_AEXT_V8M_MAIN_DSP ARM_AEXT_V7EM
-#define ARM_AEXT2_V8M	(ARM_EXT2_V8M | ARM_EXT2_ATOMICS | ARM_EXT2_V6T2_V8M)
-#define ARM_AEXT2_V8M_MAIN (ARM_AEXT2_V8M | ARM_EXT2_V8M_MAIN)
-#define ARM_AEXT2_V8M_MAIN_DSP ARM_AEXT2_V8M_MAIN
-#define ARM_AEXT_V8R	ARM_AEXT_V8A
-#define ARM_AEXT2_V8R	ARM_AEXT2_V8AR
+#define ARM_AEXT2_V8A	(ARM_AEXT2_V8AR	   | ARM_EXT2_V8A)
+#define ARM_AEXT2_V8_1A	(ARM_AEXT2_V8A	   | ARM_EXT2_PAN)
+#define ARM_AEXT2_V8_2A	(ARM_AEXT2_V8_1A   | ARM_EXT2_V8_2A | ARM_EXT2_RAS)
+#define ARM_AEXT2_V8_3A	(ARM_AEXT2_V8_2A   | ARM_EXT2_V8_3A)
+#define ARM_AEXT2_V8_4A	(ARM_AEXT2_V8_3A   | ARM_EXT2_FP16_FML		      \
+					   | ARM_EXT2_V8_4A)
+#define ARM_AEXT2_V8_5A	(ARM_AEXT2_V8_4A   | ARM_EXT2_V8_5A | ARM_EXT2_SB     \
+					   | ARM_EXT2_PREDRES)
+#define ARM_AEXT_V8M_BASE	(ARM_AEXT_V6SM	    | ARM_EXT_DIV)
+#define ARM_AEXT_V8M_MAIN	 ARM_AEXT_V7M
+#define ARM_AEXT_V8M_MAIN_DSP	 ARM_AEXT_V7EM
+#define ARM_AEXT2_V8M_BASE	(ARM_EXT2_V8M	    | ARM_EXT2_ATOMICS	      \
+						    | ARM_EXT2_V6T2_V8M)
+#define ARM_AEXT2_V8M_MAIN	(ARM_AEXT2_V8M_BASE | ARM_EXT2_V8M_MAIN)
+#define ARM_AEXT2_V8M_MAIN_DSP	 ARM_AEXT2_V8M_MAIN
+#define ARM_AEXT_V8R		 ARM_AEXT_V8A
+#define ARM_AEXT2_V8R		 ARM_AEXT2_V8AR
 
 /* Processors with specific extensions in the co-processor space.  */
 #define ARM_ARCH_XSCALE	ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
@@ -181,132 +184,158 @@ 
  ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT \
 		  | ARM_CEXT_IWMMXT2)
 
-#define FPU_VFP_V1xD	(FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE)
-#define FPU_VFP_V1	(FPU_VFP_V1xD | FPU_VFP_EXT_V1)
-#define FPU_VFP_V2	(FPU_VFP_V1 | FPU_VFP_EXT_V2)
-#define FPU_VFP_V3D16	(FPU_VFP_V2 | FPU_VFP_EXT_V3xD | FPU_VFP_EXT_V3)
-#define FPU_VFP_V3	(FPU_VFP_V3D16 | FPU_VFP_EXT_D32)
-#define FPU_VFP_V3xD	(FPU_VFP_V1xD | FPU_VFP_EXT_V2 | FPU_VFP_EXT_V3xD)
-#define FPU_VFP_V4D16	(FPU_VFP_V3D16 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
-#define FPU_VFP_V4	(FPU_VFP_V3 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
-#define FPU_VFP_V4_SP_D16 (FPU_VFP_V3xD | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
-#define FPU_VFP_V5D16	(FPU_VFP_V4D16 | FPU_VFP_EXT_ARMV8xD | FPU_VFP_EXT_ARMV8)
+#define FPU_VFP_V1xD	  (FPU_VFP_EXT_V1xD  | FPU_ENDIAN_PURE)
+#define FPU_VFP_V1	  (FPU_VFP_V1xD	     | FPU_VFP_EXT_V1)
+#define FPU_VFP_V2	  (FPU_VFP_V1	     | FPU_VFP_EXT_V2)
+#define FPU_VFP_V3D16	  (FPU_VFP_V2	     | FPU_VFP_EXT_V3xD	   \
+					     | FPU_VFP_EXT_V3)
+#define FPU_VFP_V3	  (FPU_VFP_V3D16     | FPU_VFP_EXT_D32)
+#define FPU_VFP_V3xD	  (FPU_VFP_V1xD	     | FPU_VFP_EXT_V2	   \
+					     | FPU_VFP_EXT_V3xD)
+#define FPU_VFP_V4D16	  (FPU_VFP_V3D16     | FPU_VFP_EXT_FP16	   \
+					     | FPU_VFP_EXT_FMA)
+#define FPU_VFP_V4	  (FPU_VFP_V3	     | FPU_VFP_EXT_FP16	   \
+					     | FPU_VFP_EXT_FMA)
+#define FPU_VFP_V4_SP_D16 (FPU_VFP_V3xD	     | FPU_VFP_EXT_FP16	   \
+					     | FPU_VFP_EXT_FMA)
+#define FPU_VFP_V5D16	  (FPU_VFP_V4D16     | FPU_VFP_EXT_ARMV8xD \
+					     | FPU_VFP_EXT_ARMV8)
 #define FPU_VFP_V5_SP_D16 (FPU_VFP_V4_SP_D16 | FPU_VFP_EXT_ARMV8xD)
-#define FPU_VFP_ARMV8	(FPU_VFP_V4 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)
-#define FPU_NEON_ARMV8	(FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA | FPU_NEON_EXT_ARMV8)
-#define FPU_CRYPTO_ARMV8 (FPU_CRYPTO_EXT_ARMV8)
-#define FPU_VFP_HARD	(FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2 \
-			 | FPU_VFP_EXT_V3xD | FPU_VFP_EXT_FMA | FPU_NEON_EXT_FMA \
-                         | FPU_VFP_EXT_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_D32)
-#define FPU_FPA		(FPU_FPA_EXT_V1 | FPU_FPA_EXT_V2)
+#define FPU_VFP_ARMV8	  (FPU_VFP_V4	     | FPU_VFP_EXT_ARMV8   \
+					     | FPU_VFP_EXT_ARMV8xD)
+#define FPU_NEON_ARMV8	  (FPU_NEON_EXT_V1   | FPU_NEON_EXT_FMA	   \
+					     | FPU_NEON_EXT_ARMV8)
+#define FPU_CRYPTO_ARMV8  (FPU_CRYPTO_EXT_ARMV8)
+#define FPU_VFP_HARD	  (FPU_VFP_EXT_V1xD  | FPU_VFP_EXT_V1	   \
+					     | FPU_VFP_EXT_V2	   \
+					     | FPU_VFP_EXT_V3xD	   \
+					     | FPU_VFP_EXT_FMA	   \
+					     | FPU_NEON_EXT_FMA	   \
+					     | FPU_VFP_EXT_V3	   \
+					     | FPU_NEON_EXT_V1	   \
+					     | FPU_VFP_EXT_D32)
+#define FPU_FPA		  (FPU_FPA_EXT_V1    | FPU_FPA_EXT_V2)
 
 /* Deprecated.  */
-#define FPU_ARCH_VFP	ARM_FEATURE_COPROC (FPU_ENDIAN_PURE)
+#define FPU_ARCH_VFP		ARM_FEATURE_COPROC (FPU_ENDIAN_PURE)
 
-#define FPU_ARCH_FPE	ARM_FEATURE_COPROC (FPU_FPA_EXT_V1)
-#define FPU_ARCH_FPA	ARM_FEATURE_COPROC (FPU_FPA)
+#define FPU_ARCH_FPE		ARM_FEATURE_COPROC (FPU_FPA_EXT_V1)
+#define FPU_ARCH_FPA		ARM_FEATURE_COPROC (FPU_FPA)
 
-#define FPU_ARCH_VFP_V1xD ARM_FEATURE_COPROC (FPU_VFP_V1xD)
-#define FPU_ARCH_VFP_V1	  ARM_FEATURE_COPROC (FPU_VFP_V1)
-#define FPU_ARCH_VFP_V2	  ARM_FEATURE_COPROC (FPU_VFP_V2)
+#define FPU_ARCH_VFP_V1xD	ARM_FEATURE_COPROC (FPU_VFP_V1xD)
+#define FPU_ARCH_VFP_V1		ARM_FEATURE_COPROC (FPU_VFP_V1)
+#define FPU_ARCH_VFP_V2		ARM_FEATURE_COPROC (FPU_VFP_V2)
 #define FPU_ARCH_VFP_V3D16	ARM_FEATURE_COPROC (FPU_VFP_V3D16)
-#define FPU_ARCH_VFP_V3D16_FP16 \
-  ARM_FEATURE_COPROC (FPU_VFP_V3D16 | FPU_VFP_EXT_FP16)
-#define FPU_ARCH_VFP_V3	  ARM_FEATURE_COPROC (FPU_VFP_V3)
-#define FPU_ARCH_VFP_V3_FP16	ARM_FEATURE_COPROC (FPU_VFP_V3 | FPU_VFP_EXT_FP16)
+#define FPU_ARCH_VFP_V3D16_FP16 ARM_FEATURE_COPROC (FPU_VFP_V3D16	 \
+						    | FPU_VFP_EXT_FP16)
+#define FPU_ARCH_VFP_V3		ARM_FEATURE_COPROC (FPU_VFP_V3)
+#define FPU_ARCH_VFP_V3_FP16	ARM_FEATURE_COPROC (FPU_VFP_V3		 \
+						    | FPU_VFP_EXT_FP16)
 #define FPU_ARCH_VFP_V3xD	ARM_FEATURE_COPROC (FPU_VFP_V3xD)
-#define FPU_ARCH_VFP_V3xD_FP16	ARM_FEATURE_COPROC (FPU_VFP_V3xD \
-						 | FPU_VFP_EXT_FP16)
-#define FPU_ARCH_NEON_V1  ARM_FEATURE_COPROC (FPU_NEON_EXT_V1)
-#define FPU_ARCH_VFP_V3_PLUS_NEON_V1 \
-  ARM_FEATURE_COPROC (FPU_VFP_V3 | FPU_NEON_EXT_V1)
-#define FPU_ARCH_NEON_FP16 \
-  ARM_FEATURE_COPROC (FPU_VFP_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_FP16)
-#define FPU_ARCH_VFP_HARD ARM_FEATURE_COPROC (FPU_VFP_HARD)
-#define FPU_ARCH_VFP_V4 ARM_FEATURE_COPROC (FPU_VFP_V4)
-#define FPU_ARCH_VFP_V4D16 ARM_FEATURE_COPROC (FPU_VFP_V4D16)
-#define FPU_ARCH_VFP_V4_SP_D16 ARM_FEATURE_COPROC (FPU_VFP_V4_SP_D16)
-#define FPU_ARCH_VFP_V5D16 ARM_FEATURE_COPROC (FPU_VFP_V5D16)
-#define FPU_ARCH_VFP_V5_SP_D16 ARM_FEATURE_COPROC (FPU_VFP_V5_SP_D16)
-#define FPU_ARCH_NEON_VFP_V4 \
-  ARM_FEATURE_COPROC (FPU_VFP_V4 | FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA)
-#define FPU_ARCH_VFP_ARMV8 ARM_FEATURE_COPROC (FPU_VFP_ARMV8)
-#define FPU_ARCH_NEON_VFP_ARMV8 ARM_FEATURE_COPROC (FPU_NEON_ARMV8 \
-						 | FPU_VFP_ARMV8)
-#define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8 \
-  ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 | FPU_NEON_ARMV8 | FPU_VFP_ARMV8)
-#define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD \
-  ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 | FPU_NEON_ARMV8 | FPU_VFP_ARMV8 \
-		      | FPU_NEON_EXT_DOTPROD)
-#define ARCH_CRC_ARMV8 ARM_FEATURE_COPROC (CRC_EXT_ARMV8)
-#define FPU_ARCH_NEON_VFP_ARMV8_1 \
-  ARM_FEATURE_COPROC (FPU_NEON_ARMV8				 \
-		      | FPU_VFP_ARMV8				 \
-		      | FPU_NEON_EXT_RDMA)
-#define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1 \
-  ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 | FPU_NEON_ARMV8 | FPU_VFP_ARMV8 \
-		      | FPU_NEON_EXT_RDMA)
-#define FPU_ARCH_DOTPROD_NEON_VFP_ARMV8 \
-  ARM_FEATURE_COPROC (FPU_NEON_EXT_DOTPROD | FPU_NEON_ARMV8 | FPU_VFP_ARMV8)
+#define FPU_ARCH_VFP_V3xD_FP16	ARM_FEATURE_COPROC (FPU_VFP_V3xD	 \
+						    | FPU_VFP_EXT_FP16)
+#define FPU_ARCH_NEON_V1	ARM_FEATURE_COPROC (FPU_NEON_EXT_V1)
+#define FPU_ARCH_VFP_V3_PLUS_NEON_V1					 \
+				ARM_FEATURE_COPROC (FPU_VFP_V3		 \
+						    | FPU_NEON_EXT_V1)
+#define FPU_ARCH_NEON_FP16	ARM_FEATURE_COPROC (FPU_VFP_V3		 \
+						    | FPU_NEON_EXT_V1	 \
+						    | FPU_VFP_EXT_FP16)
+#define FPU_ARCH_VFP_HARD	ARM_FEATURE_COPROC (FPU_VFP_HARD)
+#define FPU_ARCH_VFP_V4		ARM_FEATURE_COPROC (FPU_VFP_V4)
+#define FPU_ARCH_VFP_V4D16	ARM_FEATURE_COPROC (FPU_VFP_V4D16)
+#define FPU_ARCH_VFP_V4_SP_D16	ARM_FEATURE_COPROC (FPU_VFP_V4_SP_D16)
+#define FPU_ARCH_VFP_V5D16	ARM_FEATURE_COPROC (FPU_VFP_V5D16)
+#define FPU_ARCH_VFP_V5_SP_D16	ARM_FEATURE_COPROC (FPU_VFP_V5_SP_D16)
+#define FPU_ARCH_NEON_VFP_V4	ARM_FEATURE_COPROC (FPU_VFP_V4		 \
+						    | FPU_NEON_EXT_V1	 \
+						    | FPU_NEON_EXT_FMA)
+#define FPU_ARCH_VFP_ARMV8	ARM_FEATURE_COPROC (FPU_VFP_ARMV8)
+#define FPU_ARCH_NEON_VFP_ARMV8	ARM_FEATURE_COPROC (FPU_NEON_ARMV8	 \
+						    | FPU_VFP_ARMV8)
+#define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8					 \
+				ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8	 \
+						    | FPU_NEON_ARMV8	 \
+						    | FPU_VFP_ARMV8)
+#define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD				 \
+				ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8	 \
+						    | FPU_NEON_ARMV8	 \
+						    | FPU_VFP_ARMV8	 \
+						    | FPU_NEON_EXT_DOTPROD)
+#define ARCH_CRC_ARMV8		ARM_FEATURE_COPROC (CRC_EXT_ARMV8)
+#define FPU_ARCH_NEON_VFP_ARMV8_1					 \
+				ARM_FEATURE_COPROC (FPU_NEON_ARMV8	 \
+						    | FPU_VFP_ARMV8	 \
+						    | FPU_NEON_EXT_RDMA)
+#define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1				 \
+				ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8	 \
+						    | FPU_NEON_ARMV8	 \
+						    | FPU_VFP_ARMV8	 \
+						    | FPU_NEON_EXT_RDMA)
+#define FPU_ARCH_DOTPROD_NEON_VFP_ARMV8					 \
+				ARM_FEATURE_COPROC (FPU_NEON_EXT_DOTPROD \
+						    | FPU_NEON_ARMV8	 \
+						    | FPU_VFP_ARMV8)
 
 
 #define FPU_ARCH_ENDIAN_PURE ARM_FEATURE_COPROC (FPU_ENDIAN_PURE)
 
 #define FPU_ARCH_MAVERICK ARM_FEATURE_COPROC (FPU_MAVERICK)
 
-#define ARM_ARCH_V1	ARM_FEATURE_CORE_LOW (ARM_AEXT_V1)
-#define ARM_ARCH_V2	ARM_FEATURE_CORE_LOW (ARM_AEXT_V2)
-#define ARM_ARCH_V2S	ARM_FEATURE_CORE_LOW (ARM_AEXT_V2S)
-#define ARM_ARCH_V3	ARM_FEATURE_CORE_LOW (ARM_AEXT_V3)
-#define ARM_ARCH_V3M	ARM_FEATURE_CORE_LOW (ARM_AEXT_V3M)
-#define ARM_ARCH_V4xM	ARM_FEATURE_CORE_LOW (ARM_AEXT_V4xM)
-#define ARM_ARCH_V4	ARM_FEATURE_CORE_LOW (ARM_AEXT_V4)
-#define ARM_ARCH_V4TxM	ARM_FEATURE_CORE_LOW (ARM_AEXT_V4TxM)
-#define ARM_ARCH_V4T	ARM_FEATURE_CORE_LOW (ARM_AEXT_V4T)
-#define ARM_ARCH_V5xM	ARM_FEATURE_CORE_LOW (ARM_AEXT_V5xM)
-#define ARM_ARCH_V5	ARM_FEATURE_CORE_LOW (ARM_AEXT_V5)
-#define ARM_ARCH_V5TxM	ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TxM)
-#define ARM_ARCH_V5T	ARM_FEATURE_CORE_LOW (ARM_AEXT_V5T)
-#define ARM_ARCH_V5TExP	ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TExP)
-#define ARM_ARCH_V5TE	ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TE)
-#define ARM_ARCH_V5TEJ	ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TEJ)
-#define ARM_ARCH_V6	ARM_FEATURE_CORE_LOW (ARM_AEXT_V6)
-#define ARM_ARCH_V6K	ARM_FEATURE_CORE_LOW (ARM_AEXT_V6K)
-#define ARM_ARCH_V6Z	ARM_FEATURE_CORE_LOW (ARM_AEXT_V6Z)
-#define ARM_ARCH_V6KZ	ARM_FEATURE_CORE_LOW (ARM_AEXT_V6KZ)
-#define ARM_ARCH_V6T2	ARM_FEATURE_CORE (ARM_AEXT_V6T2, ARM_EXT2_V6T2_V8M)
-#define ARM_ARCH_V6KT2	ARM_FEATURE_CORE (ARM_AEXT_V6KT2, ARM_EXT2_V6T2_V8M)
-#define ARM_ARCH_V6ZT2	ARM_FEATURE_CORE (ARM_AEXT_V6ZT2, ARM_EXT2_V6T2_V8M)
-#define ARM_ARCH_V6KZT2	ARM_FEATURE_CORE (ARM_AEXT_V6KZT2, ARM_EXT2_V6T2_V8M)
-#define ARM_ARCH_V6M	ARM_FEATURE_CORE_LOW (ARM_AEXT_V6M)
-#define ARM_ARCH_V6SM	ARM_FEATURE_CORE_LOW (ARM_AEXT_V6SM)
-#define ARM_ARCH_V7	ARM_FEATURE_CORE (ARM_AEXT_V7, ARM_EXT2_V6T2_V8M)
-#define ARM_ARCH_V7A	ARM_FEATURE_CORE (ARM_AEXT_V7A, ARM_EXT2_V6T2_V8M)
-#define ARM_ARCH_V7VE	ARM_FEATURE_CORE (ARM_AEXT_V7VE, ARM_EXT2_V6T2_V8M)
-#define ARM_ARCH_V7R	ARM_FEATURE_CORE (ARM_AEXT_V7R, ARM_EXT2_V6T2_V8M)
-#define ARM_ARCH_V7M	ARM_FEATURE_CORE (ARM_AEXT_V7M, ARM_EXT2_V6T2_V8M)
-#define ARM_ARCH_V7EM	ARM_FEATURE_CORE (ARM_AEXT_V7EM, ARM_EXT2_V6T2_V8M)
-#define ARM_ARCH_V8A	ARM_FEATURE_CORE (ARM_AEXT_V8A, ARM_AEXT2_V8A)
-#define ARM_ARCH_V8A_CRC ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, \
+#define ARM_ARCH_V1	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V1)
+#define ARM_ARCH_V2	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V2)
+#define ARM_ARCH_V2S	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V2S)
+#define ARM_ARCH_V3	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V3)
+#define ARM_ARCH_V3M	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V3M)
+#define ARM_ARCH_V4xM	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V4xM)
+#define ARM_ARCH_V4	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V4)
+#define ARM_ARCH_V4TxM	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V4TxM)
+#define ARM_ARCH_V4T	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V4T)
+#define ARM_ARCH_V5xM	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V5xM)
+#define ARM_ARCH_V5	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V5)
+#define ARM_ARCH_V5TxM	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TxM)
+#define ARM_ARCH_V5T	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V5T)
+#define ARM_ARCH_V5TExP	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TExP)
+#define ARM_ARCH_V5TE	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TE)
+#define ARM_ARCH_V5TEJ	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TEJ)
+#define ARM_ARCH_V6	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6)
+#define ARM_ARCH_V6K	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6K)
+#define ARM_ARCH_V6Z	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6Z)
+#define ARM_ARCH_V6KZ	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6KZ)
+#define ARM_ARCH_V6T2	 ARM_FEATURE_CORE (ARM_AEXT_V6T2, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V6KT2	 ARM_FEATURE_CORE (ARM_AEXT_V6KT2, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V6ZT2	 ARM_FEATURE_CORE (ARM_AEXT_V6ZT2, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V6KZT2	 ARM_FEATURE_CORE (ARM_AEXT_V6KZT2, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V6M	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6M)
+#define ARM_ARCH_V6SM	 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6SM)
+#define ARM_ARCH_V7	 ARM_FEATURE_CORE (ARM_AEXT_V7, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V7A	 ARM_FEATURE_CORE (ARM_AEXT_V7A, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V7VE	 ARM_FEATURE_CORE (ARM_AEXT_V7VE, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V7R	 ARM_FEATURE_CORE (ARM_AEXT_V7R, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V7M	 ARM_FEATURE_CORE (ARM_AEXT_V7M, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V7EM	 ARM_FEATURE_CORE (ARM_AEXT_V7EM, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V8A	 ARM_FEATURE_CORE (ARM_AEXT_V8A, ARM_AEXT2_V8A)
+#define ARM_ARCH_V8A_CRC ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A,	   \
 				      CRC_EXT_ARMV8)
-#define ARM_ARCH_V8_1A	ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A,	\
-				     CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA)
-#define ARM_ARCH_V8_2A	ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_2A,	\
-				     CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA)
-#define ARM_ARCH_V8_3A	ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_3A,	\
-				     CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA)
-#define ARM_ARCH_V8_4A	ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_4A,	\
-				     CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA \
-				     | FPU_NEON_EXT_DOTPROD)
-#define ARM_ARCH_V8_5A	ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_5A,	\
-				     CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA \
-				     | FPU_NEON_EXT_DOTPROD)
-#define ARM_ARCH_V8M_BASE ARM_FEATURE_CORE (ARM_AEXT_V8M_BASE, ARM_AEXT2_V8M)
-#define ARM_ARCH_V8M_MAIN ARM_FEATURE_CORE (ARM_AEXT_V8M_MAIN, \
-					    ARM_AEXT2_V8M_MAIN)
-#define ARM_ARCH_V8M_MAIN_DSP ARM_FEATURE_CORE (ARM_AEXT_V8M_MAIN_DSP, \
-						ARM_AEXT2_V8M_MAIN_DSP)
-#define ARM_ARCH_V8R	ARM_FEATURE_CORE (ARM_AEXT_V8R, ARM_AEXT2_V8R)
+#define ARM_ARCH_V8_1A	 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A,	   \
+				      CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA)
+#define ARM_ARCH_V8_2A	 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_2A,	   \
+				      CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA)
+#define ARM_ARCH_V8_3A	 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_3A,	   \
+				      CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA)
+#define ARM_ARCH_V8_4A	 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_4A,	   \
+				      CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA	   \
+						    | FPU_NEON_EXT_DOTPROD)
+#define ARM_ARCH_V8_5A	 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_5A,	   \
+				      CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA	   \
+						    | FPU_NEON_EXT_DOTPROD)
+#define ARM_ARCH_V8M_BASE      ARM_FEATURE_CORE (ARM_AEXT_V8M_BASE,	   \
+						 ARM_AEXT2_V8M_BASE)
+#define ARM_ARCH_V8M_MAIN      ARM_FEATURE_CORE (ARM_AEXT_V8M_MAIN,	   \
+						 ARM_AEXT2_V8M_MAIN)
+#define ARM_ARCH_V8M_MAIN_DSP  ARM_FEATURE_CORE (ARM_AEXT_V8M_MAIN_DSP,	   \
+						 ARM_AEXT2_V8M_MAIN_DSP)
+#define ARM_ARCH_V8R	       ARM_FEATURE_CORE (ARM_AEXT_V8R, ARM_AEXT2_V8R)
 
 /* Some useful combinations:  */
 #define ARM_ARCH_NONE	ARM_FEATURE_LOW (0, 0)
@@ -329,8 +358,6 @@ 
 /* v7-r+idiv.  */
 #define ARM_ARCH_V7R_IDIV \
   ARM_FEATURE_CORE (ARM_AEXT_V7R | ARM_EXT_ADIV, ARM_EXT2_V6T2_V8M)
-/* Features that are present in v6M and v6S-M but not other v6 cores.  */
-#define ARM_ARCH_V6M_ONLY ARM_FEATURE_CORE_LOW (ARM_AEXT_V6M_ONLY)
 /* v8-a+fp.  */
 #define ARM_ARCH_V8A_FP	\
   ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, FPU_ARCH_VFP_ARMV8)