diff mbox series

[4/4] target/arm: Enable TBI for user-only

Message ID 20190110124951.15473-5-richard.henderson@linaro.org
State Superseded
Headers show
Series target/arm: Implement TBI for user-only | expand

Commit Message

Richard Henderson Jan. 10, 2019, 12:49 p.m. UTC
This has been enabled in the linux kernel since v3.11
(commit d50240a5f6cea, 2013-09-03,
"arm64: mm: permit use of tagged pointers at EL0").

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/cpu.c | 6 ++++++
 1 file changed, 6 insertions(+)

-- 
2.17.2

Comments

Peter Maydell Jan. 22, 2019, 3:59 p.m. UTC | #1
On Thu, 10 Jan 2019 at 12:50, Richard Henderson
<richard.henderson@linaro.org> wrote:
>

> This has been enabled in the linux kernel since v3.11

> (commit d50240a5f6cea, 2013-09-03,

> "arm64: mm: permit use of tagged pointers at EL0").

>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/arm/cpu.c | 6 ++++++

>  1 file changed, 6 insertions(+)

>

> diff --git a/target/arm/cpu.c b/target/arm/cpu.c

> index 14bc24a35a..5eff6995ee 100644

> --- a/target/arm/cpu.c

> +++ b/target/arm/cpu.c

> @@ -174,6 +174,12 @@ static void arm_cpu_reset(CPUState *s)

>          env->vfp.zcr_el[1] = cpu->sve_max_vq - 1;

>          env->vfp.zcr_el[2] = env->vfp.zcr_el[1];

>          env->vfp.zcr_el[3] = env->vfp.zcr_el[1];

> +        /*

> +         * Enable TBI0 and TBI1.  While the real kernel only enables TBI0,

> +         * turning on both here will produce smaller code and otherwise

> +         * make no difference to the user-level emulation.

> +         */

> +        env->cp15.tcr_el[1].raw_tcr = (3ULL << 37);

>  #else

>          /* Reset into the highest available EL */

>          if (arm_feature(env, ARM_FEATURE_EL3)) {

> --

> 2.17.2


Reviewed-by: Peter Maydell <peter.maydell@linaro.org>


thanks
-- PMM
diff mbox series

Patch

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 14bc24a35a..5eff6995ee 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -174,6 +174,12 @@  static void arm_cpu_reset(CPUState *s)
         env->vfp.zcr_el[1] = cpu->sve_max_vq - 1;
         env->vfp.zcr_el[2] = env->vfp.zcr_el[1];
         env->vfp.zcr_el[3] = env->vfp.zcr_el[1];
+        /*
+         * Enable TBI0 and TBI1.  While the real kernel only enables TBI0,
+         * turning on both here will produce smaller code and otherwise
+         * make no difference to the user-level emulation.
+         */
+        env->cp15.tcr_el[1].raw_tcr = (3ULL << 37);
 #else
         /* Reset into the highest available EL */
         if (arm_feature(env, ARM_FEATURE_EL3)) {