| Message ID | 1581680753-9067-1-git-send-email-vbadigan@codeaurora.org |
|---|---|
| State | New |
| Headers | show |
| Series | [V2] dt-bindings: mmc: sdhci-msm: Add CQE reg map | expand |
On Fri, Feb 14, 2020 at 05:15:52PM +0530, Veerabhadrarao Badiganti wrote: > CQE feature has been enabled on sdhci-msm. Add CQE reg map > that needs to be supplied for supporting CQE feature. > > Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> > --- > > Changes since V1: > - Updated description for more clarity & Fixed typos. > --- > Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > index 7ee639b..ad0ee83 100644 > --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > @@ -26,7 +26,13 @@ Required properties: > > - reg: Base address and length of the register in the following order: > - Host controller register map (required) > - - SD Core register map (required for msm-v4 and below) > + - SD Core register map (required for controllers earlier than msm-v5) > + - CQE register map (Optional, CQE support is present on SDHC instance meant > + for eMMC and version v4.2 and above) > +- reg-names: When CQE register map is supplied, below reg-names are required > + - "hc_mem" for Host controller register map > + - "core_mem" for SD core register map > + - "cqhci_mem" for CQE register map '_mem' is redundant, so drop. > - interrupts: Should contain an interrupt-specifiers for the interrupts: > - Host controller interrupt (required) > - pinctrl-names: Should contain only one value - "default". > -- > Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project >
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt index 7ee639b..ad0ee83 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt @@ -26,7 +26,13 @@ Required properties: - reg: Base address and length of the register in the following order: - Host controller register map (required) - - SD Core register map (required for msm-v4 and below) + - SD Core register map (required for controllers earlier than msm-v5) + - CQE register map (Optional, CQE support is present on SDHC instance meant + for eMMC and version v4.2 and above) +- reg-names: When CQE register map is supplied, below reg-names are required + - "hc_mem" for Host controller register map + - "core_mem" for SD core register map + - "cqhci_mem" for CQE register map - interrupts: Should contain an interrupt-specifiers for the interrupts: - Host controller interrupt (required) - pinctrl-names: Should contain only one value - "default".
CQE feature has been enabled on sdhci-msm. Add CQE reg map that needs to be supplied for supporting CQE feature. Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> --- Changes since V1: - Updated description for more clarity & Fixed typos. --- Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)