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[v2,0/3] Add QMP V3 USB3 PHY support for SC7180

Message ID 1578486581-7540-1-git-send-email-sanm@codeaurora.org
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Series Add QMP V3 USB3 PHY support for SC7180 | expand

Message

Sandeep Maheswaram Jan. 8, 2020, 12:29 p.m. UTC 
Add QMP V3 USB3 PHY entries for SC7180 in phy driver and
device tree bindings.

changes in v2:
*Remove global phy reset in QMP phy.
*Convert QMP phy bindings to yaml.

Sandeep Maheswaram (3):
  phy: qcom-qmp: Add QMP V3 USB3 PHY support for SC7180
  arm64: dts: qcom: sc7180: Remove global phy reset in QMP phy
  dt-bindings: phy: qcom,qmp: Convert QMP phy bindings to yaml

 .../devicetree/bindings/phy/qcom,qmp-phy.yaml      | 201 ++++++++++++++++++
 .../devicetree/bindings/phy/qcom-qmp-phy.txt       | 227 ---------------------
 arch/arm64/boot/dts/qcom/sc7180.dtsi               |   5 +-
 drivers/phy/qualcomm/phy-qcom-qmp.c                |  38 ++++
 4 files changed, 241 insertions(+), 230 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
 delete mode 100644 Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt

Comments

Stephen Boyd Jan. 10, 2020, 4:52 p.m. UTC | #1 
Quoting Sandeep Maheswaram (2020-01-08 04:29:40)
> Remove global phy reset and do only usb phy reset in QMP phy.

Yes that's what this patch does, but you left out the important part:
Why?

> 
> Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7180.dtsi | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index c00c3d4..448ab88 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -1072,9 +1072,8 @@
>                                  <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
>                         clock-names = "aux", "cfg_ahb", "ref", "com_aux";
>  
> -                       resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
> -                                <&gcc GCC_USB3_PHY_PRIM_BCR>;
> -                       reset-names = "phy", "common";
> +                       resets = <&gcc GCC_USB3_PHY_PRIM_BCR>;
> +                       reset-names = "phy";
>  

We shouldn't need to modify the DT node for this. The reset still goes
to this hardware block, so DT should reflect that. Instead, the driver
shouldn't drive this reset on this SoC.

>                         usb_1_ssphy: phy@88e9200 {
>                                 reg = <0 0x088e9200 0 0x128>,