diff mbox series

[v2,2/2] hw/virtio-pci Added AER capability.

Message ID 20201005090140.90461-3-andrew@daynix.com
State Accepted
Commit fdfa3b1d6f9edd97c807df496a0d8e9ea49240da
Headers show
Series hw/virtio-pci: AER capability | expand

Commit Message

Andrew Melnychenko Oct. 5, 2020, 9:01 a.m. UTC 
From: Andrew <andrew@daynix.com>

Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1857668
Added AER capability for virtio-pci devices.
Also added property for devices, by default AER is enabled.

Signed-off-by: Andrew Melnychenko <andrew@daynix.com>
---
 hw/virtio/virtio-pci.c | 16 ++++++++++++++++
 hw/virtio/virtio-pci.h |  4 ++++
 2 files changed, 20 insertions(+)

Comments

Michael S. Tsirkin Oct. 5, 2020, 10:08 a.m. UTC | #1 
On Mon, Oct 05, 2020 at 12:01:40PM +0300, andrew@daynix.com wrote:
> From: Andrew <andrew@daynix.com>

> 

> Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1857668

> Added AER capability for virtio-pci devices.

> Also added property for devices, by default AER is enabled.



Looking at code it's disabled by default, isn't it?

> 

> Signed-off-by: Andrew Melnychenko <andrew@daynix.com>

> ---

>  hw/virtio/virtio-pci.c | 16 ++++++++++++++++

>  hw/virtio/virtio-pci.h |  4 ++++

>  2 files changed, 20 insertions(+)

> 

> diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c

> index ae60c1e249..e0a7936f9c 100644

> --- a/hw/virtio/virtio-pci.c

> +++ b/hw/virtio/virtio-pci.c

> @@ -1807,6 +1807,12 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)

>           */

>          pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);

>  

> +        if (proxy->flags & VIRTIO_PCI_FLAG_AER) {

> +            pcie_aer_init(pci_dev, PCI_ERR_VER, last_pcie_cap_offset,

> +                          PCI_ERR_SIZEOF, NULL);

> +            last_pcie_cap_offset += PCI_ERR_SIZEOF;

> +        }

> +

>          if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) {

>              /* Init error enabling flags */

>              pcie_cap_deverr_init(pci_dev);

> @@ -1848,7 +1854,15 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)

>  

>  static void virtio_pci_exit(PCIDevice *pci_dev)

>  {

> +    VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);

> +    bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) &&

> +                     !pci_bus_is_root(pci_get_bus(pci_dev));

> +

>      msix_uninit_exclusive_bar(pci_dev);

> +    if (proxy->flags & VIRTIO_PCI_FLAG_AER && pcie_port &&

> +        pci_is_express(pci_dev)) {

> +        pcie_aer_exit(pci_dev);

> +    }

>  }

>  

>  static void virtio_pci_reset(DeviceState *qdev)

> @@ -1901,6 +1915,8 @@ static Property virtio_pci_properties[] = {

>                      VIRTIO_PCI_FLAG_INIT_PM_BIT, true),

>      DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags,

>                      VIRTIO_PCI_FLAG_INIT_FLR_BIT, true),

> +    DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags,

> +                    VIRTIO_PCI_FLAG_AER_BIT, false),

>      DEFINE_PROP_END_OF_LIST(),

>  };

>  

> diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h

> index 91096f0291..3986b4f0e3 100644

> --- a/hw/virtio/virtio-pci.h

> +++ b/hw/virtio/virtio-pci.h

> @@ -45,6 +45,7 @@ enum {

>      VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT,

>      VIRTIO_PCI_FLAG_INIT_PM_BIT,

>      VIRTIO_PCI_FLAG_INIT_FLR_BIT,

> +    VIRTIO_PCI_FLAG_AER_BIT,

>  };

>  

>  /* Need to activate work-arounds for buggy guests at vmstate load. */

> @@ -84,6 +85,9 @@ enum {

>  /* Init Function Level Reset capability */

>  #define VIRTIO_PCI_FLAG_INIT_FLR (1 << VIRTIO_PCI_FLAG_INIT_FLR_BIT)

>  

> +/* Advanced Error Reporting capability */

> +#define VIRTIO_PCI_FLAG_AER (1 << VIRTIO_PCI_FLAG_AER_BIT)

> +

>  typedef struct {

>      MSIMessage msg;

>      int virq;

> -- 

> 2.28.0
Andrew Melnychenko Oct. 5, 2020, 11:33 a.m. UTC | #2 
yes

>     DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags,

>                     VIRTIO_PCI_FLAG_AER_BIT, *false*),

>


On Mon, Oct 5, 2020 at 1:08 PM Michael S. Tsirkin <mst@redhat.com> wrote:

> On Mon, Oct 05, 2020 at 12:01:40PM +0300, andrew@daynix.com wrote:

> > From: Andrew <andrew@daynix.com>

> >

> > Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1857668

> > Added AER capability for virtio-pci devices.

> > Also added property for devices, by default AER is enabled.

>

>

> Looking at code it's disabled by default, isn't it?

>

> >

> > Signed-off-by: Andrew Melnychenko <andrew@daynix.com>

> > ---

> >  hw/virtio/virtio-pci.c | 16 ++++++++++++++++

> >  hw/virtio/virtio-pci.h |  4 ++++

> >  2 files changed, 20 insertions(+)

> >

> > diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c

> > index ae60c1e249..e0a7936f9c 100644

> > --- a/hw/virtio/virtio-pci.c

> > +++ b/hw/virtio/virtio-pci.c

> > @@ -1807,6 +1807,12 @@ static void virtio_pci_realize(PCIDevice

> *pci_dev, Error **errp)

> >           */

> >          pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);

> >

> > +        if (proxy->flags & VIRTIO_PCI_FLAG_AER) {

> > +            pcie_aer_init(pci_dev, PCI_ERR_VER, last_pcie_cap_offset,

> > +                          PCI_ERR_SIZEOF, NULL);

> > +            last_pcie_cap_offset += PCI_ERR_SIZEOF;

> > +        }

> > +

> >          if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) {

> >              /* Init error enabling flags */

> >              pcie_cap_deverr_init(pci_dev);

> > @@ -1848,7 +1854,15 @@ static void virtio_pci_realize(PCIDevice

> *pci_dev, Error **errp)

> >

> >  static void virtio_pci_exit(PCIDevice *pci_dev)

> >  {

> > +    VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);

> > +    bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) &&

> > +                     !pci_bus_is_root(pci_get_bus(pci_dev));

> > +

> >      msix_uninit_exclusive_bar(pci_dev);

> > +    if (proxy->flags & VIRTIO_PCI_FLAG_AER && pcie_port &&

> > +        pci_is_express(pci_dev)) {

> > +        pcie_aer_exit(pci_dev);

> > +    }

> >  }

> >

> >  static void virtio_pci_reset(DeviceState *qdev)

> > @@ -1901,6 +1915,8 @@ static Property virtio_pci_properties[] = {

> >                      VIRTIO_PCI_FLAG_INIT_PM_BIT, true),

> >      DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags,

> >                      VIRTIO_PCI_FLAG_INIT_FLR_BIT, true),

> > +    DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags,

> > +                    VIRTIO_PCI_FLAG_AER_BIT, false),

> >      DEFINE_PROP_END_OF_LIST(),

> >  };

> >

> > diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h

> > index 91096f0291..3986b4f0e3 100644

> > --- a/hw/virtio/virtio-pci.h

> > +++ b/hw/virtio/virtio-pci.h

> > @@ -45,6 +45,7 @@ enum {

> >      VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT,

> >      VIRTIO_PCI_FLAG_INIT_PM_BIT,

> >      VIRTIO_PCI_FLAG_INIT_FLR_BIT,

> > +    VIRTIO_PCI_FLAG_AER_BIT,

> >  };

> >

> >  /* Need to activate work-arounds for buggy guests at vmstate load. */

> > @@ -84,6 +85,9 @@ enum {

> >  /* Init Function Level Reset capability */

> >  #define VIRTIO_PCI_FLAG_INIT_FLR (1 << VIRTIO_PCI_FLAG_INIT_FLR_BIT)

> >

> > +/* Advanced Error Reporting capability */

> > +#define VIRTIO_PCI_FLAG_AER (1 << VIRTIO_PCI_FLAG_AER_BIT)

> > +

> >  typedef struct {

> >      MSIMessage msg;

> >      int virq;

> > --

> > 2.28.0

>

>
<div dir="ltr"><div>yes</div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div>    DEFINE_PROP_BIT(&quot;aer&quot;, VirtIOPCIProxy, flags,<br>                    VIRTIO_PCI_FLAG_AER_BIT, <b>false</b>),</div></blockquote></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, Oct 5, 2020 at 1:08 PM Michael S. Tsirkin &lt;<a href="mailto:mst@redhat.com">mst@redhat.com</a>&gt; wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On Mon, Oct 05, 2020 at 12:01:40PM +0300, <a href="mailto:andrew@daynix.com" target="_blank">andrew@daynix.com</a> wrote:<br>
&gt; From: Andrew &lt;<a href="mailto:andrew@daynix.com" target="_blank">andrew@daynix.com</a>&gt;<br>
&gt; <br>
&gt; Buglink: <a href="https://bugzilla.redhat.com/show_bug.cgi?id=1857668" rel="noreferrer" target="_blank">https://bugzilla.redhat.com/show_bug.cgi?id=1857668</a><br>
&gt; Added AER capability for virtio-pci devices.<br>
&gt; Also added property for devices, by default AER is enabled.<br>
<br>
<br>
Looking at code it&#39;s disabled by default, isn&#39;t it?<br>
<br>
&gt; <br>
&gt; Signed-off-by: Andrew Melnychenko &lt;<a href="mailto:andrew@daynix.com" target="_blank">andrew@daynix.com</a>&gt;<br>
&gt; ---<br>
&gt;  hw/virtio/virtio-pci.c | 16 ++++++++++++++++<br>
&gt;  hw/virtio/virtio-pci.h |  4 ++++<br>
&gt;  2 files changed, 20 insertions(+)<br>
&gt; <br>
&gt; diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c<br>
&gt; index ae60c1e249..e0a7936f9c 100644<br>
&gt; --- a/hw/virtio/virtio-pci.c<br>
&gt; +++ b/hw/virtio/virtio-pci.c<br>
&gt; @@ -1807,6 +1807,12 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)<br>
&gt;           */<br>
&gt;          pci_set_word(pci_dev-&gt;config + pos + PCI_PM_PMC, 0x3);<br>
&gt;  <br>
&gt; +        if (proxy-&gt;flags &amp; VIRTIO_PCI_FLAG_AER) {<br>
&gt; +            pcie_aer_init(pci_dev, PCI_ERR_VER, last_pcie_cap_offset,<br>
&gt; +                          PCI_ERR_SIZEOF, NULL);<br>
&gt; +            last_pcie_cap_offset += PCI_ERR_SIZEOF;<br>
&gt; +        }<br>
&gt; +<br>
&gt;          if (proxy-&gt;flags &amp; VIRTIO_PCI_FLAG_INIT_DEVERR) {<br>
&gt;              /* Init error enabling flags */<br>
&gt;              pcie_cap_deverr_init(pci_dev);<br>
&gt; @@ -1848,7 +1854,15 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)<br>
&gt;  <br>
&gt;  static void virtio_pci_exit(PCIDevice *pci_dev)<br>
&gt;  {<br>
&gt; +    VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);<br>
&gt; +    bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) &amp;&amp;<br>
&gt; +                     !pci_bus_is_root(pci_get_bus(pci_dev));<br>
&gt; +<br>
&gt;      msix_uninit_exclusive_bar(pci_dev);<br>
&gt; +    if (proxy-&gt;flags &amp; VIRTIO_PCI_FLAG_AER &amp;&amp; pcie_port &amp;&amp;<br>
&gt; +        pci_is_express(pci_dev)) {<br>
&gt; +        pcie_aer_exit(pci_dev);<br>
&gt; +    }<br>
&gt;  }<br>
&gt;  <br>
&gt;  static void virtio_pci_reset(DeviceState *qdev)<br>
&gt; @@ -1901,6 +1915,8 @@ static Property virtio_pci_properties[] = {<br>
&gt;                      VIRTIO_PCI_FLAG_INIT_PM_BIT, true),<br>
&gt;      DEFINE_PROP_BIT(&quot;x-pcie-flr-init&quot;, VirtIOPCIProxy, flags,<br>
&gt;                      VIRTIO_PCI_FLAG_INIT_FLR_BIT, true),<br>
&gt; +    DEFINE_PROP_BIT(&quot;aer&quot;, VirtIOPCIProxy, flags,<br>
&gt; +                    VIRTIO_PCI_FLAG_AER_BIT, false),<br>
&gt;      DEFINE_PROP_END_OF_LIST(),<br>
&gt;  };<br>
&gt;  <br>
&gt; diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h<br>
&gt; index 91096f0291..3986b4f0e3 100644<br>
&gt; --- a/hw/virtio/virtio-pci.h<br>
&gt; +++ b/hw/virtio/virtio-pci.h<br>
&gt; @@ -45,6 +45,7 @@ enum {<br>
&gt;      VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT,<br>
&gt;      VIRTIO_PCI_FLAG_INIT_PM_BIT,<br>
&gt;      VIRTIO_PCI_FLAG_INIT_FLR_BIT,<br>
&gt; +    VIRTIO_PCI_FLAG_AER_BIT,<br>
&gt;  };<br>
&gt;  <br>
&gt;  /* Need to activate work-arounds for buggy guests at vmstate load. */<br>
&gt; @@ -84,6 +85,9 @@ enum {<br>
&gt;  /* Init Function Level Reset capability */<br>
&gt;  #define VIRTIO_PCI_FLAG_INIT_FLR (1 &lt;&lt; VIRTIO_PCI_FLAG_INIT_FLR_BIT)<br>
&gt;  <br>
&gt; +/* Advanced Error Reporting capability */<br>
&gt; +#define VIRTIO_PCI_FLAG_AER (1 &lt;&lt; VIRTIO_PCI_FLAG_AER_BIT)<br>
&gt; +<br>
&gt;  typedef struct {<br>
&gt;      MSIMessage msg;<br>
&gt;      int virq;<br>
&gt; -- <br>
&gt; 2.28.0<br>
<br>
</blockquote></div>
diff mbox series

Patch

diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index ae60c1e249..e0a7936f9c 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -1807,6 +1807,12 @@  static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
          */
         pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
 
+        if (proxy->flags & VIRTIO_PCI_FLAG_AER) {
+            pcie_aer_init(pci_dev, PCI_ERR_VER, last_pcie_cap_offset,
+                          PCI_ERR_SIZEOF, NULL);
+            last_pcie_cap_offset += PCI_ERR_SIZEOF;
+        }
+
         if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) {
             /* Init error enabling flags */
             pcie_cap_deverr_init(pci_dev);
@@ -1848,7 +1854,15 @@  static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
 
 static void virtio_pci_exit(PCIDevice *pci_dev)
 {
+    VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
+    bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) &&
+                     !pci_bus_is_root(pci_get_bus(pci_dev));
+
     msix_uninit_exclusive_bar(pci_dev);
+    if (proxy->flags & VIRTIO_PCI_FLAG_AER && pcie_port &&
+        pci_is_express(pci_dev)) {
+        pcie_aer_exit(pci_dev);
+    }
 }
 
 static void virtio_pci_reset(DeviceState *qdev)
@@ -1901,6 +1915,8 @@  static Property virtio_pci_properties[] = {
                     VIRTIO_PCI_FLAG_INIT_PM_BIT, true),
     DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags,
                     VIRTIO_PCI_FLAG_INIT_FLR_BIT, true),
+    DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags,
+                    VIRTIO_PCI_FLAG_AER_BIT, false),
     DEFINE_PROP_END_OF_LIST(),
 };
 
diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h
index 91096f0291..3986b4f0e3 100644
--- a/hw/virtio/virtio-pci.h
+++ b/hw/virtio/virtio-pci.h
@@ -45,6 +45,7 @@  enum {
     VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT,
     VIRTIO_PCI_FLAG_INIT_PM_BIT,
     VIRTIO_PCI_FLAG_INIT_FLR_BIT,
+    VIRTIO_PCI_FLAG_AER_BIT,
 };
 
 /* Need to activate work-arounds for buggy guests at vmstate load. */
@@ -84,6 +85,9 @@  enum {
 /* Init Function Level Reset capability */
 #define VIRTIO_PCI_FLAG_INIT_FLR (1 << VIRTIO_PCI_FLAG_INIT_FLR_BIT)
 
+/* Advanced Error Reporting capability */
+#define VIRTIO_PCI_FLAG_AER (1 << VIRTIO_PCI_FLAG_AER_BIT)
+
 typedef struct {
     MSIMessage msg;
     int virq;