Message ID | 1607085261-25255-1-git-send-email-claudiu.beznea@microchip.com |
---|---|
Headers | show |
Series | net: macb: add support for sama7g5 | expand |
On Fri, Dec 04, 2020 at 02:34:15PM +0200, Claudiu Beznea wrote: > This is necessary for SAMA7G5 as it uses different values for > PHY interface and also introduces hdfctlen bit. > > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
On Fri, Dec 04, 2020 at 02:34:16PM +0200, Claudiu Beznea wrote: > SAMA7G5's ethernet IPs TX clock could be provided by its generic clock or > by the external clock provided by the PHY. The internal IP logic divides > properly this clock depending on the link speed. The patch adds a new > capability so that macb_set_tx_clock() to not be called for IPs having > this capability (the clock rate, in case of generic clock, is set at the > boot time via device tree and the driver only enables it). > > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
On Fri, Dec 04, 2020 at 02:34:19PM +0200, Claudiu Beznea wrote: > Add documentation for SAMA7G5 gigabit ethernet interface. > > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
On Fri, Dec 04, 2020 at 02:34:21PM +0200, Claudiu Beznea wrote: > Add support for SAMA7G5 10/100Mbps interface. > > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew