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[V2,0/4] drm/v3d: Minor improvements

Message ID 1608755714-18233-1-git-send-email-stefan.wahren@i2se.com
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Series drm/v3d: Minor improvements | expand

Message

Stefan Wahren Dec. 23, 2020, 8:35 p.m. UTC 
This small series of v3d patches is a preparation for the upcoming bcm2711
support. The bcm2711 support will be send separate, because it involves
bigger changes.

I'm not sure that the schema conversion patch is sufficient.

Patch 2,3 are directly taken from Raspberry Pi 4 vendor tree.

Changes in V2:
- add missing sob

Nicolas Saenz Julienne (1):
  drm/v3d: Use platform_get_irq_optional() to get optional IRQs

Phil Elwell (2):
  drm/v3d: Set dma_mask as well as coherent_dma_mask
  drm/v3d: Don't clear MMU control bits on exception

Stefan Wahren (1):
  dt-bindings: gpu: Convert v3d to json-schema

 .../devicetree/bindings/gpu/brcm,bcm-v3d.txt       | 33 ----------
 .../devicetree/bindings/gpu/brcm,bcm-v3d.yaml      | 76 ++++++++++++++++++++++
 drivers/gpu/drm/v3d/v3d_drv.c                      |  4 +-
 drivers/gpu/drm/v3d/v3d_irq.c                      |  7 +-
 4 files changed, 80 insertions(+), 40 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
 create mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml

Comments

Nicolas Saenz Julienne Dec. 24, 2020, 1:58 p.m. UTC | #1 
On Wed, 2020-12-23 at 21:35 +0100, Stefan Wahren wrote:
> From: Phil Elwell <phil@raspberrypi.org>

> 

> Both coherent_dma_mask and dma_mask act as constraints on allocations

> and bounce buffer usage, so be sure to set dma_mask to the appropriate

> value otherwise the effective mask could be incorrect.

> 

> Signed-off-by: Phil Elwell <phil@raspberrypi.org>

> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>

> ---


Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>


Regards,
Nicolas
Nicolas Saenz Julienne Dec. 24, 2020, 1:59 p.m. UTC | #2 
On Wed, 2020-12-23 at 21:35 +0100, Stefan Wahren wrote:
> From: Phil Elwell <phil@raspberrypi.org>

> 

> MMU exception conditions are reported in the V3D_MMU_CTRL register as

> write-1-to-clear (W1C) bits. The MMU interrupt handling code clears any

> exceptions, but does so by masking out any other bits and writing the

> result back. There are some important control bits in that register,

> including MMU_ENABLE, so a safer approach is to simply write back the

> value just read unaltered.

> 

> Signed-off-by: Phil Elwell <phil@raspberrypi.org>

> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>

> ---


Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>


Regards,
Nicolas